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authorH.J. Lu <hjl.tools@gmail.com>2020-06-18 05:34:15 -0700
committerH.J. Lu <hjl.tools@gmail.com>2020-06-18 07:01:58 -0700
commit27f8864bd41f0f1b61e8e947d9a030b1a0d23df9 (patch)
tree9890861b452c49cddab4dfe3d5dbc0ea7c224df9
parent75870237ff3bb363447b03f4b0af100227570910 (diff)
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x86: Update F16C detection [BZ #26133]
Since F16C requires AVX, set F16C usable only when AVX is usable.
-rw-r--r--sysdeps/x86/cpu-features.c4
-rw-r--r--sysdeps/x86/cpu-features.h6
2 files changed, 7 insertions, 3 deletions
diff --git a/sysdeps/x86/cpu-features.c b/sysdeps/x86/cpu-features.c
index 916bbf5..5b4a30e 100644
--- a/sysdeps/x86/cpu-features.c
+++ b/sysdeps/x86/cpu-features.c
@@ -146,6 +146,10 @@ get_common_indices (struct cpu_features *cpu_features,
if (CPU_FEATURES_CPU_P (cpu_features, XOP))
cpu_features->feature[index_arch_XOP_Usable]
|= bit_arch_XOP_Usable;
+ /* Determine if F16C is usable. */
+ if (CPU_FEATURES_CPU_P (cpu_features, F16C))
+ cpu_features->feature[index_arch_F16C_Usable]
+ |= bit_arch_F16C_Usable;
}
/* Check if OPMASK state, upper 256-bit of ZMM0-ZMM15 and
diff --git a/sysdeps/x86/cpu-features.h b/sysdeps/x86/cpu-features.h
index a5cc55d..722bcdc 100644
--- a/sysdeps/x86/cpu-features.h
+++ b/sysdeps/x86/cpu-features.h
@@ -142,6 +142,7 @@ extern const struct cpu_features *__get_cpu_features (void)
#define bit_arch_VPCLMULQDQ_Usable (1u << 20)
#define bit_arch_XOP_Usable (1u << 21)
#define bit_arch_XSAVEC_Usable (1u << 22)
+#define bit_arch_F16C_Usable (1u << 23)
#define index_arch_AVX_Usable FEATURE_INDEX_1
#define index_arch_AVX2_Usable FEATURE_INDEX_1
@@ -166,6 +167,7 @@ extern const struct cpu_features *__get_cpu_features (void)
#define index_arch_VPCLMULQDQ_Usable FEATURE_INDEX_1
#define index_arch_XOP_Usable FEATURE_INDEX_1
#define index_arch_XSAVEC_Usable FEATURE_INDEX_1
+#define index_arch_F16C_Usable FEATURE_INDEX_1
/* Unused. Compiler will optimize them out. */
#define bit_arch_SSE3_Usable (1u << 0)
@@ -179,7 +181,6 @@ extern const struct cpu_features *__get_cpu_features (void)
#define bit_arch_AES_Usable (1u << 0)
#define bit_arch_XSAVE_Usable (1u << 0)
#define bit_arch_OSXSAVE_Usable (1u << 0)
-#define bit_arch_F16C_Usable (1u << 0)
#define bit_arch_RDRAND_Usable (1u << 0)
#define bit_arch_FPU_Usable (1u << 0)
#define bit_arch_TSC_Usable (1u << 0)
@@ -236,7 +237,6 @@ extern const struct cpu_features *__get_cpu_features (void)
#define index_arch_AES_Usable FEATURE_INDEX_1
#define index_arch_XSAVE_Usable FEATURE_INDEX_1
#define index_arch_OSXSAVE_Usable FEATURE_INDEX_1
-#define index_arch_F16C_Usable FEATURE_INDEX_1
#define index_arch_RDRAND_Usable FEATURE_INDEX_1
#define index_arch_FPU_Usable FEATURE_INDEX_1
#define index_arch_TSC_Usable FEATURE_INDEX_1
@@ -296,7 +296,7 @@ extern const struct cpu_features *__get_cpu_features (void)
#define need_arch_feature_XSAVE 0
#define need_arch_feature_OSXSAVE 0
#define need_arch_feature_AVX 1
-#define need_arch_feature_F16C 0
+#define need_arch_feature_F16C 1
#define need_arch_feature_RDRAND 0
/* EDX. */