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authorH.J. Lu <hjl.tools@gmail.com>2012-05-15 09:35:43 -0700
committerH.J. Lu <hjl.tools@gmail.com>2012-05-15 09:35:43 -0700
commit8a17f34979b8425fdd74c15872d78c4d56a68079 (patch)
tree8d5626d3b8afb26ba57cb8500bb623e4b10ed7dd
parent777b1eea9df942aebc5ba38566111e667ddaaf91 (diff)
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Load cache size into R8_LP
-rw-r--r--ChangeLog5
-rw-r--r--sysdeps/x86_64/multiarch/memcmp-sse4.S8
2 files changed, 9 insertions, 4 deletions
diff --git a/ChangeLog b/ChangeLog
index 7a1c154..51b0bd5 100644
--- a/ChangeLog
+++ b/ChangeLog
@@ -1,3 +1,8 @@
+2012-05-15 H.J. Lu <hongjiu.lu@intel.com>
+
+ * sysdeps/x86_64/multiarch/memcmp-sse4.S: Load cache size into
+ R8_LP.
+
2012-05-15 Adhemerval Zanella <azanella@linux.vnet.ibm.com>
* sysdeps/powerpc/powerpc32/power7/fpu/s_logb.c: New file. Optimized
diff --git a/sysdeps/x86_64/multiarch/memcmp-sse4.S b/sysdeps/x86_64/multiarch/memcmp-sse4.S
index 530bf8e..2c87865 100644
--- a/sysdeps/x86_64/multiarch/memcmp-sse4.S
+++ b/sysdeps/x86_64/multiarch/memcmp-sse4.S
@@ -319,9 +319,9 @@ L(less32bytesin256):
ALIGN (4)
L(512bytesormore):
# ifdef DATA_CACHE_SIZE_HALF
- mov $DATA_CACHE_SIZE_HALF, %r8
+ mov $DATA_CACHE_SIZE_HALF, %R8_LP
# else
- mov __x86_64_data_cache_size_half(%rip), %r8
+ mov __x86_64_data_cache_size_half(%rip), %R8_LP
# endif
mov %r8, %r9
shr $1, %r8
@@ -635,9 +635,9 @@ L(less32bytesin256in2alinged):
ALIGN (4)
L(512bytesormorein2aligned):
# ifdef DATA_CACHE_SIZE_HALF
- mov $DATA_CACHE_SIZE_HALF, %r8
+ mov $DATA_CACHE_SIZE_HALF, %R8_LP
# else
- mov __x86_64_data_cache_size_half(%rip), %r8
+ mov __x86_64_data_cache_size_half(%rip), %R8_LP
# endif
mov %r8, %r9
shr $1, %r8