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| author | Bruno Haible <bruno@clisp.org> | 2023-11-02 16:19:44 -0300 |
|---|---|---|
| committer | Adhemerval Zanella <adhemerval.zanella@linaro.org> | 2023-12-19 15:12:38 -0300 |
| commit | d0829302728954e0abacfc01551c17daf4d61c87 (patch) | |
| tree | 931ddfa8eee1f5bf55078f807d287773bdb9febe | |
| parent | 80a40a9e14d9a01e3f70c5b37ecd1da83033b6de (diff) | |
| download | glibc-d0829302728954e0abacfc01551c17daf4d61c87.zip glibc-d0829302728954e0abacfc01551c17daf4d61c87.tar.gz glibc-d0829302728954e0abacfc01551c17daf4d61c87.tar.bz2 | |
hppa: Fix undefined behaviour in feclearexcept (BZ 30983)
The expression
(excepts & FE_ALL_EXCEPT) << 27
produces a signed integer overflow when 'excepts' is specified as
FE_INVALID (= 0x10), because
- excepts is of type 'int',
- FE_ALL_EXCEPT is of type 'int',
- thus (excepts & FE_ALL_EXCEPT) is (int) 0x10,
- 'int' is 32 bits wide.
The patched code produces the same instruction sequence as
previosuly.
Reviewed-by: Carlos O'Donell <carlos@redhat.com>
| -rw-r--r-- | sysdeps/hppa/fpu/fclrexcpt.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/sysdeps/hppa/fpu/fclrexcpt.c b/sysdeps/hppa/fpu/fclrexcpt.c index 055fb04..46caf39 100644 --- a/sysdeps/hppa/fpu/fclrexcpt.c +++ b/sysdeps/hppa/fpu/fclrexcpt.c @@ -26,7 +26,7 @@ feclearexcept (int excepts) /* Get the current status word. */ __asm__ ("fstd %%fr0,0(%1)" : "=m" (s.l) : "r" (&s.l) : "%r0"); /* Clear all the relevant bits. */ - s.sw[0] &= ~((excepts & FE_ALL_EXCEPT) << 27); + s.sw[0] &= ~(((unsigned int) excepts & FE_ALL_EXCEPT) << 27); __asm__ ("fldd 0(%0),%%fr0" : : "r" (&s.l), "m" (s.l) : "%r0"); /* Success. */ |