blob: dbfb4b6476518372aa61a43c3ed99bed5d59b0fb (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
|
# Makefile for blah ...
# Copyright blah ...
## COMMON_PRE_CONFIG_FRAG
# These variables are given default values in COMMON_PRE_CONFIG_FRAG.
# We override the ones we need to here.
# Not all of these need to be mentioned, only the necessary ones.
# List of object files, less common parts.
SIM_OBJS = sim-endian.o sim-bits.o sim-config.o interp.o \
support.o idecode.o semantics.o itable.o misc.o \
sim-calls.o \
sim-events.o \
sim-core.o \
sim-io.o \
sim-utils.o \
sim-load.o \
sim-module.o \
sim-options.o \
sim-trace.o \
sim-profile.o \
sim-fpu.o
# List of extra dependencies.
# Generally this consists of simulator specific files included by sim-main.h.
SIM_EXTRA_DEPS = itable.h idecode.h cpu.h alu.h
# List of extra libraries to link with
SIM_EXTRA_LIBS = -lm
# List of generators
SIM_GEN=tmp-igen
# List of flags to always pass to $(CC).
SIM_WARNINGS=@sim_warnings@
SIM_ENDIAN=@sim_endian@
SIM_HOSTENDIAN=@sim_hostendian@
SIM_INLINE=@sim_inline@
SIM_RESERVED_BITS=@sim_reserved_bits@
SIM_ALIGNMENT=@sim_alignment@
SIM_EXTRA_CFLAGS = \
$(SIM_WARNINGS) \
$(SIM_ENDIAN) \
$(SIM_HOSTENDIAN) \
$(SIM_INLINE) \
$(SIM_RESERVED_BITS) \
-DWITH_TARGET_WORD_MSB=31
# List of main object files for `run'.
SIM_RUN_OBJS = nrun.o
# Dependency of `clean' to clean any extra files.
SIM_EXTRA_CLEAN = clean-igen
## COMMON_POST_CONFIG_FRAG
# Rules need to build $(SIM_OBJS), plus whatever else the target wants.
# ... target specific rules ...
BUILT_SRC_FROM_IGEN = \
icache.h \
icache.c \
idecode.h \
idecode.c \
semantics.h \
semantics.c \
model.h \
model.c \
support.h \
support.c \
itable.h itable.c
$(BUILT_SRC_FROM_IGEN): tmp-igen
#
.PHONY: clean-igen
clean-igen:
rm -f $(BUILT_SRC_FROM_IGEN)
rm -f tmp-igen tmp-insns
../igen/igen:
cd ../igen && $(MAKE)
tmp-igen: $(srcdir)/dc $(srcdir)/insns $(srcdir)/ic ../igen/igen
cd ../igen && $(MAKE)
../igen/igen \
-F f \
-G direct-access \
-G delayed-branch \
-G zero-r0 \
-F short,emul \
-B 32 -H 31 \
-o $(srcdir)/dc \
-k $(srcdir)/ic \
-i $(srcdir)/insns \
-n icache.h -hc tmp-icache.h \
-n icache.c -c tmp-icache.c \
-n semantics.h -hs tmp-semantics.h \
-n semantics.c -s tmp-semantics.c \
-n idecode.h -hd tmp-idecode.h \
-n idecode.c -d tmp-idecode.c \
-n model.h -hm tmp-model.h \
-n model.c -m tmp-model.c \
-n support.h -hf tmp-support.h \
-n support.c -f tmp-support.c \
-n itable.h -ht tmp-itable.h \
-n itable.c -t tmp-itable.c
$(srcdir)/../../move-if-change tmp-icache.h icache.h
$(srcdir)/../../move-if-change tmp-icache.c icache.c
$(srcdir)/../../move-if-change tmp-idecode.h idecode.h
$(srcdir)/../../move-if-change tmp-idecode.c idecode.c
$(srcdir)/../../move-if-change tmp-semantics.h semantics.h
$(srcdir)/../../move-if-change tmp-semantics.c semantics.c
$(srcdir)/../../move-if-change tmp-model.h model.h
$(srcdir)/../../move-if-change tmp-model.c model.c
$(srcdir)/../../move-if-change tmp-support.h support.h
$(srcdir)/../../move-if-change tmp-support.c support.c
$(srcdir)/../../move-if-change tmp-itable.h itable.h
$(srcdir)/../../move-if-change tmp-itable.c itable.c
touch tmp-igen
ENGINE_H = \
sim-main.h \
$(srcdir)/../common/sim-basics.h \
config.h \
$(srcdir)/../common/sim-config.h \
$(srcdir)/../common/sim-inline.h \
$(srcdir)/../common/sim-types.h \
$(srcdir)/../common/sim-bits.h \
$(srcdir)/../common/sim-endian.h \
$(srcdir)/../common/sim-options.h \
itable.h \
idecode.h \
cpu.h \
alu.h \
$(srcdir)/../common/sim-alu.h \
$(srcdir)/../common/sim-core.h \
$(srcdir)/../common/sim-events.h \
$(srcdir)/../common/sim-fpu.h \
idecode.o: $(ENGINE_H)
semantics.o: $(ENGINE_H)
support.o: $(ENGINE_H)
interp.o: interp.c $(ENGINE_H)
sim-calls.o: sim-calls.c $(ENGINE_H)
cpu.o: cpu.c $(ENGINE_H)
misc.o: $(ENGINE_H)
|
