1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
|
# FRV testcase for ici @(GRi,GRj)
# mach: all
.include "testutils.inc"
start
.global ici
ici:
set_gr_immed 1234,gr2
set_spr_addr ok1,lr
bra testit
ok1:
; Change the first insn to set gr1 to 1235
; but don't invalidate the insn cache
; should have no effect
set_gr_mem testit,gr10
ori gr10,1,gr10
set_mem_gr gr10,testit
set_gr_addr testit,gr10
dcf @(gr10,gr0) ; flush data cache
set_spr_addr ok2,lr
bra testit
ok2: ; Now invalidate the insn cache. The new insn should take effect
ici @(gr10,gr0)
set_gr_immed 1235,gr2
set_spr_addr ok3,lr
bra testit
ok3:
pass
testit:
setlos 1234,gr1
test_gr_gr gr1,gr2
bralr
fail
|
