blob: cbf9308444af1bd132ddc6f46015e1d4b7bb00a1 (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
|
.include "t-macros.i"
start
;;; Try out each bit in the PSW
loadpsw2 PSW_SM
checkpsw2 1 PSW_SM
loadpsw2 PSW_01
checkpsw2 2 0 ;; PSW_01
loadpsw2 PSW_EA
checkpsw2 3 PSW_EA
loadpsw2 PSW_DB
checkpsw2 4 PSW_DB
loadpsw2 PSW_DM
checkpsw2 5 PSW_DM
loadpsw2 PSW_IE
checkpsw2 6 PSW_IE
loadpsw2 PSW_RP
checkpsw2 7 PSW_RP
loadpsw2 PSW_MD
checkpsw2 8 PSW_MD
loadpsw2 PSW_FX|PSW_ST
checkpsw2 9 PSW_FX|PSW_ST
;; loadpsw2 PSW_ST
;; checkpsw2 10
loadpsw2 PSW_10
checkpsw2 11 0 ;; PSW_10
loadpsw2 PSW_11
checkpsw2 12 0 ;; PSW_11
loadpsw2 PSW_F0
checkpsw2 13 PSW_F0
loadpsw2 PSW_F1
checkpsw2 14 PSW_F1
loadpsw2 PSW_14
checkpsw2 15 0 ;; PSW_14
loadpsw2 PSW_C
checkpsw2 16 PSW_C
;;; Check that bit 0 (LSB) of the MOD_E & MOD_S registers are stuck at ZERO.
ldi r6, #0xdead
mvtc r6, cr10
ldi r6, #0xbeef
mvtc r6, cr11
mvfc r7, cr10
check 17 r7 0xdeac
mvfc r7, cr11
check 18 r7 0xbeee
;;; Check that certain bits of the DPSW and BPSW are hardwired to zero
ldi r6, 0xffff
mvtc r6, bpsw
mvfc r7, bpsw
check 18 r7 0xbfcd
ldi r6, 0xffff
mvtc r6, dpsw
mvfc r7, dpsw
check 18 r7 0xbfcd
exit0
|