blob: 38c4c5e93b89c81407dda7185bafbb945f7d60ed (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
|
start-sanitize-sky
Wed Jun 10 15:56:10 1998 Frank Ch. Eigler <fche@cygnus.com>
* sim/sky/t-int.c: New file to test sky hardware
interrupts.
* sim/sky/t-int-handler.s: New file for null interrupt
handler.
* sim/sky/t-int.brn: New file to build new test.
end-sanitize-sky
Wed Jun 10 10:53:20 1998 Doug Evans <devans@seba.cygnus.com>
* sim/m32r/addx.cgs: Add another test.
* sim/m32r/jmp.cgs: Add another test.
start-sanitize-m32rx
* sim/m32r/bra8-2.cgs: New testcase.
* sim/m32r/hello.ms: Run on m32rx too.
end-sanitize-m32rx
start-sanitize-sky
Tue Jun 9 08:55:05 1998 Doug Evans <devans@canuck.cygnus.com>
* sim/sky/dma.h: New file.
* sim/sky/vif.h: New file.
* sim/sky/vu.h: New file.
* sim/sky/sce_main.c: Move magic numbers to .h files.
end-sanitize-sky
Mon Jun 8 16:08:27 1998 Doug Evans <devans@canuck.cygnus.com>
* sim/m32r/trap.cgs: Test trap 2.
Mon Jun 1 18:54:22 1998 Frank Ch. Eigler <fche@cygnus.com>
* lib/sim-defs.exp (sim_run): Add possible environment variable
list to simulator run.
start-sanitize-sky
* sim/sky/sky-defs.tcl: Use it.
* sim/sky/t-pke2.vif1out: Update to match recent word-precise
tracking table change in sim/mips/sky-pke.c.
* sim/sky/t-pke3.trc: Ditto.
* sim/sky/t-pke4.vif0expect: Ditto.
end-sanitize-sky
Thu May 28 14:59:46 1998 Jillian Ye <jillian@cygnus.com>
* Makefile.in: Take RUNTEST out of FLAG_TO_PASS
so that make check can be invoked recursively.
start-sanitize-sky
Mon May 18 10:37:47 1998 Doug Evans <devans@canuck.cygnus.com>
* sim/sky/sky.ld: Delete file.
end-sanitize-sky
Thu May 14 11:48:35 1998 Doug Evans <devans@canuck.cygnus.com>
* config/default.exp (CC,SIM): Delete.
start-sanitize-sky
* sim/sky/sky-defs.tcl (LDSCRIPT,SIM): Delete.
(run_trc_test): Use sim_compile, sim_run. Only delete temp files
if testcase passed.
(run_brn_test): Ditto.
* sim/sky/sky.exp: Add runtest_file_p support. Don't print
unsupported message if not sky.
* sim/sky/sky_sce.exp: Likewise.
end-sanitize-sky
* lib/sim-defs.exp (sim_run): Fix handling of output redirection.
New arg prog_opts. All callers updated.
Fri May 8 18:10:28 1998 Jillian Ye <jillian@cygnus.com>
* Makefile.in: Made "check" the target of two
dependencies (test1, test2) so that test2 get a chance to
run even when test1 failed if "make -k check" is used.
Fri May 8 14:41:28 1998 Doug Evans <devans@canuck.cygnus.com>
* lib/sim-defs.exp (sim_version): Simplify.
(sim_run): Implement.
(run_sim_test): Use sim_run.
(sim_compile): New proc.
Mon May 4 17:59:11 1998 Frank Ch. Eigler <fche@cygnus.com>
start-sanitize-sky
* configure.in (testdir): Don't use old sky test directory.
* configure: Regenerated
* sky/Makefile.in: swallow stderr on buggy tests
end-sanitize-sky
* config/default.exp: Added C compiler settings.
Wed Apr 22 12:26:28 1998 Doug Evans <devans@canuck.cygnus.com>
* Makefile.in (TARGET_FLAGS_TO_PASS): Delete LIBS, LDFLAGS.
Tue Apr 21 10:49:03 1998 Doug Evans <devans@canuck.cygnus.com>
* lib/sim-defs.exp (run_sim_test): Don't exit early if one mach fails,
try all machs.
* sim/m32r/addx.cgs: Test (-1)+(-1)+1.
Fri Apr 17 16:00:52 1998 Doug Evans <devans@canuck.cygnus.com>
* sim/m32r/mv[ft]achi.cgs: Fix expected result
(sign extension of top 8 bits).
start-sanitize-m32rx
* sim/m32r/mv[ft]achi-a.cgs: Ditto.
end-sanitize-m32rx
start-sanitize-m32rx
Tue Apr 14 14:06:34 1998 Doug Evans <devans@canuck.cygnus.com>
* sim/m32r/maclh1.cgs: Fix testcase.
* sim/m32r/maclh1-2.cgs: New testcase.
Tue Mar 3 19:09:09 1998 Doug Evans <devans@canuck.cygnus.com>
* sim/m32r/sat.cgs: Change sath to sat.
end-sanitize-m32rx
Wed Feb 25 11:01:17 1998 Doug Evans <devans@canuck.cygnus.com>
* Makefile.in (RUNTEST): Fix path to runtest.
start-sanitize-sky
Tue Feb 24 19:47:56 1998 Frank Ch. Eigler <fche@cygnus.com>
* configure.in (testdir): Added sky subdir for mips64r5900-sky-elf
target.
* configure: Regenerate.
end-sanitize-sky
Fri Feb 20 11:00:02 1998 Nick Clifton <nickc@cygnus.com>
* sim/m32r/unlock.cgs: Fixed test.
* sim/m32r/mvfc.cgs: Fixed test.
* sim/m32r/remu.cgs: Fixed test.
* sim/m32r/bnc24.cgs: Test long BNC instruction.
* sim/m32r/bnc8.cgs: Test short BNC instruction.
* sim/m32r/ld-plus.cgs: Test LD instruction.
* sim/m32r/macwhi.cgs: Test MACWHI instruction.
* sim/m32r/macwlo.cgs: Test MACWLO instruction.
* sim/m32r/mulwhi.cgs: Test MULWHI instruction.
* sim/m32r/mulwlo.cgs: Test MULWLO instruction.
* sim/m32r/mvfachi.cgs: Test MVFACHI instruction.
* sim/m32r/mvfaclo.cgs: Test MVFACLO instruction.
* sim/m32r/mvtaclo.cgs: Test MVTACLO instruction.
* sim/m32r/addv.cgs: Test ADDV instruction.
* sim/m32r/addv3.cgs: Test ADDV3 instruction.
* sim/m32r/addx.cgs: Test ADDX instruction.
* sim/m32r/lock.cgs: Test LOCK instruction.
* sim/m32r/neg.cgs: Test NEG instruction.
* sim/m32r/not.cgs: Test NOT instruction.
* sim/m32r/unlock.cgs: Test UNLOCK instruction.
start-sanitize-m32rx
* sim/m32r/mvfachi-a.cgs: Test extended MVFACHI instruction.
* sim/m32r/mvfaclo-a.cgs: Test extended MVFACLO instruction.
* sim/m32r/mvtachi-a.cgs: Test extended MVTACHI instruction.
* sim/m32r/mvtaclo-a.cgs: Test extended MVTACLO instruction.
end-sanitize-m32rx
Thu Feb 19 11:15:45 1998 Nick Clifton <nickc@cygnus.com>
* sim/m32r/testutils.inc (mvaddr_h_gr): new macro to load an
address into a general register.
* sim/m32r/or3.cgs: Test OR3 instruction.
* sim/m32r/rach.cgs: Test RACH instruction.
* sim/m32r/rem.cgs: Test REM instruction.
* sim/m32r/sub.cgs: Test SUB instruction.
* sim/m32r/mv.cgs: Test MV instruction.
* sim/m32r/mul.cgs: Test MUL instruction.
* sim/m32r/bl24.cgs: Test long BL instruction.
* sim/m32r/bl8.cgs: Test short BL instruction.
* sim/m32r/blez.cgs: Test BLEZ instruction.
* sim/m32r/bltz.cgs: Test BLTZ instruction.
* sim/m32r/bne.cgs: Test BNE instruction.
* sim/m32r/bnez.cgs: Test BNEZ instruction.
* sim/m32r/bra24.cgs: Test long BRA instruction.
* sim/m32r/bra8.cgs: Test short BRA instruction.
* sim/m32r/jl.cgs: Test JL instruction.
* sim/m32r/or.cgs: Test OR instruction.
* sim/m32r/jmp.cgs: Test JMP instruction.
* sim/m32r/and.cgs: Test AND instruction.
* sim/m32r/and3.cgs: Test AND3 instruction.
* sim/m32r/beq.cgs: Test BEQ instruction.
* sim/m32r/beqz.cgs: Test BEQZ instruction.
* sim/m32r/bgez.cgs: Test BGEZ instruction.
* sim/m32r/bgtz.cgs: Test BGTZ instruction.
* sim/m32r/cmp.cgs: Test CMP instruction.
* sim/m32r/cmpi.cgs: Test CMPI instruction.
* sim/m32r/cmpu.cgs: Test CMPU instruction.
* sim/m32r/cmpui.cgs: Test CMPUI instruction.
* sim/m32r/div.cgs: Test DIV instruction.
* sim/m32r/divu.cgs: Test DIVU instruction.
* sim/m32r/cmpeq.cgs: Test CMPEQ instruction.
* sim/m32r/sll.cgs: Test SLL instruction.
* sim/m32r/sll3.cgs: Test SLL3 instruction.
* sim/m32r/slli.cgs: Test SLLI instruction.
* sim/m32r/sra.cgs: Test SRA instruction.
* sim/m32r/sra3.cgs: Test SRA3 instruction.
* sim/m32r/srai.cgs: Test SRAI instruction.
* sim/m32r/srl.cgs: Test SRL instruction.
* sim/m32r/srl3.cgs: Test SRL3 instruction.
* sim/m32r/srli.cgs: Test SRLI instruction.
* sim/m32r/xor3.cgs: Test XOR3 instruction.
* sim/m32r/xor.cgs: Test XOR instruction.
start-sanitize-m32rx
* sim/m32r/jnc.cgs: Test JNC instruction.
* sim/m32r/jc.cgs: Test JC instruction.
* sim/m32r/cmpz.cgs: Test CMPZ instruction.
* sim/m32r/bcl24.cgs: Test long version of BCL instruction
* sim/m32r/bcl8.cgs: Test short BCL instruction.
* sim/m32r/bncl24.cgs: Test long BNCL instruction.
* sim/m32r/bncl8.cgs: Test short BNCL instruction.
* sim/m32r/divh.cgs: Test DIVH instruction.
* sim/m32r/rach-dsi.cgs: Test extended RACH instruction.
end-sanitize-m32rx
Tue Feb 17 12:46:05 1998 Doug Evans <devans@seba.cygnus.com>
* config/default.exp: New file.
* lib/sim-defs.exp: New file.
* sim/m32r/*: m32r dejagnu simulator testsuite.
* Makefile.in (build_alias): Define.
(arch): Define.
(RUNTEST_FOR_TARGET): Delete.
(RUNTEST): Fix.
(SCHEME,SCHEMEFLAGS,CGENDIR,CGENFLAGS): Define.
(check): Depend on site.exp. Run dejagnu.
(site.exp): New target.
(cgen): New target.
* configure.in: Call AC_CHECK_PROG(SCHEME) if using cgen.
(arch): Define from target_cpu.
* configure: Regenerate.
Wed Sep 17 10:21:26 1997 Andrew Cagney <cagney@b1.cygnus.com>
* common/bits-gen.c (gen_bit): Pass in the full name of the macro.
(gen_mask): Ditto.
* common/bits-tst.c (main): Add tests for LSSEXT, MSSEXT.
(calc): Add support for 8 bit version of macros.
(main): Add tests for 8 bit versions of macros.
(check_sext): Check SEXT of zero clears bits.
* common/bits-gen.c (main): Generate tests for 8 bit versions of
macros.
Thu Sep 11 13:04:40 1997 Andrew Cagney <cagney@b1.cygnus.com>
* common/Make-common.in: New file, provide generic rules for
running checks.
Mon Sep 1 16:43:55 1997 Andrew Cagney <cagney@b1.cygnus.com>
* configure.in (configdirs): Test for the target directory instead
of matching on a target.
start-sanitize-r5900
Tue Jul 15 13:43:20 1997 Andrew Cagney <cagney@sendai.cygnus.com>
* configure.in (configdirs): Configure mips64vr5900el
directory.
* configure: Regenerate.
end-sanitize-r5900
|