path: root/sim/mips/ChangeLog

Fri Jul 25 15:00:45 1997  Gavin Koch  <gavin@cygnus.com>
 
 	* gencode.c (build_instruction): Two arg MADD should
 	not assign result to $0.
 
start-sanitize-r5900
Thu Jul 10 11:58:48 1997  Andrew Cagney  <cagney@critters.cygnus.com>

	* gencode.c (build_instruction): For "ppac5" use unsigned
 	arrithmetic so that the sign bit doesn't smear when right shifted.
	(build_instruction): For "pdiv" perform sign extension when
 	storing results in HI and LO.
	(build_instructions): For "pdiv" and "pdivbw" check for
 	divide-by-zero.
	(build_instruction): For "pmfhl.slw" update hi part of dest
 	register as well as low part.
	(build_instruction): For "pmfhl" portably handle long long values.
	(build_instruction): For "pmfhl.sh" correctly negative values.
  	Store half words 2 and three in the correct place.
	(build_instruction): For "psllvw", sign extend value after shift.

end-sanitize-r5900
Thu Jun 26 12:13:17 1997  Angela Marie Thomas (angela@cygnus.com)

	* sim/mips/configure: Change default_sim_endian to 0 (bi-endian)
	* sim/mips/configure.in: Regenerate.

Wed Jul  9 10:29:21 1997  Andrew Cagney  <cagney@critters.cygnus.com>

	* interp.c (SUB_REG_UW, SUB_REG_SW, SUB_REG_*): Use more explicit
 	signed8, unsigned8 et.al. types.

start-sanitize-r5900
	* gencode.c (build_instruction): For PMULTU* do not sign extend
 	registers.  Make generated code easier to debug.

end-sanitize-r5900
	* interp.c (SUB_REG_FETCH): Handle both little and big endian
 	hosts when selecting subreg.

start-sanitize-r5900
Tue Jul  8 18:07:20 1997  Andrew Cagney  <cagney@andros.cygnus.com>

	* gencode.c (type_for_data_len): For 32bit operations concerned
 	with overflow, perform op using 64bits.
	(build_instruction): For PADD, always compute operation using type
 	returned by type_for_data_len.
	(build_instruction): For PSUBU, when overflow, saturate to zero as
 	actually underflow.

end-sanitize-r5900
Wed Jul  2 11:54:10 1997  Jeffrey A Law  (law@cygnus.com)

start-sanitize-r5900
	* gencode.c (build_instruction): Handle "pext5" according to
	version 1.95 of the r5900 ISA.

	* gencode.c (build_instruction): Handle "ppac5" according to
	version 1.95 of the r5900 ISA.

end-sanitize-r5900
	* interp.c (sim_engine_run): Reset the ZERO register to zero
	regardless of FEATURE_WARN_ZERO.
	* gencode.c (FEATURE_WARNINGS): Remove FEATURE_WARN_ZERO.

Wed Jun  4 10:43:14 1997  Andrew Cagney  <cagney@b1.cygnus.com>

	* interp.c (decode_coproc): Implement MTC0 N, CAUSE.
	(SignalException): For BreakPoints ignore any mode bits and just
 	save the PC.
	(SignalException): Always set the CAUSE register.

Tue Jun  3 05:00:33 1997  Andrew Cagney  <cagney@b1.cygnus.com>

	* interp.c (SignalException): Clear the simDELAYSLOT flag when an
 	exception has been taken.

	* interp.c: Implement the ERET and mt/f sr instructions.

start-sanitize-r5900
Mon Jun  2 23:28:19 1997  Andrew Cagney  <cagney@b1.cygnus.com>

	* gencode.c (build_instruction): For paddu, extract unsigned
 	sub-fields.

	* gencode.c (build_instruction): Saturate padds instead of padd
 	instructions.

end-sanitize-r5900
Sat May 31 00:44:16 1997  Andrew Cagney  <cagney@b1.cygnus.com>

	* interp.c (SignalException): Don't bother restarting an
 	interrupt.

Fri May 30 23:41:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>

	* interp.c (SignalException): Really take an interrupt.
	(interrupt_event): Only deliver interrupts when enabled.

Tue May 27 20:08:06 1997  Andrew Cagney  <cagney@b1.cygnus.com>

	* interp.c (sim_info): Only print info when verbose.
	(sim_info) Use sim_io_printf for output.
	
Tue May 27 14:22:23 1997  Andrew Cagney  <cagney@b1.cygnus.com>

	* interp.c (CoProcPresent): Add UNUSED attribute - not used by all
 	mips architectures.

Tue May 27 14:22:23 1997  Andrew Cagney  <cagney@b1.cygnus.com>

	* interp.c (sim_do_command): Check for common commands if a
 	simulator specific command fails.

Thu May 22 09:32:03 1997  Gavin Koch  <gavin@cygnus.com>

	* interp.c (sim_engine_run): ifdef out uses of simSTOP, simSTEP
	and simBE when DEBUG is defined.

Wed May 21 09:08:10 1997  Andrew Cagney  <cagney@b1.cygnus.com>

	* interp.c (interrupt_event): New function.  Pass exception event
 	onto exception handler.

	* configure.in: Check for stdlib.h.
	* configure: Regenerate.

	* gencode.c (build_instruction): Add UNUSED attribute to tempS
 	variable declaration.
	(build_instruction): Initialize memval1.
	(build_instruction): Add UNUSED attribute to byte, bigend,
 	reverse.
	(build_operands): Ditto.

	* interp.c: Fix GCC warnings.
	(sim_get_quit_code): Delete.

	* configure.in: Add INLINE, ENDIAN, HOSTENDIAN and WARNINGS.
	* Makefile.in: Ditto.
	* configure: Re-generate.
	
	* Makefile.in (SIM_OBJS): Add sim-watch.o module.

Tue May 20 15:08:56 1997  Andrew Cagney  <cagney@b1.cygnus.com>

	* interp.c (mips_option_handler): New function parse argumes using
 	sim-options.
	(myname): Replace with STATE_MY_NAME.
	(sim_open): Delete check for host endianness - performed by
 	sim_config.
	(simHOSTBE, simBE): Delete, replaced by sim-endian flags.
	(sim_open): Move much of the initialization from here.
	(sim_load): To here.  After the image has been loaded and
 	endianness set.
	(sim_open): Move ColdReset from here.
	(sim_create_inferior): To here.
	(sim_open): Make FP check less dependant on host endianness.

	* Makefile.in (SIM_RUN_OBJS): Set to nrun.o - use new version or
 	run.
	* interp.c (sim_set_callbacks): Delete.

	* interp.c (membank, membank_base, membank_size): Replace with
 	STATE_MEMORY, STATE_MEM_SIZE, STATE_MEM_BASE.
	(sim_open): Remove call to callback->init. gdb/run do this.

	* interp.c: Update

	* sim-main.h (SIM_HAVE_FLATMEM): Define.

	* interp.c (big_endian_p): Delete, replaced by
 	current_target_byte_order.

Tue May 20 13:55:00 1997  Andrew Cagney  <cagney@b1.cygnus.com>

	* interp.c (host_read_long, host_read_word, host_swap_word,
 	host_swap_long): Delete. Using common sim-endian.
	(sim_fetch_register, sim_store_register): Use H2T.
	(pipeline_ticks): Delete.  Handled by sim-events.
	(sim_info): Update.
	(sim_engine_run): Update.

Tue May 20 13:42:03 1997  Andrew Cagney  <cagney@b1.cygnus.com>

	* interp.c (sim_stop_reason): Move code determining simEXCEPTION
 	reason from here.
	(SignalException): To here. Signal using sim_engine_halt.
	(sim_stop_reason): Delete, moved to common.
	
Tue May 20 10:19:48 1997  Andrew Cagney  <cagney@b2.cygnus.com>

	* interp.c (sim_open): Add callback argument.
	(sim_set_callbacks): Delete SIM_DESC argument.
	(sim_size): Ditto.

Mon May 19 18:20:38 1997  Andrew Cagney  <cagney@b1.cygnus.com>

	* Makefile.in (SIM_OBJS): Add common modules.

	* interp.c (sim_set_callbacks): Also set SD callback.
	(set_endianness, xfer_*, swap_*): Delete.
	(host_read_word, host_read_long, host_swap_word, host_swap_long):
 	Change to functions using sim-endian macros.
	(control_c, sim_stop): Delete, use common version.
	(simulate): Convert into.
	(sim_engine_run): This function.
	(sim_resume): Delete.
	
	* interp.c (simulation): New variable - the simulator object.
	(sim_kind): Delete global - merged into simulation.
	(sim_load): Cleanup.  Move PC assignment from here.
	(sim_create_inferior): To here.

	* sim-main.h: New file.
	* interp.c (sim-main.h): Include.
	
Thu Apr 24 00:39:51 1997  Doug Evans  <dje@canuck.cygnus.com>

	* configure: Regenerated to track ../common/aclocal.m4 changes.

Wed Apr 23 17:32:19 1997  Doug Evans  <dje@canuck.cygnus.com>

	* tconfig.in (SIM_HAVE_BIENDIAN): Define.

Mon Apr 21 17:16:13 1997  Gavin Koch  <gavin@cygnus.com>

	* gencode.c (build_instruction): DIV instructions: check 
	for division by zero and integer overflow before using 
	host's division operation.

Thu Apr 17 03:18:14 1997  Doug Evans  <dje@canuck.cygnus.com>

	* Makefile.in (SIM_OBJS): Add sim-load.o.
	* interp.c: #include bfd.h.
	(target_byte_order): Delete.
	(sim_kind, myname, big_endian_p): New static locals.
	(sim_open): Set sim_kind, myname.  Move call to set_endianness to
	after argument parsing.  Recognize -E arg, set endianness accordingly.
	(sim_load): Return SIM_RC.  New arg abfd.  Call sim_load_file to
	load file into simulator.  Set PC from bfd.
	(sim_create_inferior): Return SIM_RC.  Delete arg start_address.
	(set_endianness): Use big_endian_p instead of target_byte_order.

Wed Apr 16 17:55:37 1997  Andrew Cagney  <cagney@b1.cygnus.com>

	* interp.c (sim_size): Delete prototype - conflicts with
 	definition in remote-sim.h.  Correct definition.

Mon Apr  7 15:45:02 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>

	* configure: Regenerated to track ../common/aclocal.m4 changes.
	* config.in: Ditto.

Wed Apr  2 15:06:28 1997  Doug Evans  <dje@canuck.cygnus.com>

	* interp.c (sim_open): New arg `kind'.

	* configure: Regenerated to track ../common/aclocal.m4 changes.

Wed Apr  2 14:34:19 1997 Andrew Cagney <cagney@kremvax.cygnus.com>

	* configure: Regenerated to track ../common/aclocal.m4 changes.

Tue Mar 25 11:38:22 1997  Doug Evans  <dje@canuck.cygnus.com>

	* interp.c (sim_open): Set optind to 0 before calling getopt.

Wed Mar 19 01:14:00 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>

	* configure: Regenerated to track ../common/aclocal.m4 changes.

Mon Mar 17 10:52:59 1997  Gavin Koch  <gavin@cetus.cygnus.com>

	* interp.c : Replace uses of pr_addr with pr_uword64
	where the bit length is always 64 independent of SIM_ADDR.
	(pr_uword64) : added.

Mon Mar 17 15:10:07 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>

	* configure: Re-generate.

Fri Mar 14 10:34:11 1997  Michael Meissner  <meissner@cygnus.com>

	* configure: Regenerate to track ../common/aclocal.m4 changes.

Thu Mar 13 12:51:36 1997  Doug Evans  <dje@canuck.cygnus.com>

	* interp.c (sim_open): New SIM_DESC result.  Argument is now
	in argv form.
	(other sim_*): New SIM_DESC argument.

start-sanitize-r5900
Wed Feb 26 18:32:21 1997  Gavin Koch  <gavin@cygnus.com>

	* gencode.c (POP_AND,POP_OR,POP_NOR,POP_XOR): 
	Change values to avoid overloading DOUBLEWORD which is tested
	for all insns.
	* gencode.c: reinstate "offending code".

end-sanitize-r5900
Mon Feb 24 22:47:14 1997  Dawn Perchik  <dawn@cygnus.com>

	* interp.c: Fix printing of addresses for non-64-bit targets.
	(pr_addr): Add function to print address based on size.
start-sanitize-r5900
	* gencode.c: #ifdef out offending code until a permanent fix 
	can be added.  Code is causing build errors for non-5900 mips targets.
end-sanitize-r5900

start-sanitize-r5900
Thu Feb 20 10:40:24 1997  Gavin Koch  <gavin@cetus.cygnus.com>

	* gencode.c (process_instructions): Correct test for ISA dependent
	architecture bits in isa field of MIPS_DECODE.

end-sanitize-r5900
Wed Feb 19 14:42:09 1997  Mark Alexander  <marka@cygnus.com>

	* interp.c (simopen): Add support for LSI MiniRISC PMON vectors.

start-sanitize-r5900
Tue Feb 18 17:03:47 1997  Gavin Koch  <gavin@cygnus.com>

	* gencode.c (MIPS_DECODE): Correct instruction feature flags for 
	PMADDUW.

end-sanitize-r5900
Thu Feb 13 14:08:30 1997  Ian Lance Taylor  <ian@cygnus.com>

	* gencode.c (build_mips16_operands): Correct computation of base
	address for extended PC relative instruction.

start-sanitize-r5900
Fri Feb  7 11:12:44 1997  Gavin Koch  <gavin@cygnus.com>

	* Makefile.in, configure, configure.in, gencode.c, 
	interp.c, support.h: add r5900.

end-sanitize-r5900
Thu Feb  6 17:16:15 1997  Ian Lance Taylor  <ian@cygnus.com>

	* interp.c (mips16_entry): Add support for floating point cases.
	(SignalException): Pass floating point cases to mips16_entry.
	(ValueFPR): Don't restrict fmt_single and fmt_word to even
	registers.
	(StoreFPR): Likewise.  Also, don't clobber fpr + 1 for fmt_single
	or fmt_word.
	(COP_LW): Pass fmt_word rather than fmt_uninterpreted to StoreFPR,
	and then set the state to fmt_uninterpreted.
	(COP_SW): Temporarily set the state to fmt_word while calling
	ValueFPR.

Tue Feb  4 16:48:25 1997  Ian Lance Taylor  <ian@cygnus.com>

	* gencode.c (build_instruction): The high order may be set in the
	comparison flags at any ISA level, not just ISA 4.

Tue Feb  4 13:33:30 1997  Doug Evans  <dje@canuck.cygnus.com>

	* Makefile.in (@COMMON_MAKEFILE_FRAG): Use
	COMMON_{PRE,POST}_CONFIG_FRAG instead.
	* configure.in: sinclude ../common/aclocal.m4.
	* configure: Regenerated.

Fri Jan 31 11:11:45 1997  Ian Lance Taylor  <ian@cygnus.com>

	* configure: Rebuild after change to aclocal.m4.

Thu Jan 23 11:46:23 1997  Stu Grossman  (grossman@critters.cygnus.com)

	* configure configure.in Makefile.in:  Update to new configure
	scheme which is more compatible with WinGDB builds.
	* configure.in:  Improve comment on how to run autoconf.
	* configure:  Re-run autoconf to get new ../common/aclocal.m4.
	* Makefile.in:  Use autoconf substitution to install common
	makefile fragment.

Wed Jan  8 12:39:03 1997  Jim Wilson  <wilson@cygnus.com>

	* gencode.c (build_instruction): Use BigEndianCPU instead of
	ByteSwapMem.

Thu Jan 02 22:23:04 1997  Mark Alexander  <marka@cygnus.com>

	* interp.c (sim_monitor): Make output to stdout visible in
	wingdb's I/O log window.

Tue Dec 31 07:04:00 1996  Mark Alexander  <marka@cygnus.com>

	* support.h: Undo previous change to SIGTRAP
	and SIGQUIT values.

Mon Dec 30 17:36:06 1996  Ian Lance Taylor  <ian@cygnus.com>

	* interp.c (store_word, load_word): New static functions.
	(mips16_entry): New static function.
	(SignalException): Look for mips16 entry and exit instructions.
	(simulate): Use the correct index when setting fpr_state after
	doing a pending move.

Sun Dec 29 09:37:18 1996  Mark Alexander  <marka@cygnus.com>

	* interp.c: Fix byte-swapping code throughout to work on
	both little- and big-endian hosts.

Sun Dec 29 09:18:32 1996  Mark Alexander  <marka@cygnus.com>

	* support.h: Make definitions of SIGTRAP and SIGQUIT consistent
	with gdb/config/i386/xm-windows.h.

Fri Dec 27 22:48:51 1996  Mark Alexander  <marka@cygnus.com>

	* gencode.c (build_instruction): Work around MSVC++ code gen bug
	that messes up arithmetic shifts.

Fri Dec 20 11:04:05 1996  Stu Grossman  (grossman@critters.cygnus.com)

	* support.h:  Use _WIN32 instead of __WIN32__.  Also add defs for
	SIGTRAP and SIGQUIT for _WIN32.

Thu Dec 19 14:07:27 1996  Ian Lance Taylor  <ian@cygnus.com>

	* gencode.c (build_instruction) [MUL]: Cast operands to word64, to
	force a 64 bit multiplication.
	(build_instruction) [OR]: In mips16 mode, don't do anything if the
	destination register is 0, since that is the default mips16 nop
	instruction.

Mon Dec 16 14:59:38 1996  Ian Lance Taylor  <ian@cygnus.com>

	* gencode.c (MIPS16_DECODE): SWRASP is I8, not RI.
	(build_endian_shift): Don't check proc64.
	(build_instruction): Always set memval to uword64.  Cast op2 to
	uword64 when shifting it left in memory instructions.  Always use
	the same code for stores--don't special case proc64.

	* gencode.c (build_mips16_operands): Fix base PC value for PC
	relative operands.
	(build_instruction): Call JALDELAYSLOT rather than DELAYSLOT for a
	jal instruction.
	* interp.c (simJALDELAYSLOT): Define.
 	(JALDELAYSLOT): Define.
	(INDELAYSLOT, INJALDELAYSLOT): Define.
	(simulate): Clear simJALDELAYSLOT when simDELAYSLOT is cleared.

Tue Dec 24 22:11:20 1996  Angela Marie Thomas (angela@cygnus.com)

	* interp.c (sim_open): add flush_cache as a PMON routine
	(sim_monitor): handle flush_cache by ignoring it

Wed Dec 11 13:53:51 1996  Jim Wilson  <wilson@cygnus.com>

	* gencode.c (build_instruction): Use !ByteSwapMem instead of
	BigEndianMem.
	* interp.c (CONFIG, config_EP_{mask,shift,D,DxxDxx, config_BE): Delete.
	(BigEndianMem): Rename to ByteSwapMem and change sense.
	(BigEndianCPU, sim_write, LoadMemory, StoreMemory): Change
	BigEndianMem references to !ByteSwapMem.
	(set_endianness): New function, with prototype.
	(sim_open): Call set_endianness.
	(sim_info): Use simBE instead of BigEndianMem.
	(xfer_direct_word, xfer_direct_long, swap_direct_word,
	swap_direct_long, xfer_big_word, xfer_big_long, xfer_little_word,
	xfer_little_long, swap_word, swap_long): Delete unnecessary MSC_VER
	ifdefs, keeping the prototype declaration.
	(swap_word): Rewrite correctly.
	(ColdReset): Delete references to CONFIG.  Delete endianness related
	code; moved to set_endianness.
	
Tue Dec 10 11:32:04 1996  Jim Wilson  <wilson@cygnus.com>

	* gencode.c (build_instruction, case JUMP): Truncate PC to 32 bits.
	* interp.c (CHECKHILO): Define away.
	(simSIGINT): New macro.
	(membank_size): Increase from 1MB to 2MB.
	(control_c): New function.
	(sim_resume): Rename parameter signal to signal_number.  Add local
	variable prev.  Call signal before and after simulate.
	(sim_stop_reason): Add simSIGINT support.
	(sim_warning, sim_error, dotrace, SignalException): Define as stdarg
	functions always.
	(sim_warning): Delete call to SignalException.  Do call printf_filtered
	if logfh is NULL.
	(AddressTranslation): Add #ifdef DEBUG around debugging message and
	a call to sim_warning.

Wed Nov 27 11:53:50 1996  Ian Lance Taylor  <ian@cygnus.com>

	* gencode.c (process_instructions): If ! proc64, skip DOUBLEWORD
	16 bit instructions.

Tue Nov 26 11:53:12 1996  Ian Lance Taylor  <ian@cygnus.com>

	Add support for mips16 (16 bit MIPS implementation):
	* gencode.c (inst_type): Add mips16 instruction encoding types.
	(GETDATASIZEINSN): Define.
	(MIPS_DECODE): Add REG flag to dsllv, dsrav, and dsrlv.  Add
	jalx.  Add LEFT flag to mfhi and mflo.  Add RIGHT flag to mthi and
	mtlo.
	(MIPS16_DECODE): New table, for mips16 instructions.
	(bitmap_val): New static function.
	(struct mips16_op): Define.
	(mips16_op_table): New table, for mips16 operands.
	(build_mips16_operands): New static function.
	(process_instructions): If PC is odd, decode a mips16
	instruction.  Break out instruction handling into new
	build_instruction function.
	(build_instruction): New static function, broken out of
	process_instructions.  Check modifiers rather than flags for SHIFT
	bit count and m[ft]{hi,lo} direction.
	(usage): Pass program name to fprintf.
	(main): Remove unused variable this_option_optind.  Change
	``*loptarg++'' to ``loptarg++''.
	(my_strtoul): Parenthesize && within ||.
	* interp.c (LoadMemory): Accept a halfword pAddr if vAddr is odd.
	(simulate): If PC is odd, fetch a 16 bit instruction, and
	increment PC by 2 rather than 4.
	* configure.in: Add case for mips16*-*-*.
	* configure: Rebuild.

Fri Nov 22 08:49:36 1996  Mark Alexander  <marka@cygnus.com>

	* interp.c: Allow -t to enable tracing in standalone simulator.
	Fix garbage output in trace file and error messages.

Wed Nov 20 01:54:37 1996  Doug Evans  <dje@canuck.cygnus.com>

	* Makefile.in: Delete stuff moved to ../common/Make-common.in.
	(SIM_{OBJS,EXTRA_CFLAGS,EXTRA_CLEAN}): Define.
	* configure.in: Simplify using macros in ../common/aclocal.m4.
	* configure: Regenerated.
	* tconfig.in: New file.

Tue Nov 12 13:34:00 1996  Dawn Perchik  <dawn@cygnus.com>

	* interp.c: Fix bugs in 64-bit port.
	Use ansi function declarations for msvc compiler.
	Initialize and test file pointer in trace code.
	Prevent duplicate definition of LAST_EMED_REGNUM.

Tue Oct 15 11:07:06 1996  Mark Alexander  <marka@cygnus.com>

	* interp.c (xfer_big_long): Prevent unwanted sign extension.

Thu Sep 26 17:35:00 1996  James G. Smith  <jsmith@cygnus.co.uk>

	* interp.c (SignalException): Check for explicit terminating
 	breakpoint value.
	* gencode.c: Pass instruction value through SignalException()
 	calls for Trap, Breakpoint and Syscall.

Thu Sep 26 11:35:17 1996  James G. Smith  <jsmith@cygnus.co.uk>

	* interp.c (SquareRoot): Add HAVE_SQRT check to ensure sqrt() is
 	only used on those hosts that provide it.
	* configure.in: Add sqrt() to list of functions to be checked for.
	* config.in: Re-generated.
	* configure: Re-generated.

Fri Sep 20 15:47:12 1996  Ian Lance Taylor  <ian@cygnus.com>

	* gencode.c (process_instructions): Call build_endian_shift when
	expanding STORE RIGHT, to fix swr.
	* support.h (SIGNEXTEND): If the sign bit is not set, explicitly
	clear the high bits.
	* interp.c (Convert): Fix fmt_single to fmt_long to not truncate.
	Fix float to int conversions to produce signed values.

Thu Sep 19 15:34:17 1996  Ian Lance Taylor  <ian@cygnus.com>

	* gencode.c (MIPS_DECODE): Set UNSIGNED for multu instruction.
	(process_instructions): Correct handling of nor instruction.
	Correct shift count for 32 bit shift instructions. Correct sign
	extension for arithmetic shifts to not shift the number of bits in
	the type.  Fix 64 bit multiply high word calculation.  Fix 32 bit
	unsigned multiply.  Fix ldxc1 and friends to use coprocessor 1.
	Fix madd.
	* interp.c (CHECKHILO): Don't set HIACCESS, LOACCESS, or HLPC.
	It's OK to have a mult follow a mult.  What's not OK is to have a
	mult follow an mfhi.
	(Convert): Comment out incorrect rounding code.

Mon Sep 16 11:38:16 1996  James G. Smith  <jsmith@cygnus.co.uk>

	* interp.c (sim_monitor): Improved monitor printf
 	simulation. Tidied up simulator warnings, and added "--log" option
 	for directing warning message output.
	* gencode.c: Use sim_warning() rather than WARNING macro.

Thu Aug 22 15:03:12 1996  Ian Lance Taylor  <ian@cygnus.com>

	* Makefile.in (gencode): Depend upon gencode.o, getopt.o, and
	getopt1.o, rather than on gencode.c.  Link objects together.
	Don't link against -liberty.
	(gencode.o, getopt.o, getopt1.o): New targets.
	* gencode.c: Include <ctype.h> and "ansidecl.h".
	(AND): Undefine after including "ansidecl.h".
	(ULONG_MAX): Define if not defined.
	(OP_*): Don't define macros; now defined in opcode/mips.h.
	(main): Call my_strtoul rather than strtoul.
	(my_strtoul): New static function.

Wed Jul 17 18:12:38 1996  Stu Grossman  (grossman@critters.cygnus.com)

	* gencode.c (process_instructions):  Generate word64 and uword64
	instead of `long long' and `unsigned long long' data types.
	* interp.c:  #include sysdep.h to get signals, and define default
	for SIGBUS.
	* (Convert):  Work around for Visual-C++ compiler bug with type
	conversion.
	* support.h:  Make things compile under Visual-C++ by using
	__int64 instead of `long long'.  Change many refs to long long
	into word64/uword64 typedefs.

Wed Jun 26 12:24:55 1996  Jason Molenda  (crash@godzilla.cygnus.co.jp)

        * Makefile.in (bindir, libdir, datadir, mandir, infodir, includedir,
        INSTALL_PROGRAM, INSTALL_DATA): Use autoconf-set values.
        (docdir): Removed.
        * configure.in (AC_PREREQ): autoconf 2.5 or higher.
        (AC_PROG_INSTALL): Added.
	(AC_PROG_CC): Moved to before configure.host call.
        * configure: Rebuilt.
	
Wed Jun  5 08:28:13 1996  James G. Smith  <jsmith@cygnus.co.uk>

	* configure.in: Define @SIMCONF@ depending on mips target.
	* configure: Rebuild.
	* Makefile.in (run): Add @SIMCONF@ to control simulator
 	construction.
	* gencode.c: Change LOADDRMASK to 64bit memory model only.
	* interp.c: Remove some debugging, provide more detailed error
 	messages, update memory accesses to use LOADDRMASK.
	
Mon Jun  3 11:55:03 1996  Ian Lance Taylor  <ian@cygnus.com>

	* configure.in: Add calls to AC_CONFIG_HEADER, AC_CHECK_HEADERS,
	AC_CHECK_LIB, and AC_CHECK_FUNCS.  Change AC_OUTPUT to set
	stamp-h.
	* configure: Rebuild.
	* config.in: New file, generated by autoheader.
	* interp.c: Include "config.h".  Include <stdlib.h>, <string.h>,
	and <strings.h> if they exist.  Replace #ifdef sun with #ifdef
	HAVE_ANINT and HAVE_AINT, as appropriate.
	* Makefile.in (run): Use @LIBS@ rather than -lm.
	(interp.o): Depend upon config.h.
	(Makefile): Just rebuild Makefile.
	(clean): Remove stamp-h.
	(mostlyclean): Make the same as clean, not as distclean.
	(config.h, stamp-h): New targets.

Fri May 10 00:41:17 1996  James G. Smith  <jsmith@cygnus.co.uk>

	* interp.c (ColdReset): Fix boolean test. Make all simulator
 	globals static.

Wed May  8 15:12:58 1996  James G. Smith  <jsmith@cygnus.co.uk>

	* interp.c (xfer_direct_word, xfer_direct_long,
	swap_direct_word, swap_direct_long, xfer_big_word,
	xfer_big_long, xfer_little_word, xfer_little_long,
	swap_word,swap_long): Added.
	* interp.c (ColdReset): Provide function indirection to
 	host<->simulated_target transfer routines.
	* interp.c (sim_store_register, sim_fetch_register): Updated to
 	make use of indirected transfer routines.

Fri Apr 19 15:48:24 1996  James G. Smith  <jsmith@cygnus.co.uk>

	* gencode.c (process_instructions): Ensure FP ABS instruction
 	recognised.
	* interp.c (AbsoluteValue): Add routine. Also provide simple PMON
 	system call support.

Wed Apr 10 09:51:38 1996  James G. Smith  <jsmith@cygnus.co.uk>

	* interp.c (sim_do_command): Complain if callback structure not
 	initialised.

Thu Mar 28 13:50:51 1996  James G. Smith  <jsmith@cygnus.co.uk>

	* interp.c (Convert): Provide round-to-nearest and round-to-zero
 	support for Sun hosts.
	* Makefile.in (gencode): Ensure the host compiler and libraries
 	used for cross-hosted build.

Wed Mar 27 14:42:12 1996  James G. Smith  <jsmith@cygnus.co.uk>

	* interp.c, gencode.c: Some more (TODO) tidying.

Thu Mar  7 11:19:33 1996  James G. Smith  <jsmith@cygnus.co.uk>

	* gencode.c, interp.c: Replaced explicit long long references with
 	WORD64HI, WORD64LO, SET64HI and SET64LO macro calls.
	* support.h (SET64LO, SET64HI): Macros added.

Wed Feb 21 12:16:21 1996  Ian Lance Taylor  <ian@cygnus.com>

	* configure: Regenerate with autoconf 2.7.

Tue Jan 30 08:48:18 1996  Fred Fish  <fnf@cygnus.com>

	* interp.c (LoadMemory): Enclose text following #endif in /* */.
	* support.h: Remove superfluous "1" from #if.
	* support.h (CHECKSIM): Remove stray 'a' at end of line.

Mon Dec  4 11:44:40 1995  Jamie Smith  <jsmith@cygnus.com>

	* interp.c (StoreFPR): Control UndefinedResult() call on
 	WARN_RESULT manifest.

Fri Dec  1 16:37:19 1995  James G. Smith  <jsmith@cygnus.co.uk>

	* gencode.c: Tidied instruction decoding, and added FP instruction
 	support.

	* interp.c: Added dineroIII, and BSD profiling support. Also
 	run-time FP handling.

Sun Oct 22 00:57:18 1995  James G. Smith  <jsmith@pasanda.cygnus.co.uk>

	* Changelog, Makefile.in, README.Cygnus, configure, configure.in,
 	gencode.c, interp.c, support.h: created.