blob: b6f03d7a257a44509bd35a63a7fbe65768ee1456 (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
|
/* M32R target configuration file. -*- C -*- */
/* Define this if the simulator can vary the size of memory.
See the xxx simulator for an example.
This enables the `-m size' option.
The memory size is stored in STATE_MEM_SIZE. */
/* Not used for M32R since we use the memory module. */
/* #define SIM_HAVE_MEM_SIZE */
/* For MSPR support. FIXME: revisit. */
#define WITH_DEVICES 1
/* The semantic code should probably always use a switch().
However, in case that's not possible in some circumstance, we allow
the target to choose. Perhaps this can be autoconf'd on whether the
switch is too big? I can't (yet) think of a reason for allowing the
user to choose, though the developer may certainly wish to. */
#ifdef WANT_CPU_M32R
#define WITH_FAST 1
#define WITH_SEM_SWITCH_FULL 0
#define WITH_SEM_SWITCH_FAST 1
#endif
#ifdef WANT_CPU_M32RX
#define HAVE_PARALLEL_EXEC
#define WITH_FAST 0
#define WITH_SEM_SWITCH_FULL 1
#define WITH_SEM_SWITCH_FAST 0
/* The m32rx currently never uses the scache. So hardcode this off. */
#undef WITH_SCACHE
#define WITH_SCACHE 0
#endif
/* ??? Temporary hack until model support unified. */
#define SIM_HAVE_MODEL
|
