blob: 72a7f6833835a551493129239e8d0cdc1c09ed6a (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
|
/* M32R target configuration file. -*- C -*- */
#ifndef M32R_TCONFIG_H
#define M32R_TCONFIG_H
/* See sim-hload.c. We properly handle LMA. */
#define SIM_HANDLES_LMA 1
/* For MSPR support. FIXME: revisit. */
#define WITH_DEVICES 1
/* This is a global setting. Different cpu families can't mix-n-match -scache
and -pbb. However some cpu families may use -simple while others use
one of -scache/-pbb. */
#define WITH_SCACHE_PBB 1
#endif /* M32R_TCONFIG_H */
|