1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
|
# Simulator main loop for m32rx. -*- C -*-
# Copyright (C) 1996, 1997, 1998 Free Software Foundation, Inc.
#
# This file is part of the GNU Simulators.
#
# This program is free software; you can redistribute it and/or modify
# it under the terms of the GNU General Public License as published by
# the Free Software Foundation; either version 2, or (at your option)
# any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License along
# with this program; if not, write to the Free Software Foundation, Inc.,
# 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
# Syntax:
# /bin/sh mainloop.in init|support|{full,fast}-{extract,exec}-{scache,noscache}
# ??? After a few more ports are done, revisit.
# Will eventually need to machine generate a lot of this.
case "x$1" in
xsupport)
cat <<EOF
EOF
;;
xinit)
cat <<EOF
const IDESC *d1,*d2;
ARGBUF abufs[MAX_PARALLEL_INSNS];
PAREXEC pbufs[MAX_PARALLEL_INSNS];
EOF
;;
xfull-extract-* | xfast-extract-*)
cat <<EOF
{
PCADDR pc = CPU (h_pc);
/* ??? This code isn't very fast. Let's get it working first. */
if ((pc & 3) != 0)
{
USI insn = GETIMEMUHI (current_cpu, pc);
insn &= 0x7fff;
d1 = m32rx_decode (current_cpu, pc, insn);
abufs[0].insn = insn;
abufs[0].idesc = d1;
icount = 1;
}
else
{
USI insn = GETIMEMUSI (current_cpu, pc);
if ((SI) insn < 0)
{
d1 = m32rx_decode (current_cpu, pc, insn >> 16);
abufs[0].insn = insn;
abufs[0].idesc = d1;
icount = 1;
}
else
{
if (insn & 0x8000)
{
d1 = m32rx_decode (current_cpu, pc, insn >> 16);
abufs[0].insn = insn >> 16;
abufs[0].idesc = d1;
d2 = m32rx_decode (current_cpu, pc, insn & 0x7fff);
abufs[1].insn = insn & 0x7fff;
abufs[1].idesc = d2;
icount = 2;
}
else
{
d1 = m32rx_decode (current_cpu, pc, insn >> 16);
abufs[0].insn = insn >> 16;
abufs[0].idesc = d1;
icount = 1;
}
}
}
{
int icount2 = icount;
USI insn = abufs[0].insn;
const IDESC *decode = d1;
/* decode, par_exec, and insn are refered to by readx.c. */
PAREXEC *par_exec = &pbufs[0];
do
{
#define DEFINE_SWITCH
#include "readx.c"
decode = d2;
insn = abufs[1].insn;
++par_exec;
}
while (--icount2 != 0);
}
}
EOF
;;
xfull-exec-* | xfast-exec-*)
cat <<EOF
{
SEM_ARG sem_arg = &abufs[0];
PAREXEC *par_exec = &pbufs[0];
PCADDR new_pc;
#if 0 /* wip */
/* If doing parallel execution, verify insns are in the right pipeline. */
if (icount == 2)
{
...
}
#endif
TRACE_INSN_INIT (current_cpu, 1);
TRACE_INSN (current_cpu, d1->opcode, sem_arg, CPU (h_pc));
new_pc = (*d1->sem_full) (current_cpu, sem_arg, par_exec);
TRACE_INSN_FINI (current_cpu, icount == 1);
/* The result of the semantic fn is one of:
- next address, branch only
- NEW_PC_SKIP, sc/snc insn
- NEW_PC_2, 2 byte non-branch non-sc/snc insn
- NEW_PC_4, 4 byte non-branch insn
*/
/* The tests are ordered to try to favor the more frequent cases, while
keeping the over all costs down. */
if (new_pc == NEW_PC_4)
CPU (h_pc) += 4;
else if (icount == 2)
{
/* Note that we only get here if doing parallel execution. */
if (new_pc == NEW_PC_SKIP)
{
/* ??? Need generic notion of bypassing an insn for the name of
this macro. Annulled? On the otherhand such tracing can go
in the sc/snc semantic fn. */
; /*TRACE_INSN_SKIPPED (current_cpu);*/
CPU (h_pc) += 4;
}
else
{
PCADDR pc2;
++sem_arg;
++par_exec;
TRACE_INSN_INIT (current_cpu, 0);
TRACE_INSN (current_cpu, d2->opcode, sem_arg, CPU (h_pc) + 2);
/* pc2 isn't used. It's assigned a value for debugging. */
pc2 = (*d2->sem_full) (current_cpu, sem_arg, par_exec);
TRACE_INSN_FINI (current_cpu, 1);
if (NEW_PC_BRANCH_P (new_pc))
CPU (h_pc) = new_pc;
else
CPU (h_pc) += 4;
}
}
else if (NEW_PC_BRANCH_P (new_pc))
CPU (h_pc) = new_pc;
else
CPU (h_pc) += 2;
}
EOF
;;
*)
echo "Invalid argument to mainloop.in: $1" >&2
exit 1
;;
esac
|
