1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
|
/* Handle cache related addresses.
Copyright (C) 1996-2021 Free Software Foundation, Inc.
Contributed by Cygnus Solutions and Mike Frysinger.
This file is part of the GNU simulators.
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program. If not, see <http://www.gnu.org/licenses/>. */
/* This must come before any other includes. */
#include "defs.h"
#include "sim-main.h"
#include "hw-main.h"
#include "dv-m32r_cache.h"
struct m32r_cache_hw
{
};
static unsigned
cris_io_write_buffer (struct hw *me, const void *source,
int space, address_word addr, unsigned nr_bytes)
{
SIM_DESC sd = hw_system (me);
#if WITH_SCACHE
/* MSPR support is deprecated but is kept in for upward compatibility
with existing overlay support. */
switch (addr)
{
case MSPR_ADDR:
if ((*(const char *) source & MSPR_PURGE) != 0)
scache_flush (sd);
break;
case MCCR_ADDR:
if ((*(const char *) source & MCCR_CP) != 0)
scache_flush (sd);
break;
}
#endif
return nr_bytes;
}
static void
attach_regs (struct hw *me, struct m32r_cache_hw *hw)
{
address_word attach_address;
int attach_space;
unsigned attach_size;
reg_property_spec reg;
if (hw_find_property (me, "reg") == NULL)
hw_abort (me, "Missing \"reg\" property");
if (!hw_find_reg_array_property (me, "reg", 0, ®))
hw_abort (me, "\"reg\" property must contain three addr/size entries");
hw_unit_address_to_attach_address (hw_parent (me),
®.address,
&attach_space, &attach_address, me);
hw_unit_size_to_attach_size (hw_parent (me), ®.size, &attach_size, me);
hw_attach_address (hw_parent (me),
0, attach_space, attach_address, attach_size, me);
}
static void
m32r_cache_finish (struct hw *me)
{
struct m32r_cache_hw *hw;
hw = HW_ZALLOC (me, struct m32r_cache_hw);
set_hw_data (me, hw);
set_hw_io_write_buffer (me, cris_io_write_buffer);
attach_regs (me, hw);
}
const struct hw_descriptor dv_m32r_cache_descriptor[] = {
{ "m32r_cache", m32r_cache_finish, },
{ NULL },
};
|
