1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
|
/* Misc. support for CPU family m32rbf.
THIS FILE IS MACHINE GENERATED WITH CGEN.
Copyright 1996-2009 Free Software Foundation, Inc.
This file is part of the GNU simulators.
This file is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3, or (at your option)
any later version.
It is distributed in the hope that it will be useful, but WITHOUT
ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
License for more details.
You should have received a copy of the GNU General Public License along
with this program; if not, write to the Free Software Foundation, Inc.,
51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.
*/
#define WANT_CPU m32rbf
#define WANT_CPU_M32RBF
#include "sim-main.h"
#include "cgen-ops.h"
/* Get the value of h-pc. */
USI
m32rbf_h_pc_get (SIM_CPU *current_cpu)
{
return CPU (h_pc);
}
/* Set a value for h-pc. */
void
m32rbf_h_pc_set (SIM_CPU *current_cpu, USI newval)
{
CPU (h_pc) = newval;
}
/* Get the value of h-gr. */
SI
m32rbf_h_gr_get (SIM_CPU *current_cpu, UINT regno)
{
return CPU (h_gr[regno]);
}
/* Set a value for h-gr. */
void
m32rbf_h_gr_set (SIM_CPU *current_cpu, UINT regno, SI newval)
{
CPU (h_gr[regno]) = newval;
}
/* Get the value of h-cr. */
USI
m32rbf_h_cr_get (SIM_CPU *current_cpu, UINT regno)
{
return GET_H_CR (regno);
}
/* Set a value for h-cr. */
void
m32rbf_h_cr_set (SIM_CPU *current_cpu, UINT regno, USI newval)
{
SET_H_CR (regno, newval);
}
/* Get the value of h-accum. */
DI
m32rbf_h_accum_get (SIM_CPU *current_cpu)
{
return GET_H_ACCUM ();
}
/* Set a value for h-accum. */
void
m32rbf_h_accum_set (SIM_CPU *current_cpu, DI newval)
{
SET_H_ACCUM (newval);
}
/* Get the value of h-cond. */
BI
m32rbf_h_cond_get (SIM_CPU *current_cpu)
{
return CPU (h_cond);
}
/* Set a value for h-cond. */
void
m32rbf_h_cond_set (SIM_CPU *current_cpu, BI newval)
{
CPU (h_cond) = newval;
}
/* Get the value of h-psw. */
UQI
m32rbf_h_psw_get (SIM_CPU *current_cpu)
{
return GET_H_PSW ();
}
/* Set a value for h-psw. */
void
m32rbf_h_psw_set (SIM_CPU *current_cpu, UQI newval)
{
SET_H_PSW (newval);
}
/* Get the value of h-bpsw. */
UQI
m32rbf_h_bpsw_get (SIM_CPU *current_cpu)
{
return CPU (h_bpsw);
}
/* Set a value for h-bpsw. */
void
m32rbf_h_bpsw_set (SIM_CPU *current_cpu, UQI newval)
{
CPU (h_bpsw) = newval;
}
/* Get the value of h-bbpsw. */
UQI
m32rbf_h_bbpsw_get (SIM_CPU *current_cpu)
{
return CPU (h_bbpsw);
}
/* Set a value for h-bbpsw. */
void
m32rbf_h_bbpsw_set (SIM_CPU *current_cpu, UQI newval)
{
CPU (h_bbpsw) = newval;
}
/* Get the value of h-lock. */
BI
m32rbf_h_lock_get (SIM_CPU *current_cpu)
{
return CPU (h_lock);
}
/* Set a value for h-lock. */
void
m32rbf_h_lock_set (SIM_CPU *current_cpu, BI newval)
{
CPU (h_lock) = newval;
}
/* Record trace results for INSN. */
void
m32rbf_record_trace_results (SIM_CPU *current_cpu, CGEN_INSN *insn,
int *indices, TRACE_RECORD *tr)
{
}
|
