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# Makefile template for Configure for the m32r simulator
# Copyright (C) 1996, 1997, 1998, 1999, 2000 Free Software Foundation, Inc.
# Contributed by Cygnus Support.
#
# This file is part of GDB, the GNU debugger.
#
# This program is free software; you can redistribute it and/or modify
# it under the terms of the GNU General Public License as published by
# the Free Software Foundation; either version 2 of the License, or
# (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License along
# with this program; if not, write to the Free Software Foundation, Inc.,
# 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
## COMMON_PRE_CONFIG_FRAG
M32R_OBJS = m32r.o cpu.o decode.o sem.o model.o mloop.o
M32RX_OBJS = m32rx.o cpux.o decodex.o modelx.o mloopx.o
CONFIG_DEVICES = dv-sockser.o
CONFIG_DEVICES =
SIM_OBJS = \
$(SIM_NEW_COMMON_OBJS) \
sim-cpu.o \
sim-hload.o \
sim-hrw.o \
sim-model.o \
sim-reg.o \
cgen-utils.o cgen-trace.o cgen-scache.o \
cgen-run.o sim-reason.o sim-engine.o sim-stop.o \
sim-if.o arch.o \
$(M32R_OBJS) \
$(M32RX_OBJS) \
traps.o devices.o \
$(CONFIG_DEVICES)
# Extra headers included by sim-main.h.
SIM_EXTRA_DEPS = \
$(CGEN_INCLUDE_DEPS) \
arch.h cpuall.h m32r-sim.h $(srcdir)/../../opcodes/m32r-desc.h
SIM_EXTRA_CFLAGS =
SIM_RUN_OBJS = nrun.o
SIM_EXTRA_CLEAN = m32r-clean
# This selects the m32r newlib/libgloss syscall definitions.
NL_TARGET = -DNL_TARGET_m32r
## COMMON_POST_CONFIG_FRAG
arch = m32r
sim-if.o: sim-if.c $(SIM_MAIN_DEPS) $(srcdir)/../common/sim-core.h
arch.o: arch.c $(SIM_MAIN_DEPS)
traps.o: traps.c targ-vals.h $(SIM_MAIN_DEPS)
devices.o: devices.c $(SIM_MAIN_DEPS)
# M32R objs
M32RBF_INCLUDE_DEPS = \
$(CGEN_MAIN_CPU_DEPS) \
cpu.h decode.h eng.h
m32r.o: m32r.c $(M32RBF_INCLUDE_DEPS)
# FIXME: Use of `mono' is wip.
mloop.c eng.h: stamp-mloop
stamp-mloop: $(srcdir)/../common/genmloop.sh mloop.in Makefile
$(SHELL) $(srccom)/genmloop.sh \
-mono -fast -pbb -switch sem-switch.c \
-cpu m32rbf -infile $(srcdir)/mloop.in
$(SHELL) $(srcroot)/move-if-change eng.hin eng.h
$(SHELL) $(srcroot)/move-if-change mloop.cin mloop.c
touch stamp-mloop
mloop.o: mloop.c sem-switch.c $(M32RBF_INCLUDE_DEPS)
cpu.o: cpu.c $(M32RBF_INCLUDE_DEPS)
decode.o: decode.c $(M32RBF_INCLUDE_DEPS)
sem.o: sem.c $(M32RBF_INCLUDE_DEPS)
model.o: model.c $(M32RBF_INCLUDE_DEPS)
# M32RX objs
M32RXF_INCLUDE_DEPS = \
$(CGEN_MAIN_CPU_DEPS) \
cpux.h decodex.h engx.h
m32rx.o: m32rx.c $(M32RXF_INCLUDE_DEPS)
# FIXME: Use of `mono' is wip.
mloopx.c engx.h: stamp-xmloop
stamp-xmloop: $(srcdir)/../common/genmloop.sh mloopx.in Makefile
$(SHELL) $(srccom)/genmloop.sh \
-mono -no-fast -pbb -parallel-write -switch semx-switch.c \
-cpu m32rxf -infile $(srcdir)/mloopx.in
$(SHELL) $(srcroot)/move-if-change eng.hin engx.h
$(SHELL) $(srcroot)/move-if-change mloop.cin mloopx.c
touch stamp-xmloop
mloopx.o: mloopx.c semx-switch.c $(M32RXF_INCLUDE_DEPS)
cpux.o: cpux.c $(M32RXF_INCLUDE_DEPS)
decodex.o: decodex.c $(M32RXF_INCLUDE_DEPS)
semx.o: semx.c $(M32RXF_INCLUDE_DEPS)
modelx.o: modelx.c $(M32RXF_INCLUDE_DEPS)
m32r-clean:
rm -f mloop.c eng.h stamp-mloop
rm -f mloopx.c engx.h stamp-xmloop
rm -f stamp-arch stamp-cpu stamp-xcpu
rm -f tmp-*
# cgen support, enable with --enable-cgen-maint
CGEN_MAINT = ; @true
# The following line is commented in or out depending upon --enable-cgen-maint.
@CGEN_MAINT@CGEN_MAINT =
stamp-arch: $(CGEN_READ_SCM) $(CGEN_ARCH_SCM) $(srccgen)/m32r.cpu
$(MAKE) cgen-arch $(CGEN_FLAGS_TO_PASS) mach=all \
FLAGS="with-scache with-profile=fn"
touch stamp-arch
arch.h arch.c cpuall.h: $(CGEN_MAINT) stamp-arch
stamp-cpu: $(CGEN_READ_SCM) $(CGEN_CPU_SCM) $(CGEN_DECODE_SCM) $(srccgen)/m32r.cpu
$(MAKE) cgen-cpu-decode $(CGEN_FLAGS_TO_PASS) \
cpu=m32rbf mach=m32r SUFFIX= \
FLAGS="with-scache with-profile=fn" \
EXTRAFILES="$(CGEN_CPU_SEM) $(CGEN_CPU_SEMSW)"
touch stamp-cpu
cpu.h sem.c sem-switch.c model.c decode.c decode.h: $(CGEN_MAINT) stamp-cpu
stamp-xcpu: $(CGEN_READ_SCM) $(CGEN_CPU_SCM) $(CGEN_DECODE_SCM) $(srccgen)/m32r.cpu
$(MAKE) cgen-cpu-decode $(CGEN_FLAGS_TO_PASS) \
cpu=m32rxf mach=m32rx SUFFIX=x FLAGS="with-scache with-profile=fn" EXTRAFILES="$(CGEN_CPU_SEMSW)"
touch stamp-xcpu
cpux.h semx-switch.c modelx.c decodex.c decodex.h: $(CGEN_MAINT) stamp-xcpu
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