1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
|
# Makefile template for Configure for the frv simulator
# Copyright (C) 1998, 1999, 2000, 2001 Free Software Foundation, Inc.
# Contributed by Red Hat.
#
# This program is free software; you can redistribute it and/or modify
# it under the terms of the GNU General Public License as published by
# the Free Software Foundation; either version 2 of the License, or
# (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License along
# with this program; if not, write to the Free Software Foundation, Inc.,
# 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
## COMMON_PRE_CONFIG_FRAG
FRV_OBJS = frv.o cpu.o decode.o sem.o model.o mloop.o cgen-par.o
CONFIG_DEVICES = dv-sockser.o
CONFIG_DEVICES =
SIM_OBJS = \
$(SIM_NEW_COMMON_OBJS) \
sim-cpu.o \
sim-hload.o \
sim-hrw.o \
sim-model.o \
sim-reg.o \
cgen-utils.o cgen-trace.o cgen-scache.o cgen-fpu.o cgen-accfp.o \
cgen-run.o sim-reason.o sim-engine.o sim-stop.o \
sim-if.o arch.o \
$(FRV_OBJS) \
traps.o interrupts.o memory.o cache.o pipeline.o \
profile.o profile-fr400.o profile-fr500.o options.o \
devices.o reset.o registers.o \
$(CONFIG_DEVICES)
# Extra headers included by sim-main.h.
SIM_EXTRA_DEPS = \
$(CGEN_INCLUDE_DEPS) \
arch.h cpuall.h frv-sim.h $(srcdir)/../../opcodes/frv-desc.h cache.h \
registers.h profile.h \
$(sim-options_h)
SIM_EXTRA_CFLAGS = @sim_trapdump@
SIM_RUN_OBJS = nrun.o
SIM_EXTRA_CLEAN = frv-clean
# This selects the frv newlib/libgloss syscall definitions.
NL_TARGET = -DNL_TARGET_frv
## COMMON_POST_CONFIG_FRAG
arch = frv
arch.o: arch.c $(SIM_MAIN_DEPS)
devices.o: devices.c $(SIM_MAIN_DEPS)
# FRV objs
FRVBF_INCLUDE_DEPS = \
$(CGEN_MAIN_CPU_DEPS) \
$(SIM_EXTRA_DEPS) \
cpu.h decode.h eng.h
frv.o: frv.c $(FRVBF_INCLUDE_DEPS)
traps.o: traps.c $(FRVBF_INCLUDE_DEPS)
pipeline.o: pipeline.c $(FRVBF_INCLUDE_DEPS)
interrupts.o: interrupts.c $(FRVBF_INCLUDE_DEPS)
memory.o: memory.c $(FRVBF_INCLUDE_DEPS)
cache.o: cache.c $(FRVBF_INCLUDE_DEPS)
options.o: options.c $(FRVBF_INCLUDE_DEPS)
reset.o: reset.c $(FRVBF_INCLUDE_DEPS)
registers.o: registers.c $(FRVBF_INCLUDE_DEPS)
profile.o: profile.c profile-fr400.h profile-fr500.h $(FRVBF_INCLUDE_DEPS)
profile-fr400.o: profile-fr400.c profile-fr400.h $(FRVBF_INCLUDE_DEPS)
profile-fr500.o: profile-fr500.c profile-fr500.h $(FRVBF_INCLUDE_DEPS)
sim-if.o: sim-if.c $(FRVBF_INCLUDE_DEPS) $(srcdir)/../common/sim-core.h eng.h
# FIXME: Use of `mono' is wip.
mloop.c eng.h: stamp-mloop
stamp-mloop: $(srcdir)/../common/genmloop.sh mloop.in Makefile
$(SHELL) $(srccom)/genmloop.sh \
-mono -scache -parallel-generic-write -parallel-only \
-cpu frvbf -infile $(srcdir)/mloop.in
$(SHELL) $(srcroot)/move-if-change eng.hin eng.h
$(SHELL) $(srcroot)/move-if-change mloop.cin mloop.c
touch stamp-mloop
mloop.o: mloop.c $(FRVBF_INCLUDE_DEPS)
cpu.o: cpu.c $(FRVBF_INCLUDE_DEPS)
decode.o: decode.c $(FRVBF_INCLUDE_DEPS)
sem.o: sem.c $(FRVBF_INCLUDE_DEPS)
model.o: model.c $(FRVBF_INCLUDE_DEPS)
frv-clean:
rm -f mloop.c eng.h stamp-mloop
rm -f tmp-*
rm -f stamp-arch stamp-cpu
# cgen support, enable with --enable-cgen-maint
CGEN_MAINT = ; @true
# The following line is commented in or out depending upon --enable-cgen-maint.
@CGEN_MAINT@CGEN_MAINT =
stamp-arch: $(CGEN_READ_SCM) $(CGEN_ARCH_SCM) $(srcdir)/../../cpu/frv.cpu
cp -fp $(srcdir)/../../cpu/frv.cpu $(CGEN_CPU_DIR)/frv.cpu
$(MAKE) cgen-arch $(CGEN_FLAGS_TO_PASS) mach=all \
FLAGS="with-scache"
rm -f $(CGEN_CPU_DIR)/frv.cpu
touch stamp-arch
arch.h arch.c cpuall.h: $(CGEN_MAINT) stamp-arch
# @true
# .cpu and .opc files for frv are kept in a different directory, but cgen has no switch to specify that location, so
# copy those file to the regular place.
stamp-cpu: $(CGEN_READ_SCM) $(CGEN_CPU_SCM) $(CGEN_DECODE_SCM) $(srcdir)/../../cpu/frv.cpu
cp -fp $(srcdir)/../../cpu/frv.cpu $(CGEN_CPU_DIR)/frv.cpu
$(MAKE) cgen-cpu-decode $(CGEN_FLAGS_TO_PASS) \
cpu=frvbf mach=frv,fr500,fr400,tomcat,simple SUFFIX= \
FLAGS="with-scache with-profile=fn with-generic-write with-parallel-only" \
EXTRAFILES="$(CGEN_CPU_SEM)"
rm -f $(CGEN_CPU_DIR)/frv.cpu
touch stamp-cpu
cpu.h sem.c model.c decode.c decode.h: $(CGEN_MAINT) stamp-cpu
# @true
|
