blob: 5f201060f1c1a90f4267b7ef6b9c93575a84e10b (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
|
dnl Note that this file is intended to be included at the m4 level and not
dnl the shell level, so use sinclude(...) to pull it in.
# WHEN ADDING ENTRIES TO THIS MATRIX:
# Make sure that the left side always has two dashes. Otherwise you
# can get spurious matches. Even for unambiguous cases, do this as a
# convention, else the table becomes a real mess to understand and
# maintain.
dnl glue to avoid code duplication at top level
m4_ifndef([SIM_ARCH], [AC_DEFUN([SIM_ARCH],[sim_arch=$1])])
sim_igen=no
sim_arch=
case "${target}" in
aarch64*-*-*)
SIM_ARCH(aarch64)
;;
arm*-*-*)
SIM_ARCH(arm)
;;
avr*-*-*)
SIM_ARCH(avr)
;;
bfin-*-*)
SIM_ARCH(bfin)
;;
bpf-*-*)
SIM_ARCH(bpf)
;;
cr16*-*-*)
SIM_ARCH(cr16)
;;
cris-*-* | crisv32-*-*)
SIM_ARCH(cris)
;;
d10v-*-*)
SIM_ARCH(d10v)
;;
frv-*-*)
SIM_ARCH(frv)
;;
h8300*-*-*)
SIM_ARCH(h8300)
;;
iq2000-*-*)
SIM_ARCH(iq2000)
;;
lm32-*-*)
SIM_ARCH(lm32)
;;
m32c-*-*)
SIM_ARCH(m32c)
;;
m32r-*-*)
SIM_ARCH(m32r)
;;
m68hc11-*-*|m6811-*-*)
SIM_ARCH(m68hc11)
;;
mcore-*-*)
SIM_ARCH(mcore)
;;
microblaze-*-*)
SIM_ARCH(microblaze)
;;
mips*-*-*)
SIM_ARCH(mips)
sim_igen=yes
;;
mn10300*-*-*)
SIM_ARCH(mn10300)
sim_igen=yes
;;
moxie-*-*)
SIM_ARCH(moxie)
;;
msp430*-*-*)
SIM_ARCH(msp430)
;;
or1k-*-* | or1knd-*-*)
SIM_ARCH(or1k)
;;
pru*-*-*)
SIM_ARCH(pru)
;;
riscv*-*-*)
SIM_ARCH(riscv)
;;
rl78-*-*)
SIM_ARCH(rl78)
;;
rx-*-*)
SIM_ARCH(rx)
;;
sh*-*-*)
SIM_ARCH(sh)
;;
sparc-*-rtems*|sparc-*-elf*)
SIM_ARCH(erc32)
;;
powerpc*-*-*)
SIM_ARCH(ppc)
;;
ft32-*-*)
SIM_ARCH(ft32)
;;
v850*-*-*)
SIM_ARCH(v850)
sim_igen=yes
;;
esac
AC_SUBST(sim_arch)
|
