1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
|
2011-03-24 Mike Frysinger <vapier@gentoo.org>
* bfin-dis.c (decode_dsp32mac_0): Move MM zeroing down to MAC0 logic.
2011-03-22 Eric B. Weddington <eric.weddington@atmel.com>
* avr-dis.c (avr_operand): Add opcode_str parameter. Check for
post-increment to support LPM Z+ instruction. Add support for 'E'
constraint for DES instruction.
(print_insn_avr): Adjust calls to avr_operand. Rename variable.
2011-03-14 Richard Sandiford <richard.sandiford@linaro.org>
* arm-dis.c (get_sym_code_type): Treat STT_GNU_IFUNCs as code.
2011-03-14 Richard Sandiford <richard.sandiford@linaro.org>
* arm-dis.c (get_sym_code_type): Don't check for STT_ARM_TFUNC.
Use branch types instead.
(print_insn): Likewise.
2011-02-28 Maciej W. Rozycki <macro@codesourcery.com>
* mips-opc.c (mips_builtin_opcodes): Correct register use
annotation of "alnv.ps".
2011-02-28 Maciej W. Rozycki <macro@codesourcery.com>
* mips-opc.c (mips_builtin_opcodes): Add "pref" macro.
2011-02-22 Mike Frysinger <vapier@gentoo.org>
* bfin-dis.c (OUTS): Remove p NULL check and txt NUL check.
2011-02-22 Mike Frysinger <vapier@gentoo.org>
* bfin-dis.c (print_insn_bfin): Change outf->fprintf_func to OUTS.
2011-02-19 Mike Frysinger <vapier@gentoo.org>
* bfin-dis.c (saved_state): Mark static. Change a[01]x to ax[] and
a[01]w to aw[]. Delete ac0, ac0_copy, ac1, an, aq, av0, av0s, av1,
av1s, az, cc, v, v_copy, vs, rnd_mod, v_internal, pc, ticks, insts,
exception, end_of_registers, msize, memory, bfd_mach.
(CCREG, PCREG, A0XREG, A0WREG, A1XREG, A1WREG, LC0REG, LT0REG,
LB0REG, LC1REG, LT1REG, LB1REG): Delete
(AXREG, AWREG, LCREG, LTREG, LBREG): Define.
(get_allreg): Change to new defines. Fallback to abort().
2011-02-14 Mike Frysinger <vapier@gentoo.org>
* bfin-dis.c: Add whitespace/parenthesis where needed.
2011-02-14 Mike Frysinger <vapier@gentoo.org>
* bfin-dis.c (decode_LoopSetup_0): Return when reg is greater
than 7.
2011-02-13 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
* configure: Regenerate.
2011-02-13 Mike Frysinger <vapier@gentoo.org>
* bfin-dis.c (decode_dsp32alu_0): Fix typo with A1 reg.
2011-02-13 Mike Frysinger <vapier@gentoo.org>
* bfin-dis.c (decode_dsp32mult_0): Add 1 to dst for mac1. Output
dregs only when P is set, and dregs_lo otherwise.
2011-02-13 Mike Frysinger <vapier@gentoo.org>
* bfin-dis.c (decode_dsp32alu_0): Delete BYTEOP2M code.
2011-02-12 Mike Frysinger <vapier@gentoo.org>
* bfin-dis.c (decode_pseudoDEBUG_0): Add space after PRNT.
2011-02-12 Mike Frysinger <vapier@gentoo.org>
* bfin-dis.c (machine_registers): Delete REG_GP.
(reg_names): Delete "GP".
(decode_allregs): Change REG_GP to REG_LASTREG.
2011-02-12 Mike Frysinger <vapier@gentoo.org>
* bfin-dis.c (M_S2RND, M_T, M_W32, M_FU, M_TFU, M_IS, M_ISS2,
M_IH, M_IU): Delete.
2011-02-11 Mike Frysinger <vapier@gentoo.org>
* bfin-dis.c (reg_names): Add const.
(decode_dregs_lo, decode_dregs_hi, decode_dregs, decode_dregs_byte,
decode_pregs, decode_iregs, decode_mregs, decode_dpregs, decode_gregs,
decode_regs, decode_regs_lo, decode_regs_hi, decode_statbits,
decode_counters, decode_allregs): Likewise.
2011-02-09 Michael Snyder <msnyder@vmware.com>
* i386-dis.c (OP_J): Parenthesize expression to prevent
truncated addresses.
(print_insn): Fix indentation off-by-one.
2011-02-01 Nick Clifton <nickc@redhat.com>
* po/da.po: Updated Danish translation.
2011-01-21 Dave Murphy <davem@devkitpro.org>
* ppc-opc.c (NON32, NO371): Remove PPC_OPCODE_PPCPS.
2011-01-18 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (sIbT): New.
(b_T_mode): Likewise.
(dis386): Replace sIb with sIbT on "pushT".
(x86_64_table): Replace sIb with Ib on "aam" and "aad".
(OP_sI): Handle b_T_mode. Properly sign-extend byte.
2011-01-18 Jan Kratochvil <jan.kratochvil@redhat.com>
* i386-init.h: Regenerated.
* i386-tbl.h: Regenerated
2011-01-17 Quentin Neill <quentin.neill@amd.com>
* i386-dis.c (REG_XOP_TBM_01): New.
(REG_XOP_TBM_02): New.
(reg_table): Add REG_XOP_TBM_01 and REG_XOP_TBM_02 tables.
(xop_table): Redirect to REG_XOP_TBM_01 and REG_XOP_TBM_02
entries, and add bextr instruction.
* i386-gen.c (cpu_flag_init): Add CPU_TBM_FLAGS, CpuTBM.
(cpu_flags): Add CpuTBM.
* i386-opc.h (CpuTBM) New.
(i386_cpu_flags): Add bit cputbm.
* i386-opc.tbl: Add bextr, blcfill, blci, blcic, blcmsk,
blcs, blsfill, blsic, t1mskc, and tzmsk.
2011-01-12 DJ Delorie <dj@redhat.com>
* rx-dis.c (print_insn_rx): Support RX_Operand_TwoReg.
2011-01-11 Mingjie Xing <mingjie.xing@gmail.com>
* mips-dis.c (print_insn_args): Adjust the value to print the real
offset for "+c" argument.
2011-01-10 Nick Clifton <nickc@redhat.com>
* po/da.po: Updated Danish translation.
2011-01-05 Nathan Sidwell <nathan@codesourcery.com>
* arm-dis.c (thumb32_opcodes): BLX must have bit zero clear.
2011-01-04 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (REG_VEX_38F3): New.
(PREFIX_0FBC): Likewise.
(PREFIX_VEX_38F2): Likewise.
(PREFIX_VEX_38F3_REG_1): Likewise.
(PREFIX_VEX_38F3_REG_2): Likewise.
(PREFIX_VEX_38F3_REG_3): Likewise.
(PREFIX_VEX_38F7): Likewise.
(VEX_LEN_38F2_P_0): Likewise.
(VEX_LEN_38F3_R_1_P_0): Likewise.
(VEX_LEN_38F3_R_2_P_0): Likewise.
(VEX_LEN_38F3_R_3_P_0): Likewise.
(VEX_LEN_38F7_P_0): Likewise.
(dis386_twobyte): Use PREFIX_0FBC.
(reg_table): Add REG_VEX_38F3.
(prefix_table): Add PREFIX_0FBC, PREFIX_VEX_38F2,
PREFIX_VEX_38F3_REG_1, PREFIX_VEX_38F3_REG_2,
PREFIX_VEX_38F3_REG_3 and PREFIX_VEX_38F7.
(vex_table): Use PREFIX_VEX_38F2, REG_VEX_38F3 and
PREFIX_VEX_38F7.
(vex_len_table): Add VEX_LEN_38F2_P_0, VEX_LEN_38F3_R_1_P_0,
VEX_LEN_38F3_R_2_P_0, VEX_LEN_38F3_R_3_P_0 and
VEX_LEN_38F7_P_0.
* i386-gen.c (cpu_flag_init): Add CPU_BMI_FLAGS.
(cpu_flags): Add CpuBMI.
* i386-opc.h (CpuBMI): New.
(i386_cpu_flags): Add cpubmi.
* i386-opc.tbl: Add andn, bextr, blsi, blsmsk, blsr and tzcnt.
* i386-init.h: Regenerated.
* i386-tbl.h: Likewise.
2011-01-04 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (VexGdq): New.
(OP_VEX): Handle dq_mode.
2011-01-01 H.J. Lu <hongjiu.lu@intel.com>
* i386-gen.c (process_copyright): Update copyright to 2011.
For older changes see ChangeLog-2010
Local Variables:
mode: change-log
left-margin: 8
fill-column: 74
version-control: never
End:
|