1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
|
2015-04-15 H.J. Lu <hongjiu.lu@intel.com>
PR binutils/17898
* i386-dis.c (PREFIX_0FC7_REG_6): Renamed to ...
(PREFIX_MOD_0_0FC7_REG_6): This.
(PREFIX_MOD_3_0FC7_REG_6): New.
(PREFIX_MOD_3_0FC7_REG_7): Likewise.
(prefix_table): Replace PREFIX_0FC7_REG_6 with
PREFIX_MOD_0_0FC7_REG_6. Add PREFIX_MOD_3_0FC7_REG_6 and
PREFIX_MOD_3_0FC7_REG_7.
(mod_table): Replace PREFIX_0FC7_REG_6 with
PREFIX_MOD_0_0FC7_REG_6. Use PREFIX_MOD_3_0FC7_REG_6 and
PREFIX_MOD_3_0FC7_REG_7.
2015-04-15 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (PREFIX_MANDATORY_REPZ): Removed.
(PREFIX_MANDATORY_REPNZ): Likewise.
(PREFIX_MANDATORY_DATA): Likewise.
(PREFIX_MANDATORY_ADDR): Likewise.
(PREFIX_MANDATORY_LOCK): Likewise.
(PREFIX_MANDATORY): Likewise.
(PREFIX_UD_SHIFT): Set to 8
(PREFIX_UD_REPZ): Updated.
(PREFIX_UD_REPNZ): Likewise.
(PREFIX_UD_DATA): Likewise.
(PREFIX_UD_ADDR): Likewise.
(PREFIX_UD_LOCK): Likewise.
(PREFIX_IGNORED_SHIFT): New.
(PREFIX_IGNORED_REPZ): Likewise.
(PREFIX_IGNORED_REPNZ): Likewise.
(PREFIX_IGNORED_DATA): Likewise.
(PREFIX_IGNORED_ADDR): Likewise.
(PREFIX_IGNORED_LOCK): Likewise.
(PREFIX_OPCODE): Likewise.
(PREFIX_IGNORED): Likewise.
(Bad_Opcode): Replace PREFIX_MANDATORY with 0.
(dis386_twobyte): Replace PREFIX_MANDATORY with PREFIX_OPCODE.
(three_byte_table): Likewise.
(mod_table): Likewise.
(mandatory_prefix): Renamed to ...
(prefix_requirement): This.
(prefix_table): Replace PREFIX_MANDATORY with PREFIX_OPCODE.
Update PREFIX_90 entry.
(get_valid_dis386): Check prefix_requirement to see if a prefix
should be ignored.
(print_insn): Replace mandatory_prefix with prefix_requirement.
2015-04-15 Renlin Li <renlin.li@arm.com>
* arm-dis.c (thumb32_opcodes): Define 'D' format control code,
use it for ssat and ssat16.
(print_insn_thumb32): Add handle case for 'D' control code.
2015-04-06 Ilya Tocar <ilya.tocar@intel.com>
H.J. Lu <hongjiu.lu@intel.com>
* i386-dis-evex.h (evex_table): Fill prefix_requirement field.
* i386-dis.c (PREFIX_MANDATORY_REPZ, PREFIX_MANDATORY_REPNZ,
PREFIX_MANDATORY_DATA, PREFIX_MANDATORY_ADDR, PREFIX_MANDATORY_LOCK,
PREFIX_UD_SHIFT, PREFIX_UD_REPZ, REFIX_UD_REPNZ, PREFIX_UD_DATA,
PREFIX_UD_ADDR, PREFIX_UD_LOCK, PREFIX_MANDATORY): Define.
(Bad_Opcode, FLOAT, DIS386, DIS386_PREFIX, THREE_BYTE_TABLE_PREFIX):
Fill prefix_requirement field.
(struct dis386): Add prefix_requirement field.
(dis386): Fill prefix_requirement field.
(dis386_twobyte): Ditto.
(twobyte_has_mandatory_prefix_: Remove.
(reg_table): Fill prefix_requirement field.
(prefix_table): Ditto.
(x86_64_table): Ditto.
(three_byte_table): Ditto.
(xop_table): Ditto.
(vex_table): Ditto.
(vex_len_table): Ditto.
(vex_w_table): Ditto.
(mod_table): Ditto.
(bad_opcode): Ditto.
(print_insn): Use prefix_requirement.
(FGRPd9_2, FGRPd9_4, FGRPd9_5, FGRPd9_6, FGRPd9_7, FGRPda_5, FGRPdb_4,
FGRPde_3, FGRPdf_4): Fill prefix_requirement field.
(float_reg): Ditto.
2015-03-30 Mike Frysinger <vapier@gentoo.org>
* d10v-opc.c (d10v_reg_name_cnt): Convert old style prototype.
2015-03-29 H.J. Lu <hongjiu.lu@intel.com>
* Makefile.in: Regenerated.
2015-03-25 Anton Blanchard <anton@samba.org>
* ppc-dis.c (disassemble_init_powerpc): Only initialise
powerpc_opcd_indices and vle_opcd_indices once.
2015-03-25 Anton Blanchard <anton@samba.org>
* ppc-opc.c (powerpc_opcodes): Add slbfee.
2015-03-24 Terry Guo <terry.guo@arm.com>
* arm-dis.c (opcode32): Updated to use new arm feature struct.
(opcode16): Likewise.
(coprocessor_opcodes): Replace bit with feature struct.
(neon_opcodes): Likewise.
(arm_opcodes): Likewise.
(thumb_opcodes): Likewise.
(thumb32_opcodes): Likewise.
(print_insn_coprocessor): Likewise.
(print_insn_arm): Likewise.
(select_arm_features): Follow new feature struct.
2015-03-17 Ganesh Gopalasubramanian <Ganesh.Gopalasubramanian@amd.com>
* i386-dis.c (rm_table): Add clzero.
* i386-gen.c (cpu_flag_init): Add new CPU_ZNVER1_FLAGS.
Add CPU_CLZERO_FLAGS.
(cpu_flags): Add CpuCLZERO.
* i386-opc.h: Add CpuCLZERO.
* i386-opc.tbl: Add clzero.
* i386-init.h: Re-generated.
* i386-tbl.h: Re-generated.
2015-03-13 Andrew Bennett <andrew.bennett@imgtec.com>
* mips-opc.c (decode_mips_operand): Fix constraint issues
with u and y operands.
2015-03-13 Andrew Bennett <andrew.bennett@imgtec.com>
* mips-opc.c (mips_builtin_opcodes): Add evp and dvp instructions.
2015-03-10 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
* s390-opc.c: Add new IBM z13 instructions.
* s390-opc.txt: Likewise.
2015-03-10 Renlin Li <renlin.li@arm.com>
* aarch64-tbl.h (aarch64_opcode_table): Remove strub, ldurb, ldursb,
stur, ldur, sturh, ldurh, ldursh, ldursw, prfum F_HAS_ALIAS flag and
related alias.
* aarch64-asm-2.c: Regenerate.
* aarch64-dis-2.c: Likewise.
* aarch64-opc-2.c: Likewise.
2015-03-03 Jiong Wang <jiong.wang@arm.com>
* arm-dis.c (arm_symbol_is_valid): Skip ARM private symbols.
2015-02-25 Oleg Endo <olegendo@gcc.gnu.org>
* sh-opc.h (clrs, sets): Mark as arch_sh3_nommu_up instead of
arch_sh_up.
(pref): Mark as arch_sh2a_nofpu_or_sh3_nommu_up instead of
arch_sh2a_nofpu_or_sh4_nommu_nofpu_up.
2015-02-23 Vinay <Vinay.G@kpit.com>
* rl78-decode.opc (MOV): Added space between two operands for
'mov' instruction in index addressing mode.
* rl78-decode.c: Regenerate.
2015-02-19 Pedro Alves <palves@redhat.com>
* microblaze-dis.h [__cplusplus]: Wrap in extern "C".
2015-02-10 Pedro Alves <palves@redhat.com>
Tom Tromey <tromey@redhat.com>
* microblaze-opcm.h (or, and, xor): Rename to microblaze_or,
microblaze_and, microblaze_xor.
* microblaze-opc.h (opcodes): Adjust.
2015-01-28 James Bowman <james.bowman@ftdichip.com>
* Makefile.am: Add FT32 files.
* configure.ac: Handle FT32.
* disassemble.c (disassembler): Call print_insn_ft32.
* ft32-dis.c: New file.
* ft32-opc.c: New file.
* Makefile.in: Regenerate.
* configure: Regenerate.
* po/POTFILES.in: Regenerate.
2015-01-28 Kuan-Lin Chen <kuanlinchentw@gmail.com>
* nds32-asm.c (keyword_sr): Add new system registers.
2015-01-16 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
* s390-dis.c (s390_extract_operand): Support vector register
operands.
(s390_print_insn_with_opcode): Support new operands types and add
new handling of optional operands.
* s390-mkopc.c (s390_opcode_mode_val, s390_opcode_cpu_val): Remove
and include opcode/s390.h instead.
(struct op_struct): New field `flags'.
(insertOpcode, insertExpandedMnemonic): New parameter `flags'.
(dumpTable): Dump flags.
(main): Parse flags from the s390-opc.txt file. Add z13 as cpu
string.
* s390-opc.c: Add new operands types, instruction formats, and
instruction masks.
(s390_opformats): Add new formats for .insn.
* s390-opc.txt: Add new instructions.
2015-01-01 Alan Modra <amodra@gmail.com>
Update year range in copyright notice of all files.
For older changes see ChangeLog-2014
Copyright (C) 2015 Free Software Foundation, Inc.
Copying and distribution of this file, with or without modification,
are permitted in any medium without royalty provided the copyright
notice and this notice are preserved.
Local Variables:
mode: change-log
left-margin: 8
fill-column: 74
version-control: never
End:
|
