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MEMORY { rom (rx) : ORIGIN = 0x100, LENGTH = 0x100 ram (rwx) : ORIGIN = 0x200, LENGTH = 0x100 } SECTIONS { .text : {*(.text .text.*)} >rom .data : {data_load = LOADADDR (.data); data_start = ADDR (.data); *(.data .data.*)} >ram AT>rom /DISCARD/ : { *(.*) } }