blob: b5b3735db0ae90da16e732c3db77f378bc1ae8b9 (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
|
/* C-SKY assembler/disassembler support.
Copyright (C) 2004-2021 Free Software Foundation, Inc.
Contributed by C-SKY Microsystems and Mentor Graphics.
This file is part of GDB and GAS.
GDB and GAS are free software; you can redistribute it and/or
modify it under the terms of the GNU General Public License as
published by the Free Software Foundation; either version 3, or (at
your option) any later version.
GDB and GAS are distributed in the hope that it will be useful, but
WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
General Public License for more details.
You should have received a copy of the GNU General Public License
along with GDB or GAS; see the file COPYING3. If not, write to the
Free Software Foundation, 51 Franklin Street - Fifth Floor, Boston,
MA 02110-1301, USA. */
#include "dis-asm.h"
/* The following bitmasks control instruction set architecture. */
#define CSKYV1_ISA_E1 ((bfd_uint64_t)1 << 0)
#define CSKYV2_ISA_E1 ((bfd_uint64_t)1 << 1)
#define CSKYV2_ISA_1E2 ((bfd_uint64_t)1 << 2)
#define CSKYV2_ISA_2E3 ((bfd_uint64_t)1 << 3)
#define CSKYV2_ISA_3E7 ((bfd_uint64_t)1 << 4)
#define CSKYV2_ISA_7E10 ((bfd_uint64_t)1 << 5)
#define CSKYV2_ISA_3E3R1 ((bfd_uint64_t)1 << 6)
#define CSKYV2_ISA_3E3R2 ((bfd_uint64_t)1 << 7)
#define CSKYV2_ISA_10E60 ((bfd_uint64_t)1 << 8)
#define CSKYV2_ISA_3E3R3 ((bfd_uint64_t)1 << 9)
#define CSKY_ISA_TRUST ((bfd_uint64_t)1 << 11)
#define CSKY_ISA_CACHE ((bfd_uint64_t)1 << 12)
#define CSKY_ISA_NVIC ((bfd_uint64_t)1 << 13)
#define CSKY_ISA_CP ((bfd_uint64_t)1 << 14)
#define CSKY_ISA_MP ((bfd_uint64_t)1 << 15)
#define CSKY_ISA_MP_1E2 ((bfd_uint64_t)1 << 16)
#define CSKY_ISA_JAVA ((bfd_uint64_t)1 << 17)
#define CSKY_ISA_MAC ((bfd_uint64_t)1 << 18)
#define CSKY_ISA_MAC_DSP ((bfd_uint64_t)1 << 19)
/* Base ISA for csky v1 and v2. */
#define CSKY_ISA_DSP ((bfd_uint64_t)1 << 20)
#define CSKY_ISA_DSP_1E2 ((bfd_uint64_t)1 << 21)
#define CSKY_ISA_DSP_ENHANCE ((bfd_uint64_t)1 << 22)
#define CSKY_ISA_DSPE60 ((bfd_uint64_t)1 << 23)
/* Base float instruction (803f & 810f). */
#define CSKY_ISA_FLOAT_E1 ((bfd_uint64_t)1 << 25)
/* M_FLOAT support (810f). */
#define CSKY_ISA_FLOAT_1E2 ((bfd_uint64_t)1 << 26)
/* 803 support (803f). */
#define CSKY_ISA_FLOAT_1E3 ((bfd_uint64_t)1 << 27)
/* 807 support (803f & 807f). */
#define CSKY_ISA_FLOAT_3E4 ((bfd_uint64_t)1 << 28)
/* 860 support. */
#define CSKY_ISA_FLOAT_7E60 ((bfd_uint64_t)1 << 36)
/* Vector DSP support. */
#define CSKY_ISA_VDSP ((bfd_uint64_t)1 << 29)
#define CSKY_ISA_VDSP_2 ((bfd_uint64_t)1 << 30)
/* The following bitmasks control cpu architecture for CSKY. */
#define CSKY_ABI_V1 (1 << 28)
#define CSKY_ABI_V2 (2 << 28)
#define CSKY_ARCH_MASK 0x0000001F
#define CSKY_ABI_MASK 0xF0000000
#define CSKY_ARCH_510 0x1
#define CSKY_ARCH_610 0x2
#define CSKY_ARCH_801 0xa
#define CSKY_ARCH_802 0x10
#define CSKY_ARCH_803 0x9
/* 804 use the same arch flag as 803 yet. */
#define CSKY_ARCH_804 0x9
#define CSKY_ARCH_805 0x11
#define CSKY_ARCH_807 0x6
#define CSKY_ARCH_810 0x8
#define CSKY_ARCH_860 0xb
/* 800 is a special arch supporting all instructions for ABIV2. */
#define CSKY_ARCH_800 0x1f
#define CSKY_ARCH_MAC (1 << 15)
#define CSKY_ARCH_DSP (1 << 14)
#define CSKY_ARCH_FLOAT (1 << 13)
#define CSKY_ARCH_SIMD (1 << 12)
#define CSKY_ARCH_CP (1 << 11)
#define CSKY_ARCH_MP (1 << 10)
#define CSKY_ARCH_CACHE (1 << 9)
#define CSKY_ARCH_JAVA (1 << 8)
#define CSKY_ARCH_APS (1 << 7)
/* eflag's Versions. */
#define CSKY_VERSION_V1 (1 << 24)
#define CSKY_VERSION_V2 (2 << 24)
#define CSKY_VERSION_V3 (3 << 24)
#define IS_CSKY_V1(a) \
(((a) & CSKY_ABI_MASK) == CSKY_ABI_V1)
#define IS_CSKY_V2(a) \
(((a) & CSKY_ABI_MASK) == CSKY_ABI_V2)
#define IS_CSKY_ARCH_V1(a) \
(((a) & CSKY_ARCH_MASK) == CSKY_ARCH_510 \
|| ((a) & CSKY_ARCH_MASK) == CSKY_ARCH_610)
#define IS_CSKY_ARCH_V2(a) \
(!(IS_CSKY_ARCH_V1 (a)))
#define IS_CSKY_ARCH_510(a) (((a) & CSKY_ARCH_MASK) == CSKY_ARCH_510)
#define IS_CSKY_ARCH_610(a) (((a) & CSKY_ARCH_MASK) == CSKY_ARCH_610)
#define IS_CSKY_ARCH_801(a) (((a) & CSKY_ARCH_MASK) == CSKY_ARCH_801)
#define IS_CSKY_ARCH_802(a) (((a) & CSKY_ARCH_MASK) == CSKY_ARCH_802)
#define IS_CSKY_ARCH_803(a) (((a) & CSKY_ARCH_MASK) == CSKY_ARCH_803)
#define IS_CSKY_ARCH_807(a) (((a) & CSKY_ARCH_MASK) == CSKY_ARCH_807)
#define IS_CSKY_ARCH_810(a) (((a) & CSKY_ARCH_MASK) == CSKY_ARCH_810)
#define CPU_ARCH_MASK \
(CSKY_ARCH_JAVA | CSKY_ARCH_FLOAT | CSKY_ARCH_DSP | CSKY_ARCH_MASK)
#ifdef __cplusplus
extern "C" {
#endif
extern int print_insn_csky (bfd_vma memaddr, struct disassemble_info *info);
#ifdef __cplusplus
}
#endif
|
