1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
429
430
431
432
433
434
435
436
437
438
439
440
441
442
443
444
445
446
447
448
449
450
451
452
453
454
455
456
457
458
459
460
461
462
463
464
465
466
467
468
469
470
471
472
473
474
475
476
477
478
479
480
481
482
483
484
485
486
487
488
489
490
491
492
493
494
495
496
497
498
499
500
501
502
503
504
505
506
507
508
509
510
511
512
513
514
515
516
517
518
519
520
521
522
523
524
525
526
527
528
529
530
531
532
533
534
535
536
537
538
539
540
541
542
543
544
545
546
547
548
549
550
551
552
553
554
555
556
557
558
559
560
561
562
563
564
565
566
567
568
569
570
571
572
573
574
575
576
577
578
579
580
581
582
583
584
585
586
587
588
589
590
591
592
593
594
595
596
597
598
599
600
601
602
603
604
605
606
607
608
609
610
611
612
613
614
615
616
617
618
619
620
621
622
623
624
625
626
627
628
629
630
631
632
633
634
635
636
637
638
639
640
641
642
643
644
645
646
647
648
649
650
651
652
653
654
655
656
657
|
/* Darwin support for GDB, the GNU debugger.
Copyright (C) 1997-2018 Free Software Foundation, Inc.
Contributed by Apple Computer, Inc.
This file is part of GDB.
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program. If not, see <http://www.gnu.org/licenses/>. */
#include "defs.h"
#include "frame.h"
#include "inferior.h"
#include "target.h"
#include "symfile.h"
#include "symtab.h"
#include "objfiles.h"
#include "gdbcmd.h"
#include "regcache.h"
#include "i386-tdep.h"
#include "i387-tdep.h"
#include "gdbarch.h"
#include "arch-utils.h"
#include "gdbcore.h"
#include "x86-nat.h"
#include "darwin-nat.h"
#include "i386-darwin-tdep.h"
#ifdef BFD64
#include "amd64-nat.h"
#include "amd64-tdep.h"
#include "amd64-darwin-tdep.h"
#endif
/* Read register values from the inferior process.
If REGNO is -1, do this for all registers.
Otherwise, REGNO specifies which register (so we can save time). */
static void
i386_darwin_fetch_inferior_registers (struct target_ops *ops,
struct regcache *regcache, int regno)
{
thread_t current_thread = ptid_get_tid (regcache_get_ptid (regcache));
int fetched = 0;
struct gdbarch *gdbarch = regcache->arch ();
#ifdef BFD64
if (gdbarch_ptr_bit (gdbarch) == 64)
{
if (regno == -1 || amd64_native_gregset_supplies_p (gdbarch, regno))
{
x86_thread_state_t gp_regs;
unsigned int gp_count = x86_THREAD_STATE_COUNT;
kern_return_t ret;
ret = thread_get_state
(current_thread, x86_THREAD_STATE, (thread_state_t) & gp_regs,
&gp_count);
if (ret != KERN_SUCCESS)
{
printf_unfiltered (_("Error calling thread_get_state for "
"GP registers for thread 0x%lx\n"),
(unsigned long) current_thread);
MACH_CHECK_ERROR (ret);
}
/* Some kernels don't sanitize the values. */
gp_regs.uts.ts64.__fs &= 0xffff;
gp_regs.uts.ts64.__gs &= 0xffff;
amd64_supply_native_gregset (regcache, &gp_regs.uts, -1);
fetched++;
}
if (regno == -1 || !amd64_native_gregset_supplies_p (gdbarch, regno))
{
x86_float_state_t fp_regs;
unsigned int fp_count = x86_FLOAT_STATE_COUNT;
kern_return_t ret;
ret = thread_get_state
(current_thread, x86_FLOAT_STATE, (thread_state_t) & fp_regs,
&fp_count);
if (ret != KERN_SUCCESS)
{
printf_unfiltered (_("Error calling thread_get_state for "
"float registers for thread 0x%lx\n"),
(unsigned long) current_thread);
MACH_CHECK_ERROR (ret);
}
amd64_supply_fxsave (regcache, -1, &fp_regs.ufs.fs64.__fpu_fcw);
fetched++;
}
}
else
#endif
{
if (regno == -1 || regno < I386_NUM_GREGS)
{
x86_thread_state32_t gp_regs;
unsigned int gp_count = x86_THREAD_STATE32_COUNT;
kern_return_t ret;
int i;
ret = thread_get_state
(current_thread, x86_THREAD_STATE32, (thread_state_t) &gp_regs,
&gp_count);
if (ret != KERN_SUCCESS)
{
printf_unfiltered (_("Error calling thread_get_state for "
"GP registers for thread 0x%lx\n"),
(unsigned long) current_thread);
MACH_CHECK_ERROR (ret);
}
for (i = 0; i < I386_NUM_GREGS; i++)
regcache_raw_supply
(regcache, i,
(char *)&gp_regs + i386_darwin_thread_state_reg_offset[i]);
fetched++;
}
if (regno == -1
|| (regno >= I386_ST0_REGNUM && regno < I386_SSE_NUM_REGS))
{
x86_float_state32_t fp_regs;
unsigned int fp_count = x86_FLOAT_STATE32_COUNT;
kern_return_t ret;
ret = thread_get_state
(current_thread, x86_FLOAT_STATE32, (thread_state_t) &fp_regs,
&fp_count);
if (ret != KERN_SUCCESS)
{
printf_unfiltered (_("Error calling thread_get_state for "
"float registers for thread 0x%lx\n"),
(unsigned long) current_thread);
MACH_CHECK_ERROR (ret);
}
i387_supply_fxsave (regcache, -1, &fp_regs.__fpu_fcw);
fetched++;
}
}
if (! fetched)
{
warning (_("unknown register %d"), regno);
regcache_raw_supply (regcache, regno, NULL);
}
}
/* Store our register values back into the inferior.
If REGNO is -1, do this for all registers.
Otherwise, REGNO specifies which register (so we can save time). */
static void
i386_darwin_store_inferior_registers (struct target_ops *ops,
struct regcache *regcache, int regno)
{
thread_t current_thread = ptid_get_tid (regcache_get_ptid (regcache));
struct gdbarch *gdbarch = regcache->arch ();
#ifdef BFD64
if (gdbarch_ptr_bit (gdbarch) == 64)
{
if (regno == -1 || amd64_native_gregset_supplies_p (gdbarch, regno))
{
x86_thread_state_t gp_regs;
kern_return_t ret;
unsigned int gp_count = x86_THREAD_STATE_COUNT;
ret = thread_get_state
(current_thread, x86_THREAD_STATE, (thread_state_t) &gp_regs,
&gp_count);
MACH_CHECK_ERROR (ret);
gdb_assert (gp_regs.tsh.flavor == x86_THREAD_STATE64);
gdb_assert (gp_regs.tsh.count == x86_THREAD_STATE64_COUNT);
amd64_collect_native_gregset (regcache, &gp_regs.uts, regno);
/* Some kernels don't sanitize the values. */
gp_regs.uts.ts64.__fs &= 0xffff;
gp_regs.uts.ts64.__gs &= 0xffff;
ret = thread_set_state (current_thread, x86_THREAD_STATE,
(thread_state_t) &gp_regs,
x86_THREAD_STATE_COUNT);
MACH_CHECK_ERROR (ret);
}
if (regno == -1 || !amd64_native_gregset_supplies_p (gdbarch, regno))
{
x86_float_state_t fp_regs;
kern_return_t ret;
unsigned int fp_count = x86_FLOAT_STATE_COUNT;
ret = thread_get_state
(current_thread, x86_FLOAT_STATE, (thread_state_t) & fp_regs,
&fp_count);
MACH_CHECK_ERROR (ret);
gdb_assert (fp_regs.fsh.flavor == x86_FLOAT_STATE64);
gdb_assert (fp_regs.fsh.count == x86_FLOAT_STATE64_COUNT);
amd64_collect_fxsave (regcache, regno, &fp_regs.ufs.fs64.__fpu_fcw);
ret = thread_set_state (current_thread, x86_FLOAT_STATE,
(thread_state_t) & fp_regs,
x86_FLOAT_STATE_COUNT);
MACH_CHECK_ERROR (ret);
}
}
else
#endif
{
if (regno == -1 || regno < I386_NUM_GREGS)
{
x86_thread_state32_t gp_regs;
kern_return_t ret;
unsigned int gp_count = x86_THREAD_STATE32_COUNT;
int i;
ret = thread_get_state
(current_thread, x86_THREAD_STATE32, (thread_state_t) &gp_regs,
&gp_count);
MACH_CHECK_ERROR (ret);
for (i = 0; i < I386_NUM_GREGS; i++)
if (regno == -1 || regno == i)
regcache_raw_collect
(regcache, i,
(char *)&gp_regs + i386_darwin_thread_state_reg_offset[i]);
ret = thread_set_state (current_thread, x86_THREAD_STATE32,
(thread_state_t) &gp_regs,
x86_THREAD_STATE32_COUNT);
MACH_CHECK_ERROR (ret);
}
if (regno == -1
|| (regno >= I386_ST0_REGNUM && regno < I386_SSE_NUM_REGS))
{
x86_float_state32_t fp_regs;
unsigned int fp_count = x86_FLOAT_STATE32_COUNT;
kern_return_t ret;
ret = thread_get_state
(current_thread, x86_FLOAT_STATE32, (thread_state_t) & fp_regs,
&fp_count);
MACH_CHECK_ERROR (ret);
i387_collect_fxsave (regcache, regno, &fp_regs.__fpu_fcw);
ret = thread_set_state (current_thread, x86_FLOAT_STATE32,
(thread_state_t) &fp_regs,
x86_FLOAT_STATE32_COUNT);
MACH_CHECK_ERROR (ret);
}
}
}
/* Support for debug registers, boosted mostly from i386-linux-nat.c. */
static void
i386_darwin_dr_set (int regnum, CORE_ADDR value)
{
int current_pid;
thread_t current_thread;
x86_debug_state_t dr_regs;
kern_return_t ret;
unsigned int dr_count;
gdb_assert (regnum >= 0 && regnum <= DR_CONTROL);
current_thread = ptid_get_tid (inferior_ptid);
dr_regs.dsh.flavor = x86_DEBUG_STATE;
dr_regs.dsh.count = x86_DEBUG_STATE_COUNT;
dr_count = x86_DEBUG_STATE_COUNT;
ret = thread_get_state (current_thread, x86_DEBUG_STATE,
(thread_state_t) &dr_regs, &dr_count);
MACH_CHECK_ERROR (ret);
switch (dr_regs.dsh.flavor)
{
case x86_DEBUG_STATE32:
switch (regnum)
{
case 0:
dr_regs.uds.ds32.__dr0 = value;
break;
case 1:
dr_regs.uds.ds32.__dr1 = value;
break;
case 2:
dr_regs.uds.ds32.__dr2 = value;
break;
case 3:
dr_regs.uds.ds32.__dr3 = value;
break;
case 4:
dr_regs.uds.ds32.__dr4 = value;
break;
case 5:
dr_regs.uds.ds32.__dr5 = value;
break;
case 6:
dr_regs.uds.ds32.__dr6 = value;
break;
case 7:
dr_regs.uds.ds32.__dr7 = value;
break;
}
break;
#ifdef BFD64
case x86_DEBUG_STATE64:
switch (regnum)
{
case 0:
dr_regs.uds.ds64.__dr0 = value;
break;
case 1:
dr_regs.uds.ds64.__dr1 = value;
break;
case 2:
dr_regs.uds.ds64.__dr2 = value;
break;
case 3:
dr_regs.uds.ds64.__dr3 = value;
break;
case 4:
dr_regs.uds.ds64.__dr4 = value;
break;
case 5:
dr_regs.uds.ds64.__dr5 = value;
break;
case 6:
dr_regs.uds.ds64.__dr6 = value;
break;
case 7:
dr_regs.uds.ds64.__dr7 = value;
break;
}
break;
#endif
}
ret = thread_set_state (current_thread, dr_regs.dsh.flavor,
(thread_state_t) &dr_regs.uds, dr_count);
MACH_CHECK_ERROR (ret);
}
static CORE_ADDR
i386_darwin_dr_get (int regnum)
{
thread_t current_thread;
x86_debug_state_t dr_regs;
kern_return_t ret;
unsigned int dr_count;
gdb_assert (regnum >= 0 && regnum <= DR_CONTROL);
current_thread = ptid_get_tid (inferior_ptid);
dr_regs.dsh.flavor = x86_DEBUG_STATE;
dr_regs.dsh.count = x86_DEBUG_STATE_COUNT;
dr_count = x86_DEBUG_STATE_COUNT;
ret = thread_get_state (current_thread, x86_DEBUG_STATE,
(thread_state_t) &dr_regs, &dr_count);
MACH_CHECK_ERROR (ret);
switch (dr_regs.dsh.flavor)
{
case x86_DEBUG_STATE32:
switch (regnum)
{
case 0:
return dr_regs.uds.ds32.__dr0;
case 1:
return dr_regs.uds.ds32.__dr1;
case 2:
return dr_regs.uds.ds32.__dr2;
case 3:
return dr_regs.uds.ds32.__dr3;
case 4:
return dr_regs.uds.ds32.__dr4;
case 5:
return dr_regs.uds.ds32.__dr5;
case 6:
return dr_regs.uds.ds32.__dr6;
case 7:
return dr_regs.uds.ds32.__dr7;
default:
return -1;
}
break;
#ifdef BFD64
case x86_DEBUG_STATE64:
switch (regnum)
{
case 0:
return dr_regs.uds.ds64.__dr0;
case 1:
return dr_regs.uds.ds64.__dr1;
case 2:
return dr_regs.uds.ds64.__dr2;
case 3:
return dr_regs.uds.ds64.__dr3;
case 4:
return dr_regs.uds.ds64.__dr4;
case 5:
return dr_regs.uds.ds64.__dr5;
case 6:
return dr_regs.uds.ds64.__dr6;
case 7:
return dr_regs.uds.ds64.__dr7;
default:
return -1;
}
break;
#endif
default:
return -1;
}
}
static void
i386_darwin_dr_set_control (unsigned long control)
{
i386_darwin_dr_set (DR_CONTROL, control);
}
static void
i386_darwin_dr_set_addr (int regnum, CORE_ADDR addr)
{
gdb_assert (regnum >= 0 && regnum <= DR_LASTADDR - DR_FIRSTADDR);
i386_darwin_dr_set (DR_FIRSTADDR + regnum, addr);
}
static CORE_ADDR
i386_darwin_dr_get_addr (int regnum)
{
return i386_darwin_dr_get (regnum);
}
static unsigned long
i386_darwin_dr_get_status (void)
{
return i386_darwin_dr_get (DR_STATUS);
}
static unsigned long
i386_darwin_dr_get_control (void)
{
return i386_darwin_dr_get (DR_CONTROL);
}
void
darwin_check_osabi (darwin_inferior *inf, thread_t thread)
{
if (gdbarch_osabi (target_gdbarch ()) == GDB_OSABI_UNKNOWN)
{
/* Attaching to a process. Let's figure out what kind it is. */
x86_thread_state_t gp_regs;
struct gdbarch_info info;
unsigned int gp_count = x86_THREAD_STATE_COUNT;
kern_return_t ret;
ret = thread_get_state (thread, x86_THREAD_STATE,
(thread_state_t) &gp_regs, &gp_count);
if (ret != KERN_SUCCESS)
{
MACH_CHECK_ERROR (ret);
return;
}
gdbarch_info_init (&info);
gdbarch_info_fill (&info);
info.byte_order = gdbarch_byte_order (target_gdbarch ());
info.osabi = GDB_OSABI_DARWIN;
if (gp_regs.tsh.flavor == x86_THREAD_STATE64)
info.bfd_arch_info = bfd_lookup_arch (bfd_arch_i386,
bfd_mach_x86_64);
else
info.bfd_arch_info = bfd_lookup_arch (bfd_arch_i386,
bfd_mach_i386_i386);
gdbarch_update_p (info);
}
}
#define X86_EFLAGS_T 0x100UL
/* Returning from a signal trampoline is done by calling a
special system call (sigreturn). This system call
restores the registers that were saved when the signal was
raised, including %eflags/%rflags. That means that single-stepping
won't work. Instead, we'll have to modify the signal context
that's about to be restored, and set the trace flag there. */
static int
i386_darwin_sstep_at_sigreturn (x86_thread_state_t *regs)
{
enum bfd_endian byte_order = gdbarch_byte_order (target_gdbarch ());
static const gdb_byte darwin_syscall[] = { 0xcd, 0x80 }; /* int 0x80 */
gdb_byte buf[sizeof (darwin_syscall)];
/* Check if PC is at a sigreturn system call. */
if (target_read_memory (regs->uts.ts32.__eip, buf, sizeof (buf)) == 0
&& memcmp (buf, darwin_syscall, sizeof (darwin_syscall)) == 0
&& regs->uts.ts32.__eax == 0xb8 /* SYS_sigreturn */)
{
ULONGEST uctx_addr;
ULONGEST mctx_addr;
ULONGEST flags_addr;
unsigned int eflags;
uctx_addr = read_memory_unsigned_integer
(regs->uts.ts32.__esp + 4, 4, byte_order);
mctx_addr = read_memory_unsigned_integer
(uctx_addr + 28, 4, byte_order);
flags_addr = mctx_addr + 12 + 9 * 4;
read_memory (flags_addr, (gdb_byte *) &eflags, 4);
eflags |= X86_EFLAGS_T;
write_memory (flags_addr, (gdb_byte *) &eflags, 4);
return 1;
}
return 0;
}
#ifdef BFD64
static int
amd64_darwin_sstep_at_sigreturn (x86_thread_state_t *regs)
{
enum bfd_endian byte_order = gdbarch_byte_order (target_gdbarch ());
static const gdb_byte darwin_syscall[] = { 0x0f, 0x05 }; /* syscall */
gdb_byte buf[sizeof (darwin_syscall)];
/* Check if PC is at a sigreturn system call. */
if (target_read_memory (regs->uts.ts64.__rip, buf, sizeof (buf)) == 0
&& memcmp (buf, darwin_syscall, sizeof (darwin_syscall)) == 0
&& (regs->uts.ts64.__rax & 0xffffffff) == 0x20000b8 /* SYS_sigreturn */)
{
ULONGEST mctx_addr;
ULONGEST flags_addr;
unsigned int rflags;
mctx_addr = read_memory_unsigned_integer
(regs->uts.ts64.__rdi + 48, 8, byte_order);
flags_addr = mctx_addr + 16 + 17 * 8;
/* AMD64 is little endian. */
read_memory (flags_addr, (gdb_byte *) &rflags, 4);
rflags |= X86_EFLAGS_T;
write_memory (flags_addr, (gdb_byte *) &rflags, 4);
return 1;
}
return 0;
}
#endif
void
darwin_set_sstep (thread_t thread, int enable)
{
x86_thread_state_t regs;
unsigned int count = x86_THREAD_STATE_COUNT;
kern_return_t kret;
kret = thread_get_state (thread, x86_THREAD_STATE,
(thread_state_t) ®s, &count);
if (kret != KERN_SUCCESS)
{
printf_unfiltered (_("darwin_set_sstep: error %x, thread=%x\n"),
kret, thread);
return;
}
switch (regs.tsh.flavor)
{
case x86_THREAD_STATE32:
{
__uint32_t bit = enable ? X86_EFLAGS_T : 0;
if (enable && i386_darwin_sstep_at_sigreturn (®s))
return;
if ((regs.uts.ts32.__eflags & X86_EFLAGS_T) == bit)
return;
regs.uts.ts32.__eflags
= (regs.uts.ts32.__eflags & ~X86_EFLAGS_T) | bit;
kret = thread_set_state (thread, x86_THREAD_STATE,
(thread_state_t) ®s, count);
MACH_CHECK_ERROR (kret);
}
break;
#ifdef BFD64
case x86_THREAD_STATE64:
{
__uint64_t bit = enable ? X86_EFLAGS_T : 0;
if (enable && amd64_darwin_sstep_at_sigreturn (®s))
return;
if ((regs.uts.ts64.__rflags & X86_EFLAGS_T) == bit)
return;
regs.uts.ts64.__rflags
= (regs.uts.ts64.__rflags & ~X86_EFLAGS_T) | bit;
kret = thread_set_state (thread, x86_THREAD_STATE,
(thread_state_t) ®s, count);
MACH_CHECK_ERROR (kret);
}
break;
#endif
default:
error (_("darwin_set_sstep: unknown flavour: %d"), regs.tsh.flavor);
}
}
void
darwin_complete_target (struct target_ops *target)
{
#ifdef BFD64
amd64_native_gregset64_reg_offset = amd64_darwin_thread_state_reg_offset;
amd64_native_gregset64_num_regs = amd64_darwin_thread_state_num_regs;
amd64_native_gregset32_reg_offset = i386_darwin_thread_state_reg_offset;
amd64_native_gregset32_num_regs = i386_darwin_thread_state_num_regs;
#endif
x86_use_watchpoints (target);
x86_dr_low.set_control = i386_darwin_dr_set_control;
x86_dr_low.set_addr = i386_darwin_dr_set_addr;
x86_dr_low.get_addr = i386_darwin_dr_get_addr;
x86_dr_low.get_status = i386_darwin_dr_get_status;
x86_dr_low.get_control = i386_darwin_dr_get_control;
/* Let's assume that the kernel is 64 bits iff the executable is. */
#ifdef __x86_64__
x86_set_debug_register_length (8);
#else
x86_set_debug_register_length (4);
#endif
target->to_fetch_registers = i386_darwin_fetch_inferior_registers;
target->to_store_registers = i386_darwin_store_inferior_registers;
}
|