1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
|
@c Copyright (C) 1997 Free Software Foundation, Inc.
@c This is part of the GAS manual.
@c For copying conditions, see the file as.texinfo.
@node V850-Dependent
@chapter v850 Dependent Features
@cindex V850 support
@menu
* V850 Options:: Options
* V850 Syntax:: Syntax
* V850 Floating Point:: Floating Point
* V850 Directives:: V850 Machine Directives
* V850 Opcodes:: Opcodes
@end menu
@node V850 Options
@section Options
@cindex V850 options (none)
@cindex options for V850 (none)
@code{@value{AS}} has no additional command-line options for the V850
processor family.
@node V850 Syntax
@section Syntax
@menu
* V850-Chars:: Special Characters
* V850-Regs:: Register Names
@end menu
@node V850-Chars
@subsection Special Characters
@cindex line comment character, V850
@cindex V850 line comment character
@samp{#} is the line comment character.
@node V850-Regs
@subsection Register Names
@cindex V850 register names
@cindex register names, V850
@code{@value{AS}} supports the following names for registers:
@table @code
@cindex @code{zero} register, V850
@item general register 0
r0, zero
@item general register 1
r1
@item general register 2
r2, hp
@cindex @code{sp} register, V850
@item general register 3
r3, sp
@cindex @code{gp} register, V850
@item general register 4
r4, gp
@cindex @code{tp} register, V850
@item general register 5
r5, tp
@item general register 6
r6
@item general register 7
r7
@item general register 8
r8
@item general register 9
r9
@item general register 10
r10
@item general register 11
r11
@item general register 12
r12
@item general register 13
r13
@item general register 14
r14
@item general register 15
r15
@item general register 16
r16
@item general register 17
r17
@item general register 18
r18
@item general register 19
r19
@item general register 20
r20
@item general register 21
r21
@item general register 22
r22
@item general register 23
r23
@item general register 24
r24
@item general register 25
r25
@item general register 26
r26
@item general register 27
r27
@item general register 28
r28
@item general register 29
r29
@cindex @code{ep} register, V850
@item general register 30
r30, ep
@cindex @code{lp} register, V850
@item general register 31
r31, lp
@cindex @code{eipc} register, V850
@item system register 0
eipc
@cindex @code{eipsw} register, V850
@item system register 1
eipsw
@cindex @code{fepc} register, V850
@item system register 2
fepc
@cindex @code{fepsw} register, V850
@item system register 3
fepsw
@cindex @code{ecr} register, V850
@item system register 4
ecr
@cindex @code{psw} register, V850
@item system register 5
psw
@c start-santize-v850e
@cindex @code{ctpc} register, V850
@item system register 16
ctpc
@cindex @code{ctpsw} register, V850
@item system register 17
ctpsw
@cindex @code{dbpc} register, V850
@item system register 18
dbpc
@cindex @code{dbpsw} register, V850
@item system register 19
dbpsw
@cindex @code{ctbp} register, V850
@item system register 20
ctbp
@c end-santize-v850e
@end table
@node V850 Floating Point
@section Floating Point
@cindex floating point, V850 (@sc{ieee})
@cindex V850 floating point (@sc{ieee})
The V850 family uses @sc{ieee} floating-point numbers.
@node V850 Directives
@section V850 Machine Directives
@cindex machine directives, V850
@cindex V850 machine directives
@table @code
@cindex @code{offset} directive, V850
@item .offset @var{<expression>}
Moves the offset into the current section to the specified amount.
@cindex @code{section} directive, V850
@item .section "name", <type>
This is an extension to the standard .section directive. It sets the
current section to be <type> and creates an alias for this section
called "name".
@end table
@node V850 Opcodes
@section Opcodes
@cindex V850 opcodes
@cindex opcodes for V850
@code{@value{AS}} implements all the standard V850 opcodes.
@code{@value{AS}} also implements the following pseudo ops:
@table @code
@cindex @code{hi} pseudo-op, V850
@item hi()
Computes the higher 16 bits of the given expression and stores it into
the immediate operand field of the given instruction. For example:
@samp{mulhi hi(here - there), r5, r6}
computes the difference between the address of labels 'here' and
'there', takes the upper 16 bits of this difference, shifts it down 16
bits and then mutliplies it by the lower 16 bits in register 5, putting
the result into register 6.
@cindex @code{lo} pseudo-op, V850
@item lo()
Computes the lower 16 bits of the given expression and stores it into
the immediate operand field of the given instruction. For example:
@samp{addi lo(here - there), r5, r6}
computes the difference between the address of labels 'here' and
'there', takes the lower 16 bits of this difference and adds it to
register 5, putting the result into register 6.
@cindex @code{sdaoff} pseudo-op, V850
@item sdaoff()
Computes the offset of the named variable from the start of the Small
Data Area (whoes address is held in register 4, the GP register) and
stores the result as a 16 bit signed value in the immediate operand
field of the given instruction. For example:
@samp{ld.w sdaoff(_a_variable)[gp],r6}
loads the contents of the location pointed to by the label '_a_variable'
into register 6, provided that the label is located somewhere within +/-
32K of the address held in the GP register. [Note the linker assumes
that the GP register contains a fixed address set to the address of the
label called '__gp'].
@cindex @code{tdaoff} pseudo-op, V850
@item tdaoff()
Computes the offset of the named variable from the start of the Tiny
Data Area (whoes address is held in register 30, the EP register) and
stores the result as a 4,5,7 or 8 bit unsigned value in the immediate
operand field of the given instruction. For example:
@samp{sld.w tdaoff(_a_variable)[ep],r6}
loads the contents of the location pointed to by the label '_a_variable'
into register 6, provided that the label is located somewhere within 256
bytes of the address held in the EP register. [Note the linker assumes
that the EP register contains a fixed address set to the address of the
label called '__ep'].
@cindex @code{zdaoff} pseudo-op, V850
@item zdaoff()
Computes the offset of the named variable from address 0 and stores the
result as a 16 bit signed value in the immediate operand field of the
given instruction. For example:
@samp{movea zdaoff(_a_variable),zero,r6}
puts the address of the label '_a_variable' into register 6, assuming
that the label is somewhere within the first 32K of memory.
@end table
For information on the V850 or Thumb instruction sets, see @cite{V850
Family 32-/16-Bit single-Chip Microcontroller Architecture Manual} from NEC.
Ltd.
|