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2011-01-15 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (disallow_64bit_disp): New.
(x86_elf_abi): Replace X86_64_LP64_ABI/X86_64_ILP32_ABI with
X86_64_ABI/X86_64_X32_ABI.
(md_assemble): Don't allow movabs with relocation in x32 mode.
(i386_target_format): Updated.
2011-01-14 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (OPTION_N32): Renamed to ...
(OPTION_X32): This.
(md_longopts): Replace n32 with x32.
(md_parse_option): Updated.
(md_show_usage): Likewise.
* doc/c-i386.texi: Replace --n32 with --x32.
2011-01-11 Mingjie Xing <mingjie.xing@gmail.com>
* config/tc-mips.c (mips_ip): Update error messages. Take an
unadjusted offset for "+c" argument.
2011-01-10 Nick Clifton <nickc@redhat.com>
* config/tc-i386.c (x86_elf_abi): Only define for targets that use
it.
2011-01-10 Nick Clifton <nickc@redhat.com>
* config/tc-arm.c (s_arm_tls_desceq): Move code into ELF-only
part of the file.
2011-01-10 Nathan Sidwell <nathan@codesourcery.com>
Glauber de Oliveira Costa <glommer@gmail.com>
* doc/c-arm.texi: Document TLSDESC and TLSCALL relocations, and
.tlsdescseq directive.
* config/tc-arm.c (arm_typed_reg_parse): Check for potential reloc
following a symbol.
(s_arm_tls_descseq): New directive.
(md_pseudo_table): Add it.
(encode_branch): Allow TLS_CALL relocs too.
(do_t_blx, do_t_branch23): Use encode_branch.
(reloc_names): Add tlsdesc and tlscall.
(md_apply_fix): Process tls desc relocations.
(tc_gen_reloc): Likewise.
(arm_fix_adjustable): Likewise.
2011-01-07 Quentin Neill <quentin.neill@amd.com>
* config/tc-i386.c (cpu_arch): Add CPU_BMI_FLAGS.
* doc/c-i386.texi (i386-BMI): New section.
2011-01-06 Paul Koning <ni1d@arrl.net>
* config/tc-pdp11.c (parse_op_no_deferred): Allow PC-relative
references to absolute addresses.
2011-01-05 DJ Delorie <dj@redhat.com>
* config/tc-rx.c (tc_gen_reloc): Emit an RX_OP_NEG expression
instead of an RH_NEG32 one.
2011-01-05 Jonathan Wakely <jwakely.gcc@gmail.com>
* doc/c-i386.texi: Clarify --n32.
2011-01-04 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (build_modrm_byte): Allow encoding 32/64bit
integer registers in VEX.vvvv. Check register-only source
operand when two source operands are swapped. Properly update
destination when two source operands are swapped.
2011-01-01 H.J. Lu <hongjiu.lu@intel.com>
* gas.c (parse_args): Update copyright to 2011.
For older changes see ChangeLog-2010
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