1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
429
430
431
432
433
434
435
436
437
438
439
440
441
442
443
444
445
446
447
448
449
450
451
452
453
454
455
456
457
458
459
460
461
462
463
464
465
466
467
468
469
470
471
472
473
474
475
476
477
478
479
480
481
482
483
484
485
486
487
488
489
490
491
492
493
494
495
496
497
498
499
500
501
502
503
504
505
506
507
508
509
510
511
512
513
514
515
516
517
518
519
520
521
522
523
524
525
526
527
528
529
530
531
532
533
534
535
536
537
538
539
540
541
542
543
544
545
546
547
548
549
550
551
552
553
554
555
556
557
558
559
560
561
562
563
564
565
566
567
568
569
570
571
572
573
574
575
576
577
578
579
580
581
582
583
584
585
586
587
588
589
590
591
592
593
594
595
596
597
598
599
600
601
602
603
604
605
606
607
608
609
610
611
612
613
614
615
616
617
618
619
620
621
622
623
624
625
626
627
628
629
630
631
632
633
634
635
636
637
638
639
640
641
642
643
644
645
646
647
648
649
650
651
652
653
654
655
656
657
658
659
660
661
662
663
664
665
666
667
668
669
670
671
672
673
674
675
676
677
678
679
680
681
682
683
684
685
686
687
688
689
690
691
692
693
694
695
696
697
698
699
700
701
702
703
704
705
706
707
708
709
710
711
712
713
714
715
716
717
718
719
720
721
722
723
724
725
726
727
728
729
730
731
732
733
734
735
736
737
738
739
740
741
742
743
744
745
746
747
748
749
750
751
752
753
754
755
756
757
758
759
760
761
762
763
764
765
766
767
768
769
770
771
772
773
774
775
776
777
778
779
780
781
782
783
784
785
786
787
788
789
790
791
792
793
794
795
796
797
798
799
800
801
802
803
804
805
806
807
808
809
810
811
812
813
814
815
816
817
818
819
820
821
822
823
824
825
826
827
828
829
830
831
832
833
834
835
836
837
838
839
840
841
842
843
844
845
846
847
848
849
850
851
852
853
854
855
856
857
858
859
860
861
862
863
864
865
866
867
868
869
870
871
872
873
874
875
876
877
878
879
880
881
882
883
884
885
886
887
888
889
890
891
892
893
894
895
896
897
898
899
900
901
902
903
904
905
906
907
908
909
910
911
912
913
914
915
916
917
918
919
920
921
922
923
924
925
926
927
928
929
930
931
932
933
934
935
936
937
938
939
940
941
942
943
944
945
946
947
948
949
950
951
952
953
954
955
956
957
958
959
960
961
962
963
964
965
966
967
968
969
970
971
972
973
974
975
976
977
978
979
980
981
982
983
984
985
986
987
988
989
990
991
992
993
994
995
996
997
998
999
1000
1001
1002
1003
1004
1005
1006
1007
1008
1009
1010
1011
1012
1013
1014
1015
1016
1017
1018
1019
1020
1021
1022
1023
1024
1025
1026
1027
1028
1029
1030
1031
1032
1033
1034
1035
1036
1037
1038
1039
1040
1041
1042
1043
1044
1045
1046
1047
1048
1049
1050
1051
1052
1053
1054
1055
1056
1057
1058
1059
1060
1061
1062
1063
1064
1065
1066
1067
1068
1069
1070
1071
1072
1073
1074
1075
1076
1077
1078
1079
1080
1081
1082
1083
1084
1085
1086
1087
1088
1089
1090
1091
1092
1093
1094
1095
1096
1097
1098
1099
1100
1101
1102
1103
1104
1105
1106
1107
1108
1109
1110
1111
1112
1113
1114
1115
1116
1117
1118
1119
1120
1121
1122
1123
1124
1125
1126
1127
1128
1129
1130
1131
1132
1133
1134
1135
1136
1137
1138
1139
1140
1141
1142
1143
1144
1145
1146
1147
1148
1149
1150
1151
1152
1153
1154
1155
1156
1157
1158
1159
1160
1161
1162
1163
1164
1165
1166
1167
1168
1169
1170
1171
1172
1173
1174
1175
1176
1177
1178
1179
1180
1181
1182
1183
1184
1185
1186
1187
1188
1189
1190
1191
1192
1193
1194
1195
1196
1197
1198
1199
1200
1201
1202
1203
1204
1205
1206
1207
1208
1209
1210
1211
1212
1213
1214
1215
1216
1217
1218
1219
1220
1221
1222
1223
1224
1225
1226
1227
1228
1229
1230
1231
1232
1233
1234
1235
1236
1237
1238
1239
1240
1241
1242
1243
1244
1245
1246
1247
1248
1249
1250
1251
1252
1253
1254
1255
1256
1257
1258
1259
1260
1261
1262
1263
1264
1265
1266
1267
1268
1269
1270
1271
1272
1273
1274
1275
1276
1277
1278
1279
1280
1281
1282
1283
1284
1285
1286
1287
1288
1289
1290
1291
1292
1293
1294
1295
1296
1297
1298
1299
1300
1301
1302
1303
1304
1305
1306
1307
1308
1309
1310
1311
1312
1313
1314
1315
1316
1317
1318
1319
1320
1321
1322
1323
1324
1325
1326
1327
1328
1329
1330
1331
1332
1333
1334
1335
1336
1337
1338
1339
1340
1341
1342
1343
1344
1345
1346
1347
1348
1349
1350
1351
1352
1353
1354
1355
1356
1357
1358
1359
1360
1361
1362
1363
1364
1365
1366
1367
1368
1369
1370
1371
1372
1373
1374
1375
1376
1377
1378
1379
1380
1381
1382
1383
1384
1385
1386
1387
1388
1389
1390
1391
1392
1393
1394
1395
1396
1397
1398
1399
1400
1401
1402
1403
1404
1405
1406
1407
1408
1409
1410
1411
1412
1413
1414
1415
1416
1417
1418
1419
1420
1421
1422
1423
1424
1425
1426
1427
1428
1429
1430
1431
1432
1433
1434
1435
1436
1437
1438
1439
1440
1441
1442
1443
1444
1445
1446
1447
1448
1449
1450
1451
1452
1453
1454
1455
1456
1457
1458
1459
1460
1461
1462
1463
1464
1465
1466
1467
1468
1469
1470
1471
1472
1473
1474
1475
1476
1477
1478
1479
1480
1481
1482
1483
1484
1485
1486
1487
1488
1489
1490
1491
1492
1493
1494
1495
1496
1497
1498
1499
1500
1501
1502
1503
1504
1505
1506
1507
1508
1509
1510
1511
1512
1513
1514
1515
1516
1517
1518
1519
1520
1521
1522
1523
1524
1525
1526
1527
1528
1529
1530
1531
1532
1533
1534
1535
1536
1537
1538
1539
1540
1541
1542
1543
1544
1545
1546
1547
1548
1549
1550
1551
1552
1553
1554
1555
1556
1557
1558
1559
1560
1561
1562
1563
1564
1565
1566
1567
1568
1569
1570
1571
1572
1573
1574
1575
1576
1577
1578
1579
1580
1581
1582
1583
1584
1585
1586
1587
1588
1589
1590
1591
1592
1593
1594
1595
1596
1597
1598
1599
1600
1601
1602
1603
1604
1605
1606
1607
1608
1609
1610
1611
1612
1613
1614
1615
1616
1617
1618
1619
1620
1621
1622
1623
1624
1625
1626
1627
1628
1629
1630
1631
1632
1633
1634
1635
1636
1637
1638
1639
1640
1641
1642
1643
1644
1645
1646
1647
1648
1649
1650
1651
1652
1653
1654
1655
1656
1657
1658
1659
1660
1661
1662
1663
1664
1665
1666
1667
1668
1669
1670
1671
1672
1673
1674
1675
1676
1677
1678
1679
1680
1681
1682
1683
1684
1685
1686
1687
1688
1689
1690
1691
1692
1693
1694
1695
1696
1697
1698
1699
1700
1701
1702
1703
1704
1705
1706
1707
1708
1709
1710
1711
1712
1713
1714
1715
1716
1717
1718
1719
1720
1721
1722
1723
1724
1725
1726
1727
1728
1729
1730
1731
1732
1733
1734
1735
1736
1737
1738
1739
1740
1741
1742
1743
1744
1745
1746
1747
1748
1749
1750
1751
1752
1753
1754
1755
1756
1757
1758
1759
1760
1761
1762
1763
1764
1765
1766
1767
1768
1769
1770
1771
1772
1773
1774
1775
1776
1777
1778
1779
1780
1781
1782
1783
1784
1785
1786
1787
1788
1789
1790
1791
1792
1793
1794
1795
1796
1797
1798
1799
1800
1801
1802
1803
1804
1805
1806
1807
1808
1809
1810
1811
1812
1813
1814
1815
1816
1817
1818
1819
1820
1821
1822
1823
1824
1825
1826
1827
1828
1829
1830
1831
1832
1833
1834
1835
1836
1837
1838
1839
1840
1841
1842
1843
1844
1845
1846
1847
1848
1849
1850
1851
1852
1853
1854
1855
1856
1857
1858
1859
1860
1861
1862
1863
1864
1865
1866
1867
1868
1869
1870
1871
1872
1873
1874
1875
1876
1877
1878
1879
1880
1881
1882
1883
1884
1885
1886
1887
1888
1889
1890
1891
1892
1893
1894
1895
1896
1897
1898
1899
1900
1901
1902
1903
1904
1905
1906
1907
1908
1909
1910
1911
1912
1913
1914
1915
1916
1917
1918
1919
1920
1921
1922
1923
1924
1925
1926
1927
1928
1929
1930
1931
1932
1933
1934
1935
1936
1937
1938
1939
1940
1941
1942
1943
1944
1945
1946
1947
1948
1949
1950
1951
1952
1953
1954
1955
1956
1957
1958
1959
1960
1961
1962
1963
1964
1965
1966
1967
1968
1969
1970
1971
1972
1973
1974
1975
1976
1977
1978
1979
1980
1981
1982
1983
1984
1985
1986
1987
1988
1989
1990
1991
1992
1993
1994
1995
1996
1997
1998
1999
2000
2001
2002
2003
2004
2005
2006
2007
2008
2009
2010
2011
2012
2013
2014
2015
2016
2017
2018
2019
2020
2021
2022
2023
2024
2025
2026
2027
2028
2029
2030
2031
2032
2033
2034
2035
2036
2037
2038
2039
2040
2041
2042
2043
2044
2045
2046
2047
2048
2049
2050
2051
2052
2053
2054
2055
2056
2057
2058
2059
2060
2061
2062
2063
2064
2065
2066
2067
2068
2069
2070
2071
2072
2073
2074
2075
2076
2077
2078
2079
2080
2081
2082
2083
2084
2085
2086
2087
2088
2089
2090
2091
2092
2093
2094
2095
2096
2097
2098
2099
2100
2101
2102
2103
2104
2105
2106
2107
2108
2109
2110
2111
2112
2113
2114
2115
2116
2117
2118
2119
2120
2121
2122
2123
2124
2125
2126
2127
2128
2129
2130
2131
2132
2133
2134
2135
2136
2137
2138
2139
2140
2141
2142
2143
2144
2145
2146
2147
2148
2149
2150
2151
2152
2153
2154
2155
2156
2157
2158
2159
2160
2161
2162
2163
2164
2165
2166
2167
2168
2169
2170
2171
2172
2173
2174
2175
2176
2177
2178
2179
2180
2181
2182
2183
2184
2185
2186
2187
2188
2189
2190
2191
2192
2193
2194
2195
2196
2197
2198
2199
2200
2201
2202
2203
2204
2205
2206
2207
2208
2209
2210
2211
2212
2213
2214
2215
2216
2217
2218
2219
2220
2221
2222
2223
2224
2225
2226
2227
2228
2229
2230
2231
2232
2233
2234
2235
2236
2237
2238
2239
2240
2241
2242
2243
2244
2245
2246
2247
2248
2249
2250
2251
2252
2253
2254
2255
2256
2257
2258
2259
2260
2261
2262
2263
2264
2265
2266
2267
2268
2269
2270
2271
2272
2273
2274
2275
2276
2277
2278
2279
2280
2281
2282
2283
2284
2285
2286
2287
2288
2289
2290
2291
2292
2293
2294
2295
2296
2297
2298
2299
2300
2301
2302
2303
2304
2305
2306
2307
2308
2309
2310
2311
2312
2313
2314
2315
2316
2317
2318
2319
2320
2321
2322
2323
2324
2325
2326
2327
2328
2329
2330
2331
2332
2333
2334
2335
2336
2337
2338
2339
2340
2341
2342
2343
2344
2345
2346
2347
2348
2349
2350
2351
2352
2353
2354
2355
2356
2357
2358
2359
2360
2361
2362
2363
2364
2365
2366
2367
2368
2369
2370
2371
2372
2373
2374
2375
2376
2377
2378
2379
2380
2381
2382
2383
2384
2385
2386
2387
2388
2389
2390
2391
2392
2393
2394
2395
2396
2397
2398
2399
2400
2401
2402
2403
2404
2405
2406
2407
2408
2409
2410
2411
2412
2413
2414
2415
2416
2417
2418
2419
2420
2421
2422
2423
2424
2425
2426
2427
2428
2429
2430
2431
2432
2433
2434
2435
2436
2437
2438
2439
2440
2441
2442
2443
2444
2445
2446
2447
2448
2449
2450
2451
2452
2453
2454
2455
2456
2457
2458
2459
2460
2461
2462
2463
2464
2465
2466
2467
2468
2469
2470
2471
2472
2473
2474
2475
2476
2477
2478
2479
2480
2481
2482
2483
2484
2485
2486
2487
2488
2489
2490
2491
2492
2493
2494
2495
2496
2497
2498
2499
2500
2501
2502
2503
2504
2505
2506
2507
2508
2509
2510
2511
2512
2513
2514
2515
2516
2517
2518
2519
2520
2521
2522
2523
2524
2525
2526
2527
2528
2529
2530
2531
2532
2533
2534
2535
2536
2537
2538
2539
2540
2541
2542
2543
2544
2545
2546
2547
2548
2549
2550
2551
2552
2553
2554
2555
2556
2557
2558
2559
2560
2561
2562
2563
2564
2565
2566
2567
2568
2569
2570
2571
2572
2573
2574
2575
2576
2577
2578
2579
2580
2581
2582
2583
2584
2585
2586
2587
2588
2589
2590
2591
2592
2593
2594
2595
2596
2597
2598
2599
2600
2601
2602
2603
2604
2605
2606
2607
2608
2609
2610
2611
2612
2613
2614
2615
2616
2617
2618
2619
2620
2621
2622
2623
2624
2625
2626
2627
2628
2629
2630
2631
2632
2633
2634
2635
2636
2637
2638
2639
2640
2641
2642
2643
2644
2645
2646
2647
2648
2649
2650
2651
2652
2653
2654
2655
2656
2657
2658
2659
2660
2661
2662
2663
2664
2665
2666
2667
2668
2669
2670
2671
2672
2673
2674
2675
2676
2677
2678
2679
2680
2681
2682
2683
2684
2685
2686
2687
2688
2689
2690
2691
2692
2693
2694
2695
2696
2697
2698
2699
2700
2701
2702
2703
2704
2705
2706
2707
2708
2709
2710
2711
2712
2713
2714
2715
2716
2717
2718
2719
2720
2721
2722
2723
2724
2725
2726
2727
2728
2729
2730
2731
2732
2733
2734
2735
2736
2737
2738
2739
2740
2741
2742
2743
2744
2745
2746
2747
2748
2749
2750
2751
2752
2753
2754
2755
2756
2757
2758
2759
2760
2761
2762
2763
2764
2765
2766
2767
2768
2769
2770
2771
2772
2773
2774
2775
2776
2777
2778
2779
2780
2781
2782
2783
2784
2785
2786
2787
2788
2789
2790
2791
2792
2793
2794
2795
2796
2797
2798
2799
2800
2801
2802
2803
2804
2805
2806
2807
2808
2809
2810
2811
2812
2813
2814
2815
2816
2817
2818
2819
2820
2821
2822
2823
2824
2825
2826
2827
2828
2829
2830
2831
2832
2833
2834
2835
2836
2837
2838
2839
2840
2841
2842
2843
2844
2845
2846
2847
2848
2849
2850
2851
2852
2853
2854
2855
2856
2857
2858
2859
2860
2861
2862
2863
2864
2865
2866
2867
2868
2869
2870
2871
2872
2873
2874
2875
2876
2877
2878
2879
2880
2881
2882
2883
2884
2885
2886
2887
2888
2889
2890
2891
2892
2893
2894
2895
2896
2897
2898
2899
2900
2901
2902
2903
2904
2905
2906
2907
2908
2909
2910
2911
2912
2913
2914
2915
2916
2917
2918
2919
2920
2921
2922
2923
2924
2925
2926
2927
2928
2929
2930
2931
2932
2933
2934
2935
2936
2937
2938
2939
2940
2941
2942
2943
2944
2945
2946
2947
2948
2949
2950
2951
2952
2953
2954
2955
2956
2957
2958
2959
2960
2961
2962
2963
2964
2965
2966
2967
2968
2969
2970
2971
2972
2973
2974
2975
2976
2977
2978
2979
2980
2981
2982
2983
2984
2985
2986
2987
2988
2989
2990
2991
2992
2993
2994
2995
2996
2997
2998
2999
3000
3001
3002
3003
3004
3005
3006
3007
3008
3009
3010
3011
3012
3013
3014
3015
3016
3017
3018
3019
3020
3021
3022
3023
3024
3025
3026
3027
3028
3029
3030
3031
3032
3033
3034
3035
3036
3037
3038
3039
3040
3041
3042
3043
3044
3045
3046
3047
3048
3049
3050
3051
3052
3053
3054
3055
3056
3057
3058
3059
3060
3061
3062
3063
3064
3065
3066
3067
3068
3069
3070
3071
3072
3073
3074
3075
3076
3077
3078
3079
3080
3081
3082
3083
3084
3085
3086
3087
3088
3089
3090
3091
3092
3093
3094
3095
3096
3097
3098
3099
3100
3101
3102
3103
3104
3105
3106
3107
3108
3109
3110
3111
3112
3113
3114
3115
3116
3117
3118
3119
3120
3121
3122
3123
3124
3125
3126
3127
3128
3129
3130
3131
3132
3133
3134
3135
3136
3137
3138
3139
3140
3141
3142
3143
3144
3145
3146
3147
3148
3149
3150
3151
3152
3153
3154
3155
3156
3157
3158
3159
3160
3161
3162
3163
3164
3165
3166
3167
3168
3169
3170
3171
3172
3173
3174
3175
3176
3177
3178
3179
3180
3181
3182
3183
3184
3185
3186
3187
3188
3189
3190
3191
3192
3193
3194
3195
3196
3197
3198
3199
3200
3201
3202
3203
3204
3205
3206
3207
3208
3209
3210
3211
3212
3213
3214
3215
3216
3217
3218
3219
3220
3221
3222
3223
3224
3225
3226
3227
3228
3229
3230
3231
3232
3233
3234
3235
3236
3237
3238
3239
3240
3241
3242
3243
3244
3245
3246
3247
3248
3249
3250
3251
3252
3253
3254
3255
3256
3257
3258
3259
3260
3261
3262
3263
3264
3265
3266
3267
3268
3269
3270
3271
3272
3273
3274
3275
3276
3277
3278
3279
3280
3281
3282
3283
3284
3285
3286
3287
3288
3289
3290
3291
3292
3293
3294
3295
3296
3297
3298
3299
3300
3301
3302
3303
3304
3305
3306
3307
3308
3309
3310
3311
3312
3313
3314
3315
3316
3317
3318
3319
3320
3321
3322
3323
3324
3325
3326
3327
3328
3329
3330
3331
3332
3333
3334
3335
3336
3337
3338
3339
3340
3341
3342
3343
3344
3345
3346
3347
3348
3349
3350
3351
3352
3353
3354
3355
3356
3357
3358
3359
3360
3361
3362
3363
3364
3365
3366
3367
3368
3369
3370
3371
3372
3373
3374
3375
3376
3377
3378
3379
3380
3381
3382
3383
3384
3385
3386
3387
3388
3389
3390
3391
3392
3393
3394
3395
3396
3397
3398
3399
3400
3401
3402
3403
3404
3405
3406
3407
3408
3409
3410
3411
3412
3413
3414
3415
3416
3417
3418
3419
3420
3421
3422
3423
3424
3425
3426
3427
3428
3429
3430
3431
3432
3433
3434
3435
3436
3437
3438
3439
3440
3441
3442
3443
3444
3445
3446
3447
3448
3449
3450
3451
3452
3453
3454
3455
3456
3457
3458
3459
3460
3461
3462
3463
3464
3465
3466
3467
3468
3469
3470
3471
3472
3473
3474
3475
3476
3477
3478
3479
3480
3481
3482
3483
3484
3485
3486
3487
3488
3489
3490
3491
3492
3493
3494
3495
3496
3497
3498
3499
3500
3501
3502
3503
3504
3505
3506
3507
3508
3509
3510
3511
3512
3513
3514
3515
3516
3517
3518
3519
3520
3521
3522
3523
3524
3525
3526
3527
3528
3529
3530
3531
3532
3533
3534
3535
3536
3537
3538
3539
3540
3541
3542
3543
3544
3545
3546
3547
3548
3549
3550
3551
3552
3553
3554
3555
3556
3557
3558
3559
3560
3561
3562
3563
3564
3565
3566
3567
3568
3569
3570
3571
3572
3573
3574
3575
3576
3577
3578
3579
3580
3581
3582
3583
3584
3585
3586
3587
3588
3589
3590
3591
3592
3593
3594
3595
|
/* Renesas RX specific support for 32-bit ELF.
Copyright (C) 2008, 2009, 2010, 2011, 2012
Free Software Foundation, Inc.
This file is part of BFD, the Binary File Descriptor library.
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
#include "sysdep.h"
#include "bfd.h"
#include "bfd_stdint.h"
#include "libbfd.h"
#include "elf-bfd.h"
#include "elf/rx.h"
#include "libiberty.h"
#define RX_OPCODE_BIG_ENDIAN 0
/* This is a meta-target that's used only with objcopy, to avoid the
endian-swap we would otherwise get. We check for this in
rx_elf_object_p(). */
const bfd_target bfd_elf32_rx_be_ns_vec;
const bfd_target bfd_elf32_rx_be_vec;
#ifdef DEBUG
char * rx_get_reloc (long);
void rx_dump_symtab (bfd *, void *, void *);
#endif
#define RXREL(n,sz,bit,shift,complain,pcrel) \
HOWTO (R_RX_##n, shift, sz, bit, pcrel, 0, complain_overflow_ ## complain, \
bfd_elf_generic_reloc, "R_RX_" #n, FALSE, 0, ~0, FALSE)
/* Note that the relocations around 0x7f are internal to this file;
feel free to move them as needed to avoid conflicts with published
relocation numbers. */
static reloc_howto_type rx_elf_howto_table [] =
{
RXREL (NONE, 0, 0, 0, dont, FALSE),
RXREL (DIR32, 2, 32, 0, signed, FALSE),
RXREL (DIR24S, 2, 24, 0, signed, FALSE),
RXREL (DIR16, 1, 16, 0, dont, FALSE),
RXREL (DIR16U, 1, 16, 0, unsigned, FALSE),
RXREL (DIR16S, 1, 16, 0, signed, FALSE),
RXREL (DIR8, 0, 8, 0, dont, FALSE),
RXREL (DIR8U, 0, 8, 0, unsigned, FALSE),
RXREL (DIR8S, 0, 8, 0, signed, FALSE),
RXREL (DIR24S_PCREL, 2, 24, 0, signed, TRUE),
RXREL (DIR16S_PCREL, 1, 16, 0, signed, TRUE),
RXREL (DIR8S_PCREL, 0, 8, 0, signed, TRUE),
RXREL (DIR16UL, 1, 16, 2, unsigned, FALSE),
RXREL (DIR16UW, 1, 16, 1, unsigned, FALSE),
RXREL (DIR8UL, 0, 8, 2, unsigned, FALSE),
RXREL (DIR8UW, 0, 8, 1, unsigned, FALSE),
RXREL (DIR32_REV, 1, 16, 0, dont, FALSE),
RXREL (DIR16_REV, 1, 16, 0, dont, FALSE),
RXREL (DIR3U_PCREL, 0, 3, 0, dont, TRUE),
EMPTY_HOWTO (0x13),
EMPTY_HOWTO (0x14),
EMPTY_HOWTO (0x15),
EMPTY_HOWTO (0x16),
EMPTY_HOWTO (0x17),
EMPTY_HOWTO (0x18),
EMPTY_HOWTO (0x19),
EMPTY_HOWTO (0x1a),
EMPTY_HOWTO (0x1b),
EMPTY_HOWTO (0x1c),
EMPTY_HOWTO (0x1d),
EMPTY_HOWTO (0x1e),
EMPTY_HOWTO (0x1f),
RXREL (RH_3_PCREL, 0, 3, 0, signed, TRUE),
RXREL (RH_16_OP, 1, 16, 0, signed, FALSE),
RXREL (RH_24_OP, 2, 24, 0, signed, FALSE),
RXREL (RH_32_OP, 2, 32, 0, signed, FALSE),
RXREL (RH_24_UNS, 2, 24, 0, unsigned, FALSE),
RXREL (RH_8_NEG, 0, 8, 0, signed, FALSE),
RXREL (RH_16_NEG, 1, 16, 0, signed, FALSE),
RXREL (RH_24_NEG, 2, 24, 0, signed, FALSE),
RXREL (RH_32_NEG, 2, 32, 0, signed, FALSE),
RXREL (RH_DIFF, 2, 32, 0, signed, FALSE),
RXREL (RH_GPRELB, 1, 16, 0, unsigned, FALSE),
RXREL (RH_GPRELW, 1, 16, 0, unsigned, FALSE),
RXREL (RH_GPRELL, 1, 16, 0, unsigned, FALSE),
RXREL (RH_RELAX, 0, 0, 0, dont, FALSE),
EMPTY_HOWTO (0x2e),
EMPTY_HOWTO (0x2f),
EMPTY_HOWTO (0x30),
EMPTY_HOWTO (0x31),
EMPTY_HOWTO (0x32),
EMPTY_HOWTO (0x33),
EMPTY_HOWTO (0x34),
EMPTY_HOWTO (0x35),
EMPTY_HOWTO (0x36),
EMPTY_HOWTO (0x37),
EMPTY_HOWTO (0x38),
EMPTY_HOWTO (0x39),
EMPTY_HOWTO (0x3a),
EMPTY_HOWTO (0x3b),
EMPTY_HOWTO (0x3c),
EMPTY_HOWTO (0x3d),
EMPTY_HOWTO (0x3e),
EMPTY_HOWTO (0x3f),
EMPTY_HOWTO (0x40),
RXREL (ABS32, 2, 32, 0, dont, FALSE),
RXREL (ABS24S, 2, 24, 0, signed, FALSE),
RXREL (ABS16, 1, 16, 0, dont, FALSE),
RXREL (ABS16U, 1, 16, 0, unsigned, FALSE),
RXREL (ABS16S, 1, 16, 0, signed, FALSE),
RXREL (ABS8, 0, 8, 0, dont, FALSE),
RXREL (ABS8U, 0, 8, 0, unsigned, FALSE),
RXREL (ABS8S, 0, 8, 0, signed, FALSE),
RXREL (ABS24S_PCREL, 2, 24, 0, signed, TRUE),
RXREL (ABS16S_PCREL, 1, 16, 0, signed, TRUE),
RXREL (ABS8S_PCREL, 0, 8, 0, signed, TRUE),
RXREL (ABS16UL, 1, 16, 0, unsigned, FALSE),
RXREL (ABS16UW, 1, 16, 0, unsigned, FALSE),
RXREL (ABS8UL, 0, 8, 0, unsigned, FALSE),
RXREL (ABS8UW, 0, 8, 0, unsigned, FALSE),
RXREL (ABS32_REV, 2, 32, 0, dont, FALSE),
RXREL (ABS16_REV, 1, 16, 0, dont, FALSE),
#define STACK_REL_P(x) ((x) <= R_RX_ABS16_REV && (x) >= R_RX_ABS32)
EMPTY_HOWTO (0x52),
EMPTY_HOWTO (0x53),
EMPTY_HOWTO (0x54),
EMPTY_HOWTO (0x55),
EMPTY_HOWTO (0x56),
EMPTY_HOWTO (0x57),
EMPTY_HOWTO (0x58),
EMPTY_HOWTO (0x59),
EMPTY_HOWTO (0x5a),
EMPTY_HOWTO (0x5b),
EMPTY_HOWTO (0x5c),
EMPTY_HOWTO (0x5d),
EMPTY_HOWTO (0x5e),
EMPTY_HOWTO (0x5f),
EMPTY_HOWTO (0x60),
EMPTY_HOWTO (0x61),
EMPTY_HOWTO (0x62),
EMPTY_HOWTO (0x63),
EMPTY_HOWTO (0x64),
EMPTY_HOWTO (0x65),
EMPTY_HOWTO (0x66),
EMPTY_HOWTO (0x67),
EMPTY_HOWTO (0x68),
EMPTY_HOWTO (0x69),
EMPTY_HOWTO (0x6a),
EMPTY_HOWTO (0x6b),
EMPTY_HOWTO (0x6c),
EMPTY_HOWTO (0x6d),
EMPTY_HOWTO (0x6e),
EMPTY_HOWTO (0x6f),
EMPTY_HOWTO (0x70),
EMPTY_HOWTO (0x71),
EMPTY_HOWTO (0x72),
EMPTY_HOWTO (0x73),
EMPTY_HOWTO (0x74),
EMPTY_HOWTO (0x75),
EMPTY_HOWTO (0x76),
EMPTY_HOWTO (0x77),
/* These are internal. */
/* A 5-bit unsigned displacement to a B/W/L address, at bit position 8/12. */
/* ---- ---- 4--- 3210. */
#define R_RX_RH_ABS5p8B 0x78
RXREL (RH_ABS5p8B, 0, 0, 0, dont, FALSE),
#define R_RX_RH_ABS5p8W 0x79
RXREL (RH_ABS5p8W, 0, 0, 0, dont, FALSE),
#define R_RX_RH_ABS5p8L 0x7a
RXREL (RH_ABS5p8L, 0, 0, 0, dont, FALSE),
/* A 5-bit unsigned displacement to a B/W/L address, at bit position 5/12. */
/* ---- -432 1--- 0---. */
#define R_RX_RH_ABS5p5B 0x7b
RXREL (RH_ABS5p5B, 0, 0, 0, dont, FALSE),
#define R_RX_RH_ABS5p5W 0x7c
RXREL (RH_ABS5p5W, 0, 0, 0, dont, FALSE),
#define R_RX_RH_ABS5p5L 0x7d
RXREL (RH_ABS5p5L, 0, 0, 0, dont, FALSE),
/* A 4-bit unsigned immediate at bit position 8. */
#define R_RX_RH_UIMM4p8 0x7e
RXREL (RH_UIMM4p8, 0, 0, 0, dont, FALSE),
/* A 4-bit negative unsigned immediate at bit position 8. */
#define R_RX_RH_UNEG4p8 0x7f
RXREL (RH_UNEG4p8, 0, 0, 0, dont, FALSE),
/* End of internal relocs. */
RXREL (SYM, 2, 32, 0, dont, FALSE),
RXREL (OPneg, 2, 32, 0, dont, FALSE),
RXREL (OPadd, 2, 32, 0, dont, FALSE),
RXREL (OPsub, 2, 32, 0, dont, FALSE),
RXREL (OPmul, 2, 32, 0, dont, FALSE),
RXREL (OPdiv, 2, 32, 0, dont, FALSE),
RXREL (OPshla, 2, 32, 0, dont, FALSE),
RXREL (OPshra, 2, 32, 0, dont, FALSE),
RXREL (OPsctsize, 2, 32, 0, dont, FALSE),
RXREL (OPscttop, 2, 32, 0, dont, FALSE),
RXREL (OPand, 2, 32, 0, dont, FALSE),
RXREL (OPor, 2, 32, 0, dont, FALSE),
RXREL (OPxor, 2, 32, 0, dont, FALSE),
RXREL (OPnot, 2, 32, 0, dont, FALSE),
RXREL (OPmod, 2, 32, 0, dont, FALSE),
RXREL (OPromtop, 2, 32, 0, dont, FALSE),
RXREL (OPramtop, 2, 32, 0, dont, FALSE)
};
/* Map BFD reloc types to RX ELF reloc types. */
struct rx_reloc_map
{
bfd_reloc_code_real_type bfd_reloc_val;
unsigned int rx_reloc_val;
};
static const struct rx_reloc_map rx_reloc_map [] =
{
{ BFD_RELOC_NONE, R_RX_NONE },
{ BFD_RELOC_8, R_RX_DIR8S },
{ BFD_RELOC_16, R_RX_DIR16S },
{ BFD_RELOC_24, R_RX_DIR24S },
{ BFD_RELOC_32, R_RX_DIR32 },
{ BFD_RELOC_RX_16_OP, R_RX_DIR16 },
{ BFD_RELOC_RX_DIR3U_PCREL, R_RX_DIR3U_PCREL },
{ BFD_RELOC_8_PCREL, R_RX_DIR8S_PCREL },
{ BFD_RELOC_16_PCREL, R_RX_DIR16S_PCREL },
{ BFD_RELOC_24_PCREL, R_RX_DIR24S_PCREL },
{ BFD_RELOC_RX_8U, R_RX_DIR8U },
{ BFD_RELOC_RX_16U, R_RX_DIR16U },
{ BFD_RELOC_RX_24U, R_RX_RH_24_UNS },
{ BFD_RELOC_RX_NEG8, R_RX_RH_8_NEG },
{ BFD_RELOC_RX_NEG16, R_RX_RH_16_NEG },
{ BFD_RELOC_RX_NEG24, R_RX_RH_24_NEG },
{ BFD_RELOC_RX_NEG32, R_RX_RH_32_NEG },
{ BFD_RELOC_RX_DIFF, R_RX_RH_DIFF },
{ BFD_RELOC_RX_GPRELB, R_RX_RH_GPRELB },
{ BFD_RELOC_RX_GPRELW, R_RX_RH_GPRELW },
{ BFD_RELOC_RX_GPRELL, R_RX_RH_GPRELL },
{ BFD_RELOC_RX_RELAX, R_RX_RH_RELAX },
{ BFD_RELOC_RX_SYM, R_RX_SYM },
{ BFD_RELOC_RX_OP_SUBTRACT, R_RX_OPsub },
{ BFD_RELOC_RX_OP_NEG, R_RX_OPneg },
{ BFD_RELOC_RX_ABS8, R_RX_ABS8 },
{ BFD_RELOC_RX_ABS16, R_RX_ABS16 },
{ BFD_RELOC_RX_ABS16_REV, R_RX_ABS16_REV },
{ BFD_RELOC_RX_ABS32, R_RX_ABS32 },
{ BFD_RELOC_RX_ABS32_REV, R_RX_ABS32_REV },
{ BFD_RELOC_RX_ABS16UL, R_RX_ABS16UL },
{ BFD_RELOC_RX_ABS16UW, R_RX_ABS16UW },
{ BFD_RELOC_RX_ABS16U, R_RX_ABS16U }
};
#define BIGE(abfd) ((abfd)->xvec->byteorder == BFD_ENDIAN_BIG)
static reloc_howto_type *
rx_reloc_type_lookup (bfd * abfd ATTRIBUTE_UNUSED,
bfd_reloc_code_real_type code)
{
unsigned int i;
if (code == BFD_RELOC_RX_32_OP)
return rx_elf_howto_table + R_RX_DIR32;
for (i = ARRAY_SIZE (rx_reloc_map); --i;)
if (rx_reloc_map [i].bfd_reloc_val == code)
return rx_elf_howto_table + rx_reloc_map[i].rx_reloc_val;
return NULL;
}
static reloc_howto_type *
rx_reloc_name_lookup (bfd * abfd ATTRIBUTE_UNUSED, const char * r_name)
{
unsigned int i;
for (i = 0; i < ARRAY_SIZE (rx_elf_howto_table); i++)
if (rx_elf_howto_table[i].name != NULL
&& strcasecmp (rx_elf_howto_table[i].name, r_name) == 0)
return rx_elf_howto_table + i;
return NULL;
}
/* Set the howto pointer for an RX ELF reloc. */
static void
rx_info_to_howto_rela (bfd * abfd ATTRIBUTE_UNUSED,
arelent * cache_ptr,
Elf_Internal_Rela * dst)
{
unsigned int r_type;
r_type = ELF32_R_TYPE (dst->r_info);
BFD_ASSERT (r_type < (unsigned int) R_RX_max);
cache_ptr->howto = rx_elf_howto_table + r_type;
}
static bfd_vma
get_symbol_value (const char * name,
bfd_reloc_status_type * status,
struct bfd_link_info * info,
bfd * input_bfd,
asection * input_section,
int offset)
{
bfd_vma value = 0;
struct bfd_link_hash_entry * h;
h = bfd_link_hash_lookup (info->hash, name, FALSE, FALSE, TRUE);
if (h == NULL
|| (h->type != bfd_link_hash_defined
&& h->type != bfd_link_hash_defweak))
* status = info->callbacks->undefined_symbol
(info, name, input_bfd, input_section, offset, TRUE);
else
value = (h->u.def.value
+ h->u.def.section->output_section->vma
+ h->u.def.section->output_offset);
return value;
}
static bfd_vma
get_gp (bfd_reloc_status_type * status,
struct bfd_link_info * info,
bfd * abfd,
asection * sec,
int offset)
{
static bfd_boolean cached = FALSE;
static bfd_vma cached_value = 0;
if (!cached)
{
cached_value = get_symbol_value ("__gp", status, info, abfd, sec, offset);
cached = TRUE;
}
return cached_value;
}
static bfd_vma
get_romstart (bfd_reloc_status_type * status,
struct bfd_link_info * info,
bfd * abfd,
asection * sec,
int offset)
{
static bfd_boolean cached = FALSE;
static bfd_vma cached_value = 0;
if (!cached)
{
cached_value = get_symbol_value ("_start", status, info, abfd, sec, offset);
cached = TRUE;
}
return cached_value;
}
static bfd_vma
get_ramstart (bfd_reloc_status_type * status,
struct bfd_link_info * info,
bfd * abfd,
asection * sec,
int offset)
{
static bfd_boolean cached = FALSE;
static bfd_vma cached_value = 0;
if (!cached)
{
cached_value = get_symbol_value ("__datastart", status, info, abfd, sec, offset);
cached = TRUE;
}
return cached_value;
}
#define NUM_STACK_ENTRIES 16
static int32_t rx_stack [ NUM_STACK_ENTRIES ];
static unsigned int rx_stack_top;
#define RX_STACK_PUSH(val) \
do \
{ \
if (rx_stack_top < NUM_STACK_ENTRIES) \
rx_stack [rx_stack_top ++] = (val); \
else \
r = bfd_reloc_dangerous; \
} \
while (0)
#define RX_STACK_POP(dest) \
do \
{ \
if (rx_stack_top > 0) \
(dest) = rx_stack [-- rx_stack_top]; \
else \
(dest) = 0, r = bfd_reloc_dangerous; \
} \
while (0)
/* Relocate an RX ELF section.
There is some attempt to make this function usable for many architectures,
both USE_REL and USE_RELA ['twould be nice if such a critter existed],
if only to serve as a learning tool.
The RELOCATE_SECTION function is called by the new ELF backend linker
to handle the relocations for a section.
The relocs are always passed as Rela structures; if the section
actually uses Rel structures, the r_addend field will always be
zero.
This function is responsible for adjusting the section contents as
necessary, and (if using Rela relocs and generating a relocatable
output file) adjusting the reloc addend as necessary.
This function does not have to worry about setting the reloc
address or the reloc symbol index.
LOCAL_SYMS is a pointer to the swapped in local symbols.
LOCAL_SECTIONS is an array giving the section in the input file
corresponding to the st_shndx field of each local symbol.
The global hash table entry for the global symbols can be found
via elf_sym_hashes (input_bfd).
When generating relocatable output, this function must handle
STB_LOCAL/STT_SECTION symbols specially. The output symbol is
going to be the section symbol corresponding to the output
section, which means that the addend must be adjusted
accordingly. */
static bfd_boolean
rx_elf_relocate_section
(bfd * output_bfd,
struct bfd_link_info * info,
bfd * input_bfd,
asection * input_section,
bfd_byte * contents,
Elf_Internal_Rela * relocs,
Elf_Internal_Sym * local_syms,
asection ** local_sections)
{
Elf_Internal_Shdr * symtab_hdr;
struct elf_link_hash_entry ** sym_hashes;
Elf_Internal_Rela * rel;
Elf_Internal_Rela * relend;
bfd_boolean pid_mode;
bfd_boolean saw_subtract = FALSE;
if (elf_elfheader (output_bfd)->e_flags & E_FLAG_RX_PID)
pid_mode = TRUE;
else
pid_mode = FALSE;
symtab_hdr = & elf_tdata (input_bfd)->symtab_hdr;
sym_hashes = elf_sym_hashes (input_bfd);
relend = relocs + input_section->reloc_count;
for (rel = relocs; rel < relend; rel ++)
{
reloc_howto_type * howto;
unsigned long r_symndx;
Elf_Internal_Sym * sym;
asection * sec;
struct elf_link_hash_entry * h;
bfd_vma relocation;
bfd_reloc_status_type r;
const char * name = NULL;
bfd_boolean unresolved_reloc = TRUE;
int r_type;
r_type = ELF32_R_TYPE (rel->r_info);
r_symndx = ELF32_R_SYM (rel->r_info);
howto = rx_elf_howto_table + ELF32_R_TYPE (rel->r_info);
h = NULL;
sym = NULL;
sec = NULL;
relocation = 0;
if (rx_stack_top == 0)
saw_subtract = FALSE;
if (r_symndx < symtab_hdr->sh_info)
{
sym = local_syms + r_symndx;
sec = local_sections [r_symndx];
relocation = _bfd_elf_rela_local_sym (output_bfd, sym, & sec, rel);
name = bfd_elf_string_from_elf_section
(input_bfd, symtab_hdr->sh_link, sym->st_name);
name = (sym->st_name == 0) ? bfd_section_name (input_bfd, sec) : name;
}
else
{
bfd_boolean warned;
RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
r_symndx, symtab_hdr, sym_hashes, h,
sec, relocation, unresolved_reloc,
warned);
name = h->root.root.string;
}
if (sec != NULL && discarded_section (sec))
RELOC_AGAINST_DISCARDED_SECTION (info, input_bfd, input_section,
rel, 1, relend, howto, 0, contents);
if (info->relocatable)
{
/* This is a relocatable link. We don't have to change
anything, unless the reloc is against a section symbol,
in which case we have to adjust according to where the
section symbol winds up in the output section. */
if (sym != NULL && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
rel->r_addend += sec->output_offset;
continue;
}
if (h != NULL && h->root.type == bfd_link_hash_undefweak)
/* If the symbol is undefined and weak
then the relocation resolves to zero. */
relocation = 0;
else
{
if (howto->pc_relative)
{
relocation -= (input_section->output_section->vma
+ input_section->output_offset
+ rel->r_offset);
if (r_type != R_RX_RH_3_PCREL
&& r_type != R_RX_DIR3U_PCREL)
relocation ++;
}
relocation += rel->r_addend;
}
r = bfd_reloc_ok;
#define RANGE(a,b) if (a > (long) relocation || (long) relocation > b) r = bfd_reloc_overflow
#define ALIGN(m) if (relocation & m) r = bfd_reloc_other;
#define OP(i) (contents[rel->r_offset + (i)])
#define WARN_REDHAT(type) \
_bfd_error_handler (_("%B:%A: Warning: deprecated Red Hat reloc " type " detected against: %s."), \
input_bfd, input_section, name)
/* Check for unsafe relocs in PID mode. These are any relocs where
an absolute address is being computed. There are special cases
for relocs against symbols that are known to be referenced in
crt0.o before the PID base address register has been initialised. */
#define UNSAFE_FOR_PID \
do \
{ \
if (pid_mode \
&& sec != NULL \
&& sec->flags & SEC_READONLY \
&& !(input_section->flags & SEC_DEBUGGING) \
&& strcmp (name, "__pid_base") != 0 \
&& strcmp (name, "__gp") != 0 \
&& strcmp (name, "__romdatastart") != 0 \
&& !saw_subtract) \
_bfd_error_handler (_("%B(%A): unsafe PID relocation %s at 0x%08lx (against %s in %s)"), \
input_bfd, input_section, howto->name, \
input_section->output_section->vma + input_section->output_offset + rel->r_offset, \
name, sec->name); \
} \
while (0)
/* Opcode relocs are always big endian. Data relocs are bi-endian. */
switch (r_type)
{
case R_RX_NONE:
break;
case R_RX_RH_RELAX:
break;
case R_RX_RH_3_PCREL:
WARN_REDHAT ("RX_RH_3_PCREL");
RANGE (3, 10);
OP (0) &= 0xf8;
OP (0) |= relocation & 0x07;
break;
case R_RX_RH_8_NEG:
WARN_REDHAT ("RX_RH_8_NEG");
relocation = - relocation;
case R_RX_DIR8S_PCREL:
UNSAFE_FOR_PID;
RANGE (-128, 127);
OP (0) = relocation;
break;
case R_RX_DIR8S:
UNSAFE_FOR_PID;
RANGE (-128, 255);
OP (0) = relocation;
break;
case R_RX_DIR8U:
UNSAFE_FOR_PID;
RANGE (0, 255);
OP (0) = relocation;
break;
case R_RX_RH_16_NEG:
WARN_REDHAT ("RX_RH_16_NEG");
relocation = - relocation;
case R_RX_DIR16S_PCREL:
UNSAFE_FOR_PID;
RANGE (-32768, 32767);
#if RX_OPCODE_BIG_ENDIAN
#else
OP (0) = relocation;
OP (1) = relocation >> 8;
#endif
break;
case R_RX_RH_16_OP:
WARN_REDHAT ("RX_RH_16_OP");
UNSAFE_FOR_PID;
RANGE (-32768, 32767);
#if RX_OPCODE_BIG_ENDIAN
OP (1) = relocation;
OP (0) = relocation >> 8;
#else
OP (0) = relocation;
OP (1) = relocation >> 8;
#endif
break;
case R_RX_DIR16S:
UNSAFE_FOR_PID;
RANGE (-32768, 65535);
if (BIGE (output_bfd) && !(input_section->flags & SEC_CODE))
{
OP (1) = relocation;
OP (0) = relocation >> 8;
}
else
{
OP (0) = relocation;
OP (1) = relocation >> 8;
}
break;
case R_RX_DIR16U:
UNSAFE_FOR_PID;
RANGE (0, 65536);
#if RX_OPCODE_BIG_ENDIAN
OP (1) = relocation;
OP (0) = relocation >> 8;
#else
OP (0) = relocation;
OP (1) = relocation >> 8;
#endif
break;
case R_RX_DIR16:
UNSAFE_FOR_PID;
RANGE (-32768, 65536);
#if RX_OPCODE_BIG_ENDIAN
OP (1) = relocation;
OP (0) = relocation >> 8;
#else
OP (0) = relocation;
OP (1) = relocation >> 8;
#endif
break;
case R_RX_DIR16_REV:
UNSAFE_FOR_PID;
RANGE (-32768, 65536);
#if RX_OPCODE_BIG_ENDIAN
OP (0) = relocation;
OP (1) = relocation >> 8;
#else
OP (1) = relocation;
OP (0) = relocation >> 8;
#endif
break;
case R_RX_DIR3U_PCREL:
RANGE (3, 10);
OP (0) &= 0xf8;
OP (0) |= relocation & 0x07;
break;
case R_RX_RH_24_NEG:
UNSAFE_FOR_PID;
WARN_REDHAT ("RX_RH_24_NEG");
relocation = - relocation;
case R_RX_DIR24S_PCREL:
RANGE (-0x800000, 0x7fffff);
#if RX_OPCODE_BIG_ENDIAN
OP (2) = relocation;
OP (1) = relocation >> 8;
OP (0) = relocation >> 16;
#else
OP (0) = relocation;
OP (1) = relocation >> 8;
OP (2) = relocation >> 16;
#endif
break;
case R_RX_RH_24_OP:
UNSAFE_FOR_PID;
WARN_REDHAT ("RX_RH_24_OP");
RANGE (-0x800000, 0x7fffff);
#if RX_OPCODE_BIG_ENDIAN
OP (2) = relocation;
OP (1) = relocation >> 8;
OP (0) = relocation >> 16;
#else
OP (0) = relocation;
OP (1) = relocation >> 8;
OP (2) = relocation >> 16;
#endif
break;
case R_RX_DIR24S:
UNSAFE_FOR_PID;
RANGE (-0x800000, 0x7fffff);
if (BIGE (output_bfd) && !(input_section->flags & SEC_CODE))
{
OP (2) = relocation;
OP (1) = relocation >> 8;
OP (0) = relocation >> 16;
}
else
{
OP (0) = relocation;
OP (1) = relocation >> 8;
OP (2) = relocation >> 16;
}
break;
case R_RX_RH_24_UNS:
UNSAFE_FOR_PID;
WARN_REDHAT ("RX_RH_24_UNS");
RANGE (0, 0xffffff);
#if RX_OPCODE_BIG_ENDIAN
OP (2) = relocation;
OP (1) = relocation >> 8;
OP (0) = relocation >> 16;
#else
OP (0) = relocation;
OP (1) = relocation >> 8;
OP (2) = relocation >> 16;
#endif
break;
case R_RX_RH_32_NEG:
UNSAFE_FOR_PID;
WARN_REDHAT ("RX_RH_32_NEG");
relocation = - relocation;
#if RX_OPCODE_BIG_ENDIAN
OP (3) = relocation;
OP (2) = relocation >> 8;
OP (1) = relocation >> 16;
OP (0) = relocation >> 24;
#else
OP (0) = relocation;
OP (1) = relocation >> 8;
OP (2) = relocation >> 16;
OP (3) = relocation >> 24;
#endif
break;
case R_RX_RH_32_OP:
UNSAFE_FOR_PID;
WARN_REDHAT ("RX_RH_32_OP");
#if RX_OPCODE_BIG_ENDIAN
OP (3) = relocation;
OP (2) = relocation >> 8;
OP (1) = relocation >> 16;
OP (0) = relocation >> 24;
#else
OP (0) = relocation;
OP (1) = relocation >> 8;
OP (2) = relocation >> 16;
OP (3) = relocation >> 24;
#endif
break;
case R_RX_DIR32:
if (BIGE (output_bfd) && !(input_section->flags & SEC_CODE))
{
OP (3) = relocation;
OP (2) = relocation >> 8;
OP (1) = relocation >> 16;
OP (0) = relocation >> 24;
}
else
{
OP (0) = relocation;
OP (1) = relocation >> 8;
OP (2) = relocation >> 16;
OP (3) = relocation >> 24;
}
break;
case R_RX_DIR32_REV:
if (BIGE (output_bfd))
{
OP (0) = relocation;
OP (1) = relocation >> 8;
OP (2) = relocation >> 16;
OP (3) = relocation >> 24;
}
else
{
OP (3) = relocation;
OP (2) = relocation >> 8;
OP (1) = relocation >> 16;
OP (0) = relocation >> 24;
}
break;
case R_RX_RH_DIFF:
{
bfd_vma val;
WARN_REDHAT ("RX_RH_DIFF");
val = bfd_get_32 (output_bfd, & OP (0));
val -= relocation;
bfd_put_32 (output_bfd, val, & OP (0));
}
break;
case R_RX_RH_GPRELB:
WARN_REDHAT ("RX_RH_GPRELB");
relocation -= get_gp (&r, info, input_bfd, input_section, rel->r_offset);
RANGE (0, 65535);
#if RX_OPCODE_BIG_ENDIAN
OP (1) = relocation;
OP (0) = relocation >> 8;
#else
OP (0) = relocation;
OP (1) = relocation >> 8;
#endif
break;
case R_RX_RH_GPRELW:
WARN_REDHAT ("RX_RH_GPRELW");
relocation -= get_gp (&r, info, input_bfd, input_section, rel->r_offset);
ALIGN (1);
relocation >>= 1;
RANGE (0, 65535);
#if RX_OPCODE_BIG_ENDIAN
OP (1) = relocation;
OP (0) = relocation >> 8;
#else
OP (0) = relocation;
OP (1) = relocation >> 8;
#endif
break;
case R_RX_RH_GPRELL:
WARN_REDHAT ("RX_RH_GPRELL");
relocation -= get_gp (&r, info, input_bfd, input_section, rel->r_offset);
ALIGN (3);
relocation >>= 2;
RANGE (0, 65535);
#if RX_OPCODE_BIG_ENDIAN
OP (1) = relocation;
OP (0) = relocation >> 8;
#else
OP (0) = relocation;
OP (1) = relocation >> 8;
#endif
break;
/* Internal relocations just for relaxation: */
case R_RX_RH_ABS5p5B:
RX_STACK_POP (relocation);
RANGE (0, 31);
OP (0) &= 0xf8;
OP (0) |= relocation >> 2;
OP (1) &= 0x77;
OP (1) |= (relocation << 6) & 0x80;
OP (1) |= (relocation << 3) & 0x08;
break;
case R_RX_RH_ABS5p5W:
RX_STACK_POP (relocation);
RANGE (0, 62);
ALIGN (1);
relocation >>= 1;
OP (0) &= 0xf8;
OP (0) |= relocation >> 2;
OP (1) &= 0x77;
OP (1) |= (relocation << 6) & 0x80;
OP (1) |= (relocation << 3) & 0x08;
break;
case R_RX_RH_ABS5p5L:
RX_STACK_POP (relocation);
RANGE (0, 124);
ALIGN (3);
relocation >>= 2;
OP (0) &= 0xf8;
OP (0) |= relocation >> 2;
OP (1) &= 0x77;
OP (1) |= (relocation << 6) & 0x80;
OP (1) |= (relocation << 3) & 0x08;
break;
case R_RX_RH_ABS5p8B:
RX_STACK_POP (relocation);
RANGE (0, 31);
OP (0) &= 0x70;
OP (0) |= (relocation << 3) & 0x80;
OP (0) |= relocation & 0x0f;
break;
case R_RX_RH_ABS5p8W:
RX_STACK_POP (relocation);
RANGE (0, 62);
ALIGN (1);
relocation >>= 1;
OP (0) &= 0x70;
OP (0) |= (relocation << 3) & 0x80;
OP (0) |= relocation & 0x0f;
break;
case R_RX_RH_ABS5p8L:
RX_STACK_POP (relocation);
RANGE (0, 124);
ALIGN (3);
relocation >>= 2;
OP (0) &= 0x70;
OP (0) |= (relocation << 3) & 0x80;
OP (0) |= relocation & 0x0f;
break;
case R_RX_RH_UIMM4p8:
RANGE (0, 15);
OP (0) &= 0x0f;
OP (0) |= relocation << 4;
break;
case R_RX_RH_UNEG4p8:
RANGE (-15, 0);
OP (0) &= 0x0f;
OP (0) |= (-relocation) << 4;
break;
/* Complex reloc handling: */
case R_RX_ABS32:
UNSAFE_FOR_PID;
RX_STACK_POP (relocation);
#if RX_OPCODE_BIG_ENDIAN
OP (3) = relocation;
OP (2) = relocation >> 8;
OP (1) = relocation >> 16;
OP (0) = relocation >> 24;
#else
OP (0) = relocation;
OP (1) = relocation >> 8;
OP (2) = relocation >> 16;
OP (3) = relocation >> 24;
#endif
break;
case R_RX_ABS32_REV:
UNSAFE_FOR_PID;
RX_STACK_POP (relocation);
#if RX_OPCODE_BIG_ENDIAN
OP (0) = relocation;
OP (1) = relocation >> 8;
OP (2) = relocation >> 16;
OP (3) = relocation >> 24;
#else
OP (3) = relocation;
OP (2) = relocation >> 8;
OP (1) = relocation >> 16;
OP (0) = relocation >> 24;
#endif
break;
case R_RX_ABS24S_PCREL:
case R_RX_ABS24S:
UNSAFE_FOR_PID;
RX_STACK_POP (relocation);
RANGE (-0x800000, 0x7fffff);
if (BIGE (output_bfd) && !(input_section->flags & SEC_CODE))
{
OP (2) = relocation;
OP (1) = relocation >> 8;
OP (0) = relocation >> 16;
}
else
{
OP (0) = relocation;
OP (1) = relocation >> 8;
OP (2) = relocation >> 16;
}
break;
case R_RX_ABS16:
UNSAFE_FOR_PID;
RX_STACK_POP (relocation);
RANGE (-32768, 65535);
#if RX_OPCODE_BIG_ENDIAN
OP (1) = relocation;
OP (0) = relocation >> 8;
#else
OP (0) = relocation;
OP (1) = relocation >> 8;
#endif
break;
case R_RX_ABS16_REV:
UNSAFE_FOR_PID;
RX_STACK_POP (relocation);
RANGE (-32768, 65535);
#if RX_OPCODE_BIG_ENDIAN
OP (0) = relocation;
OP (1) = relocation >> 8;
#else
OP (1) = relocation;
OP (0) = relocation >> 8;
#endif
break;
case R_RX_ABS16S_PCREL:
case R_RX_ABS16S:
RX_STACK_POP (relocation);
RANGE (-32768, 32767);
if (BIGE (output_bfd) && !(input_section->flags & SEC_CODE))
{
OP (1) = relocation;
OP (0) = relocation >> 8;
}
else
{
OP (0) = relocation;
OP (1) = relocation >> 8;
}
break;
case R_RX_ABS16U:
UNSAFE_FOR_PID;
RX_STACK_POP (relocation);
RANGE (0, 65536);
#if RX_OPCODE_BIG_ENDIAN
OP (1) = relocation;
OP (0) = relocation >> 8;
#else
OP (0) = relocation;
OP (1) = relocation >> 8;
#endif
break;
case R_RX_ABS16UL:
UNSAFE_FOR_PID;
RX_STACK_POP (relocation);
relocation >>= 2;
RANGE (0, 65536);
#if RX_OPCODE_BIG_ENDIAN
OP (1) = relocation;
OP (0) = relocation >> 8;
#else
OP (0) = relocation;
OP (1) = relocation >> 8;
#endif
break;
case R_RX_ABS16UW:
UNSAFE_FOR_PID;
RX_STACK_POP (relocation);
relocation >>= 1;
RANGE (0, 65536);
#if RX_OPCODE_BIG_ENDIAN
OP (1) = relocation;
OP (0) = relocation >> 8;
#else
OP (0) = relocation;
OP (1) = relocation >> 8;
#endif
break;
case R_RX_ABS8:
UNSAFE_FOR_PID;
RX_STACK_POP (relocation);
RANGE (-128, 255);
OP (0) = relocation;
break;
case R_RX_ABS8U:
UNSAFE_FOR_PID;
RX_STACK_POP (relocation);
RANGE (0, 255);
OP (0) = relocation;
break;
case R_RX_ABS8UL:
UNSAFE_FOR_PID;
RX_STACK_POP (relocation);
relocation >>= 2;
RANGE (0, 255);
OP (0) = relocation;
break;
case R_RX_ABS8UW:
UNSAFE_FOR_PID;
RX_STACK_POP (relocation);
relocation >>= 1;
RANGE (0, 255);
OP (0) = relocation;
break;
case R_RX_ABS8S:
UNSAFE_FOR_PID;
case R_RX_ABS8S_PCREL:
RX_STACK_POP (relocation);
RANGE (-128, 127);
OP (0) = relocation;
break;
case R_RX_SYM:
if (r_symndx < symtab_hdr->sh_info)
RX_STACK_PUSH (sec->output_section->vma
+ sec->output_offset
+ sym->st_value
+ rel->r_addend);
else
{
if (h != NULL
&& (h->root.type == bfd_link_hash_defined
|| h->root.type == bfd_link_hash_defweak))
RX_STACK_PUSH (h->root.u.def.value
+ sec->output_section->vma
+ sec->output_offset
+ rel->r_addend);
else
_bfd_error_handler (_("Warning: RX_SYM reloc with an unknown symbol"));
}
break;
case R_RX_OPneg:
{
int32_t tmp;
saw_subtract = TRUE;
RX_STACK_POP (tmp);
tmp = - tmp;
RX_STACK_PUSH (tmp);
}
break;
case R_RX_OPadd:
{
int32_t tmp1, tmp2;
RX_STACK_POP (tmp1);
RX_STACK_POP (tmp2);
tmp1 += tmp2;
RX_STACK_PUSH (tmp1);
}
break;
case R_RX_OPsub:
{
int32_t tmp1, tmp2;
saw_subtract = TRUE;
RX_STACK_POP (tmp1);
RX_STACK_POP (tmp2);
tmp2 -= tmp1;
RX_STACK_PUSH (tmp2);
}
break;
case R_RX_OPmul:
{
int32_t tmp1, tmp2;
RX_STACK_POP (tmp1);
RX_STACK_POP (tmp2);
tmp1 *= tmp2;
RX_STACK_PUSH (tmp1);
}
break;
case R_RX_OPdiv:
{
int32_t tmp1, tmp2;
RX_STACK_POP (tmp1);
RX_STACK_POP (tmp2);
tmp1 /= tmp2;
RX_STACK_PUSH (tmp1);
}
break;
case R_RX_OPshla:
{
int32_t tmp1, tmp2;
RX_STACK_POP (tmp1);
RX_STACK_POP (tmp2);
tmp1 <<= tmp2;
RX_STACK_PUSH (tmp1);
}
break;
case R_RX_OPshra:
{
int32_t tmp1, tmp2;
RX_STACK_POP (tmp1);
RX_STACK_POP (tmp2);
tmp1 >>= tmp2;
RX_STACK_PUSH (tmp1);
}
break;
case R_RX_OPsctsize:
RX_STACK_PUSH (input_section->size);
break;
case R_RX_OPscttop:
RX_STACK_PUSH (input_section->output_section->vma);
break;
case R_RX_OPand:
{
int32_t tmp1, tmp2;
RX_STACK_POP (tmp1);
RX_STACK_POP (tmp2);
tmp1 &= tmp2;
RX_STACK_PUSH (tmp1);
}
break;
case R_RX_OPor:
{
int32_t tmp1, tmp2;
RX_STACK_POP (tmp1);
RX_STACK_POP (tmp2);
tmp1 |= tmp2;
RX_STACK_PUSH (tmp1);
}
break;
case R_RX_OPxor:
{
int32_t tmp1, tmp2;
RX_STACK_POP (tmp1);
RX_STACK_POP (tmp2);
tmp1 ^= tmp2;
RX_STACK_PUSH (tmp1);
}
break;
case R_RX_OPnot:
{
int32_t tmp;
RX_STACK_POP (tmp);
tmp = ~ tmp;
RX_STACK_PUSH (tmp);
}
break;
case R_RX_OPmod:
{
int32_t tmp1, tmp2;
RX_STACK_POP (tmp1);
RX_STACK_POP (tmp2);
tmp1 %= tmp2;
RX_STACK_PUSH (tmp1);
}
break;
case R_RX_OPromtop:
RX_STACK_PUSH (get_romstart (&r, info, input_bfd, input_section, rel->r_offset));
break;
case R_RX_OPramtop:
RX_STACK_PUSH (get_ramstart (&r, info, input_bfd, input_section, rel->r_offset));
break;
default:
r = bfd_reloc_notsupported;
break;
}
if (r != bfd_reloc_ok)
{
const char * msg = NULL;
switch (r)
{
case bfd_reloc_overflow:
/* Catch the case of a missing function declaration
and emit a more helpful error message. */
if (r_type == R_RX_DIR24S_PCREL)
msg = _("%B(%A): error: call to undefined function '%s'");
else
r = info->callbacks->reloc_overflow
(info, (h ? &h->root : NULL), name, howto->name, (bfd_vma) 0,
input_bfd, input_section, rel->r_offset);
break;
case bfd_reloc_undefined:
r = info->callbacks->undefined_symbol
(info, name, input_bfd, input_section, rel->r_offset,
TRUE);
break;
case bfd_reloc_other:
msg = _("%B(%A): warning: unaligned access to symbol '%s' in the small data area");
break;
case bfd_reloc_outofrange:
msg = _("%B(%A): internal error: out of range error");
break;
case bfd_reloc_notsupported:
msg = _("%B(%A): internal error: unsupported relocation error");
break;
case bfd_reloc_dangerous:
msg = _("%B(%A): internal error: dangerous relocation");
break;
default:
msg = _("%B(%A): internal error: unknown error");
break;
}
if (msg)
_bfd_error_handler (msg, input_bfd, input_section, name);
if (! r)
return FALSE;
}
}
return TRUE;
}
/* Relaxation Support. */
/* Progression of relocations from largest operand size to smallest
operand size. */
static int
next_smaller_reloc (int r)
{
switch (r)
{
case R_RX_DIR32: return R_RX_DIR24S;
case R_RX_DIR24S: return R_RX_DIR16S;
case R_RX_DIR16S: return R_RX_DIR8S;
case R_RX_DIR8S: return R_RX_NONE;
case R_RX_DIR16: return R_RX_DIR8;
case R_RX_DIR8: return R_RX_NONE;
case R_RX_DIR16U: return R_RX_DIR8U;
case R_RX_DIR8U: return R_RX_NONE;
case R_RX_DIR24S_PCREL: return R_RX_DIR16S_PCREL;
case R_RX_DIR16S_PCREL: return R_RX_DIR8S_PCREL;
case R_RX_DIR8S_PCREL: return R_RX_DIR3U_PCREL;
case R_RX_DIR16UL: return R_RX_DIR8UL;
case R_RX_DIR8UL: return R_RX_NONE;
case R_RX_DIR16UW: return R_RX_DIR8UW;
case R_RX_DIR8UW: return R_RX_NONE;
case R_RX_RH_32_OP: return R_RX_RH_24_OP;
case R_RX_RH_24_OP: return R_RX_RH_16_OP;
case R_RX_RH_16_OP: return R_RX_DIR8;
case R_RX_ABS32: return R_RX_ABS24S;
case R_RX_ABS24S: return R_RX_ABS16S;
case R_RX_ABS16: return R_RX_ABS8;
case R_RX_ABS16U: return R_RX_ABS8U;
case R_RX_ABS16S: return R_RX_ABS8S;
case R_RX_ABS8: return R_RX_NONE;
case R_RX_ABS8U: return R_RX_NONE;
case R_RX_ABS8S: return R_RX_NONE;
case R_RX_ABS24S_PCREL: return R_RX_ABS16S_PCREL;
case R_RX_ABS16S_PCREL: return R_RX_ABS8S_PCREL;
case R_RX_ABS8S_PCREL: return R_RX_NONE;
case R_RX_ABS16UL: return R_RX_ABS8UL;
case R_RX_ABS16UW: return R_RX_ABS8UW;
case R_RX_ABS8UL: return R_RX_NONE;
case R_RX_ABS8UW: return R_RX_NONE;
}
return r;
};
/* Delete some bytes from a section while relaxing. */
static bfd_boolean
elf32_rx_relax_delete_bytes (bfd *abfd, asection *sec, bfd_vma addr, int count,
Elf_Internal_Rela *alignment_rel, int force_snip)
{
Elf_Internal_Shdr * symtab_hdr;
unsigned int sec_shndx;
bfd_byte * contents;
Elf_Internal_Rela * irel;
Elf_Internal_Rela * irelend;
Elf_Internal_Sym * isym;
Elf_Internal_Sym * isymend;
bfd_vma toaddr;
unsigned int symcount;
struct elf_link_hash_entry ** sym_hashes;
struct elf_link_hash_entry ** end_hashes;
if (!alignment_rel)
force_snip = 1;
sec_shndx = _bfd_elf_section_from_bfd_section (abfd, sec);
contents = elf_section_data (sec)->this_hdr.contents;
/* The deletion must stop at the next alignment boundary, if
ALIGNMENT_REL is non-NULL. */
toaddr = sec->size;
if (alignment_rel)
toaddr = alignment_rel->r_offset;
irel = elf_section_data (sec)->relocs;
irelend = irel + sec->reloc_count;
/* Actually delete the bytes. */
memmove (contents + addr, contents + addr + count,
(size_t) (toaddr - addr - count));
/* If we don't have an alignment marker to worry about, we can just
shrink the section. Otherwise, we have to fill in the newly
created gap with NOP insns (0x03). */
if (force_snip)
sec->size -= count;
else
memset (contents + toaddr - count, 0x03, count);
/* Adjust all the relocs. */
for (irel = elf_section_data (sec)->relocs; irel < irelend; irel++)
{
/* Get the new reloc address. */
if (irel->r_offset > addr
&& (irel->r_offset < toaddr
|| (force_snip && irel->r_offset == toaddr)))
irel->r_offset -= count;
/* If we see an ALIGN marker at the end of the gap, we move it
to the beginning of the gap, since marking these gaps is what
they're for. */
if (irel->r_offset == toaddr
&& ELF32_R_TYPE (irel->r_info) == R_RX_RH_RELAX
&& irel->r_addend & RX_RELAXA_ALIGN)
irel->r_offset -= count;
}
/* Adjust the local symbols defined in this section. */
symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
isym = (Elf_Internal_Sym *) symtab_hdr->contents;
isymend = isym + symtab_hdr->sh_info;
for (; isym < isymend; isym++)
{
/* If the symbol is in the range of memory we just moved, we
have to adjust its value. */
if (isym->st_shndx == sec_shndx
&& isym->st_value > addr
&& isym->st_value < toaddr)
isym->st_value -= count;
/* If the symbol *spans* the bytes we just deleted (i.e. it's
*end* is in the moved bytes but it's *start* isn't), then we
must adjust its size. */
if (isym->st_shndx == sec_shndx
&& isym->st_value < addr
&& isym->st_value + isym->st_size > addr
&& isym->st_value + isym->st_size < toaddr)
isym->st_size -= count;
}
/* Now adjust the global symbols defined in this section. */
symcount = (symtab_hdr->sh_size / sizeof (Elf32_External_Sym)
- symtab_hdr->sh_info);
sym_hashes = elf_sym_hashes (abfd);
end_hashes = sym_hashes + symcount;
for (; sym_hashes < end_hashes; sym_hashes++)
{
struct elf_link_hash_entry *sym_hash = *sym_hashes;
if ((sym_hash->root.type == bfd_link_hash_defined
|| sym_hash->root.type == bfd_link_hash_defweak)
&& sym_hash->root.u.def.section == sec)
{
/* As above, adjust the value if needed. */
if (sym_hash->root.u.def.value > addr
&& sym_hash->root.u.def.value < toaddr)
sym_hash->root.u.def.value -= count;
/* As above, adjust the size if needed. */
if (sym_hash->root.u.def.value < addr
&& sym_hash->root.u.def.value + sym_hash->size > addr
&& sym_hash->root.u.def.value + sym_hash->size < toaddr)
sym_hash->size -= count;
}
}
return TRUE;
}
/* Used to sort relocs by address. If relocs have the same address,
we maintain their relative order, except that R_RX_RH_RELAX
alignment relocs must be the first reloc for any given address. */
static void
reloc_bubblesort (Elf_Internal_Rela * r, int count)
{
int i;
bfd_boolean again;
bfd_boolean swappit;
/* This is almost a classic bubblesort. It's the slowest sort, but
we're taking advantage of the fact that the relocations are
mostly in order already (the assembler emits them that way) and
we need relocs with the same address to remain in the same
relative order. */
again = TRUE;
while (again)
{
again = FALSE;
for (i = 0; i < count - 1; i ++)
{
if (r[i].r_offset > r[i + 1].r_offset)
swappit = TRUE;
else if (r[i].r_offset < r[i + 1].r_offset)
swappit = FALSE;
else if (ELF32_R_TYPE (r[i + 1].r_info) == R_RX_RH_RELAX
&& (r[i + 1].r_addend & RX_RELAXA_ALIGN))
swappit = TRUE;
else if (ELF32_R_TYPE (r[i + 1].r_info) == R_RX_RH_RELAX
&& (r[i + 1].r_addend & RX_RELAXA_ELIGN)
&& !(ELF32_R_TYPE (r[i].r_info) == R_RX_RH_RELAX
&& (r[i].r_addend & RX_RELAXA_ALIGN)))
swappit = TRUE;
else
swappit = FALSE;
if (swappit)
{
Elf_Internal_Rela tmp;
tmp = r[i];
r[i] = r[i + 1];
r[i + 1] = tmp;
/* If we do move a reloc back, re-scan to see if it
needs to be moved even further back. This avoids
most of the O(n^2) behavior for our cases. */
if (i > 0)
i -= 2;
again = TRUE;
}
}
}
}
#define OFFSET_FOR_RELOC(rel, lrel, scale) \
rx_offset_for_reloc (abfd, rel + 1, symtab_hdr, shndx_buf, intsyms, \
lrel, abfd, sec, link_info, scale)
static bfd_vma
rx_offset_for_reloc (bfd * abfd,
Elf_Internal_Rela * rel,
Elf_Internal_Shdr * symtab_hdr,
Elf_External_Sym_Shndx * shndx_buf ATTRIBUTE_UNUSED,
Elf_Internal_Sym * intsyms,
Elf_Internal_Rela ** lrel,
bfd * input_bfd,
asection * input_section,
struct bfd_link_info * info,
int * scale)
{
bfd_vma symval;
bfd_reloc_status_type r;
*scale = 1;
/* REL is the first of 1..N relocations. We compute the symbol
value for each relocation, then combine them if needed. LREL
gets a pointer to the last relocation used. */
while (1)
{
int32_t tmp1, tmp2;
/* Get the value of the symbol referred to by the reloc. */
if (ELF32_R_SYM (rel->r_info) < symtab_hdr->sh_info)
{
/* A local symbol. */
Elf_Internal_Sym *isym;
asection *ssec;
isym = intsyms + ELF32_R_SYM (rel->r_info);
if (isym->st_shndx == SHN_UNDEF)
ssec = bfd_und_section_ptr;
else if (isym->st_shndx == SHN_ABS)
ssec = bfd_abs_section_ptr;
else if (isym->st_shndx == SHN_COMMON)
ssec = bfd_com_section_ptr;
else
ssec = bfd_section_from_elf_index (abfd,
isym->st_shndx);
/* Initial symbol value. */
symval = isym->st_value;
/* GAS may have made this symbol relative to a section, in
which case, we have to add the addend to find the
symbol. */
if (ELF_ST_TYPE (isym->st_info) == STT_SECTION)
symval += rel->r_addend;
if (ssec)
{
if ((ssec->flags & SEC_MERGE)
&& ssec->sec_info_type == SEC_INFO_TYPE_MERGE)
symval = _bfd_merged_section_offset (abfd, & ssec,
elf_section_data (ssec)->sec_info,
symval);
}
/* Now make the offset relative to where the linker is putting it. */
if (ssec)
symval +=
ssec->output_section->vma + ssec->output_offset;
symval += rel->r_addend;
}
else
{
unsigned long indx;
struct elf_link_hash_entry * h;
/* An external symbol. */
indx = ELF32_R_SYM (rel->r_info) - symtab_hdr->sh_info;
h = elf_sym_hashes (abfd)[indx];
BFD_ASSERT (h != NULL);
if (h->root.type != bfd_link_hash_defined
&& h->root.type != bfd_link_hash_defweak)
{
/* This appears to be a reference to an undefined
symbol. Just ignore it--it will be caught by the
regular reloc processing. */
if (lrel)
*lrel = rel;
return 0;
}
symval = (h->root.u.def.value
+ h->root.u.def.section->output_section->vma
+ h->root.u.def.section->output_offset);
symval += rel->r_addend;
}
switch (ELF32_R_TYPE (rel->r_info))
{
case R_RX_SYM:
RX_STACK_PUSH (symval);
break;
case R_RX_OPneg:
RX_STACK_POP (tmp1);
tmp1 = - tmp1;
RX_STACK_PUSH (tmp1);
break;
case R_RX_OPadd:
RX_STACK_POP (tmp1);
RX_STACK_POP (tmp2);
tmp1 += tmp2;
RX_STACK_PUSH (tmp1);
break;
case R_RX_OPsub:
RX_STACK_POP (tmp1);
RX_STACK_POP (tmp2);
tmp2 -= tmp1;
RX_STACK_PUSH (tmp2);
break;
case R_RX_OPmul:
RX_STACK_POP (tmp1);
RX_STACK_POP (tmp2);
tmp1 *= tmp2;
RX_STACK_PUSH (tmp1);
break;
case R_RX_OPdiv:
RX_STACK_POP (tmp1);
RX_STACK_POP (tmp2);
tmp1 /= tmp2;
RX_STACK_PUSH (tmp1);
break;
case R_RX_OPshla:
RX_STACK_POP (tmp1);
RX_STACK_POP (tmp2);
tmp1 <<= tmp2;
RX_STACK_PUSH (tmp1);
break;
case R_RX_OPshra:
RX_STACK_POP (tmp1);
RX_STACK_POP (tmp2);
tmp1 >>= tmp2;
RX_STACK_PUSH (tmp1);
break;
case R_RX_OPsctsize:
RX_STACK_PUSH (input_section->size);
break;
case R_RX_OPscttop:
RX_STACK_PUSH (input_section->output_section->vma);
break;
case R_RX_OPand:
RX_STACK_POP (tmp1);
RX_STACK_POP (tmp2);
tmp1 &= tmp2;
RX_STACK_PUSH (tmp1);
break;
case R_RX_OPor:
RX_STACK_POP (tmp1);
RX_STACK_POP (tmp2);
tmp1 |= tmp2;
RX_STACK_PUSH (tmp1);
break;
case R_RX_OPxor:
RX_STACK_POP (tmp1);
RX_STACK_POP (tmp2);
tmp1 ^= tmp2;
RX_STACK_PUSH (tmp1);
break;
case R_RX_OPnot:
RX_STACK_POP (tmp1);
tmp1 = ~ tmp1;
RX_STACK_PUSH (tmp1);
break;
case R_RX_OPmod:
RX_STACK_POP (tmp1);
RX_STACK_POP (tmp2);
tmp1 %= tmp2;
RX_STACK_PUSH (tmp1);
break;
case R_RX_OPromtop:
RX_STACK_PUSH (get_romstart (&r, info, input_bfd, input_section, rel->r_offset));
break;
case R_RX_OPramtop:
RX_STACK_PUSH (get_ramstart (&r, info, input_bfd, input_section, rel->r_offset));
break;
case R_RX_DIR16UL:
case R_RX_DIR8UL:
case R_RX_ABS16UL:
case R_RX_ABS8UL:
if (rx_stack_top)
RX_STACK_POP (symval);
if (lrel)
*lrel = rel;
*scale = 4;
return symval;
case R_RX_DIR16UW:
case R_RX_DIR8UW:
case R_RX_ABS16UW:
case R_RX_ABS8UW:
if (rx_stack_top)
RX_STACK_POP (symval);
if (lrel)
*lrel = rel;
*scale = 2;
return symval;
default:
if (rx_stack_top)
RX_STACK_POP (symval);
if (lrel)
*lrel = rel;
return symval;
}
rel ++;
}
}
static void
move_reloc (Elf_Internal_Rela * irel, Elf_Internal_Rela * srel, int delta)
{
bfd_vma old_offset = srel->r_offset;
irel ++;
while (irel <= srel)
{
if (irel->r_offset == old_offset)
irel->r_offset += delta;
irel ++;
}
}
/* Relax one section. */
static bfd_boolean
elf32_rx_relax_section (bfd * abfd,
asection * sec,
struct bfd_link_info * link_info,
bfd_boolean * again,
bfd_boolean allow_pcrel3)
{
Elf_Internal_Shdr * symtab_hdr;
Elf_Internal_Shdr * shndx_hdr;
Elf_Internal_Rela * internal_relocs;
Elf_Internal_Rela * free_relocs = NULL;
Elf_Internal_Rela * irel;
Elf_Internal_Rela * srel;
Elf_Internal_Rela * irelend;
Elf_Internal_Rela * next_alignment;
Elf_Internal_Rela * prev_alignment;
bfd_byte * contents = NULL;
bfd_byte * free_contents = NULL;
Elf_Internal_Sym * intsyms = NULL;
Elf_Internal_Sym * free_intsyms = NULL;
Elf_External_Sym_Shndx * shndx_buf = NULL;
bfd_vma pc;
bfd_vma sec_start;
bfd_vma symval = 0;
int pcrel = 0;
int code = 0;
int section_alignment_glue;
/* how much to scale the relocation by - 1, 2, or 4. */
int scale;
/* Assume nothing changes. */
*again = FALSE;
/* We don't have to do anything for a relocatable link, if
this section does not have relocs, or if this is not a
code section. */
if (link_info->relocatable
|| (sec->flags & SEC_RELOC) == 0
|| sec->reloc_count == 0
|| (sec->flags & SEC_CODE) == 0)
return TRUE;
symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
shndx_hdr = &elf_tdata (abfd)->symtab_shndx_hdr;
sec_start = sec->output_section->vma + sec->output_offset;
/* Get the section contents. */
if (elf_section_data (sec)->this_hdr.contents != NULL)
contents = elf_section_data (sec)->this_hdr.contents;
/* Go get them off disk. */
else
{
if (! bfd_malloc_and_get_section (abfd, sec, &contents))
goto error_return;
elf_section_data (sec)->this_hdr.contents = contents;
}
/* Read this BFD's symbols. */
/* Get cached copy if it exists. */
if (symtab_hdr->contents != NULL)
intsyms = (Elf_Internal_Sym *) symtab_hdr->contents;
else
{
intsyms = bfd_elf_get_elf_syms (abfd, symtab_hdr, symtab_hdr->sh_info, 0, NULL, NULL, NULL);
symtab_hdr->contents = (bfd_byte *) intsyms;
}
if (shndx_hdr->sh_size != 0)
{
bfd_size_type amt;
amt = symtab_hdr->sh_info;
amt *= sizeof (Elf_External_Sym_Shndx);
shndx_buf = (Elf_External_Sym_Shndx *) bfd_malloc (amt);
if (shndx_buf == NULL)
goto error_return;
if (bfd_seek (abfd, shndx_hdr->sh_offset, SEEK_SET) != 0
|| bfd_bread (shndx_buf, amt, abfd) != amt)
goto error_return;
shndx_hdr->contents = (bfd_byte *) shndx_buf;
}
/* Get a copy of the native relocations. */
internal_relocs = (_bfd_elf_link_read_relocs
(abfd, sec, NULL, (Elf_Internal_Rela *) NULL,
link_info->keep_memory));
if (internal_relocs == NULL)
goto error_return;
if (! link_info->keep_memory)
free_relocs = internal_relocs;
/* The RL_ relocs must be just before the operand relocs they go
with, so we must sort them to guarantee this. We use bubblesort
instead of qsort so we can guarantee that relocs with the same
address remain in the same relative order. */
reloc_bubblesort (internal_relocs, sec->reloc_count);
/* Walk through them looking for relaxing opportunities. */
irelend = internal_relocs + sec->reloc_count;
/* This will either be NULL or a pointer to the next alignment
relocation. */
next_alignment = internal_relocs;
/* This will be the previous alignment, although at first it points
to the first real relocation. */
prev_alignment = internal_relocs;
/* We calculate worst case shrinkage caused by alignment directives.
No fool-proof, but better than either ignoring the problem or
doing heavy duty analysis of all the alignment markers in all
input sections. */
section_alignment_glue = 0;
for (irel = internal_relocs; irel < irelend; irel++)
if (ELF32_R_TYPE (irel->r_info) == R_RX_RH_RELAX
&& irel->r_addend & RX_RELAXA_ALIGN)
{
int this_glue = 1 << (irel->r_addend & RX_RELAXA_ANUM);
if (section_alignment_glue < this_glue)
section_alignment_glue = this_glue;
}
/* Worst case is all 0..N alignments, in order, causing 2*N-1 byte
shrinkage. */
section_alignment_glue *= 2;
for (irel = internal_relocs; irel < irelend; irel++)
{
unsigned char *insn;
int nrelocs;
/* The insns we care about are all marked with one of these. */
if (ELF32_R_TYPE (irel->r_info) != R_RX_RH_RELAX)
continue;
if (irel->r_addend & RX_RELAXA_ALIGN
|| next_alignment == internal_relocs)
{
/* When we delete bytes, we need to maintain all the alignments
indicated. In addition, we need to be careful about relaxing
jumps across alignment boundaries - these displacements
*grow* when we delete bytes. For now, don't shrink
displacements across an alignment boundary, just in case.
Note that this only affects relocations to the same
section. */
prev_alignment = next_alignment;
next_alignment += 2;
while (next_alignment < irelend
&& (ELF32_R_TYPE (next_alignment->r_info) != R_RX_RH_RELAX
|| !(next_alignment->r_addend & RX_RELAXA_ELIGN)))
next_alignment ++;
if (next_alignment >= irelend || next_alignment->r_offset == 0)
next_alignment = NULL;
}
/* When we hit alignment markers, see if we've shrunk enough
before them to reduce the gap without violating the alignment
requirements. */
if (irel->r_addend & RX_RELAXA_ALIGN)
{
/* At this point, the next relocation *should* be the ELIGN
end marker. */
Elf_Internal_Rela *erel = irel + 1;
unsigned int alignment, nbytes;
if (ELF32_R_TYPE (erel->r_info) != R_RX_RH_RELAX)
continue;
if (!(erel->r_addend & RX_RELAXA_ELIGN))
continue;
alignment = 1 << (irel->r_addend & RX_RELAXA_ANUM);
if (erel->r_offset - irel->r_offset < alignment)
continue;
nbytes = erel->r_offset - irel->r_offset;
nbytes /= alignment;
nbytes *= alignment;
elf32_rx_relax_delete_bytes (abfd, sec, erel->r_offset-nbytes, nbytes, next_alignment,
erel->r_offset == sec->size);
*again = TRUE;
continue;
}
if (irel->r_addend & RX_RELAXA_ELIGN)
continue;
insn = contents + irel->r_offset;
nrelocs = irel->r_addend & RX_RELAXA_RNUM;
/* At this point, we have an insn that is a candidate for linker
relaxation. There are NRELOCS relocs following that may be
relaxed, although each reloc may be made of more than one
reloc entry (such as gp-rel symbols). */
/* Get the value of the symbol referred to by the reloc. Just
in case this is the last reloc in the list, use the RL's
addend to choose between this reloc (no addend) or the next
(yes addend, which means at least one following reloc). */
/* srel points to the "current" reloction for this insn -
actually the last reloc for a given operand, which is the one
we need to update. We check the relaxations in the same
order that the relocations happen, so we'll just push it
along as we go. */
srel = irel;
pc = sec->output_section->vma + sec->output_offset
+ srel->r_offset;
#define GET_RELOC \
symval = OFFSET_FOR_RELOC (srel, &srel, &scale); \
pcrel = symval - pc + srel->r_addend; \
nrelocs --;
#define SNIPNR(offset, nbytes) \
elf32_rx_relax_delete_bytes (abfd, sec, (insn - contents) + offset, nbytes, next_alignment, 0);
#define SNIP(offset, nbytes, newtype) \
SNIPNR (offset, nbytes); \
srel->r_info = ELF32_R_INFO (ELF32_R_SYM (srel->r_info), newtype)
/* The order of these bit tests must match the order that the
relocs appear in. Since we sorted those by offset, we can
predict them. */
/* Note that the numbers in, say, DSP6 are the bit offsets of
the code fields that describe the operand. Bits number 0 for
the MSB of insn[0]. */
/* DSP* codes:
0 00 [reg]
1 01 dsp:8[reg]
2 10 dsp:16[reg]
3 11 reg */
if (irel->r_addend & RX_RELAXA_DSP6)
{
GET_RELOC;
code = insn[0] & 3;
if (code == 2 && symval/scale <= 255)
{
unsigned int newrel = ELF32_R_TYPE (srel->r_info);
insn[0] &= 0xfc;
insn[0] |= 0x01;
newrel = next_smaller_reloc (ELF32_R_TYPE (srel->r_info));
if (newrel != ELF32_R_TYPE (srel->r_info))
{
SNIP (3, 1, newrel);
*again = TRUE;
}
}
else if (code == 1 && symval == 0)
{
insn[0] &= 0xfc;
SNIP (2, 1, R_RX_NONE);
*again = TRUE;
}
/* Special case DSP:5 format: MOV.bwl dsp:5[Rsrc],Rdst. */
else if (code == 1 && symval/scale <= 31
/* Decodable bits. */
&& (insn[0] & 0xcc) == 0xcc
/* Width. */
&& (insn[0] & 0x30) != 0x30
/* Register MSBs. */
&& (insn[1] & 0x88) == 0x00)
{
int newrel = 0;
insn[0] = 0x88 | (insn[0] & 0x30);
/* The register fields are in the right place already. */
/* We can't relax this new opcode. */
irel->r_addend = 0;
switch ((insn[0] & 0x30) >> 4)
{
case 0:
newrel = R_RX_RH_ABS5p5B;
break;
case 1:
newrel = R_RX_RH_ABS5p5W;
break;
case 2:
newrel = R_RX_RH_ABS5p5L;
break;
}
move_reloc (irel, srel, -2);
SNIP (2, 1, newrel);
}
/* Special case DSP:5 format: MOVU.bw dsp:5[Rsrc],Rdst. */
else if (code == 1 && symval/scale <= 31
/* Decodable bits. */
&& (insn[0] & 0xf8) == 0x58
/* Register MSBs. */
&& (insn[1] & 0x88) == 0x00)
{
int newrel = 0;
insn[0] = 0xb0 | ((insn[0] & 0x04) << 1);
/* The register fields are in the right place already. */
/* We can't relax this new opcode. */
irel->r_addend = 0;
switch ((insn[0] & 0x08) >> 3)
{
case 0:
newrel = R_RX_RH_ABS5p5B;
break;
case 1:
newrel = R_RX_RH_ABS5p5W;
break;
}
move_reloc (irel, srel, -2);
SNIP (2, 1, newrel);
}
}
/* A DSP4 operand always follows a DSP6 operand, even if there's
no relocation for it. We have to read the code out of the
opcode to calculate the offset of the operand. */
if (irel->r_addend & RX_RELAXA_DSP4)
{
int code6, offset = 0;
GET_RELOC;
code6 = insn[0] & 0x03;
switch (code6)
{
case 0: offset = 2; break;
case 1: offset = 3; break;
case 2: offset = 4; break;
case 3: offset = 2; break;
}
code = (insn[0] & 0x0c) >> 2;
if (code == 2 && symval / scale <= 255)
{
unsigned int newrel = ELF32_R_TYPE (srel->r_info);
insn[0] &= 0xf3;
insn[0] |= 0x04;
newrel = next_smaller_reloc (ELF32_R_TYPE (srel->r_info));
if (newrel != ELF32_R_TYPE (srel->r_info))
{
SNIP (offset+1, 1, newrel);
*again = TRUE;
}
}
else if (code == 1 && symval == 0)
{
insn[0] &= 0xf3;
SNIP (offset, 1, R_RX_NONE);
*again = TRUE;
}
/* Special case DSP:5 format: MOV.bwl Rsrc,dsp:5[Rdst] */
else if (code == 1 && symval/scale <= 31
/* Decodable bits. */
&& (insn[0] & 0xc3) == 0xc3
/* Width. */
&& (insn[0] & 0x30) != 0x30
/* Register MSBs. */
&& (insn[1] & 0x88) == 0x00)
{
int newrel = 0;
insn[0] = 0x80 | (insn[0] & 0x30);
/* The register fields are in the right place already. */
/* We can't relax this new opcode. */
irel->r_addend = 0;
switch ((insn[0] & 0x30) >> 4)
{
case 0:
newrel = R_RX_RH_ABS5p5B;
break;
case 1:
newrel = R_RX_RH_ABS5p5W;
break;
case 2:
newrel = R_RX_RH_ABS5p5L;
break;
}
move_reloc (irel, srel, -2);
SNIP (2, 1, newrel);
}
}
/* These always occur alone, but the offset depends on whether
it's a MEMEX opcode (0x06) or not. */
if (irel->r_addend & RX_RELAXA_DSP14)
{
int offset;
GET_RELOC;
if (insn[0] == 0x06)
offset = 3;
else
offset = 4;
code = insn[1] & 3;
if (code == 2 && symval / scale <= 255)
{
unsigned int newrel = ELF32_R_TYPE (srel->r_info);
insn[1] &= 0xfc;
insn[1] |= 0x01;
newrel = next_smaller_reloc (ELF32_R_TYPE (srel->r_info));
if (newrel != ELF32_R_TYPE (srel->r_info))
{
SNIP (offset, 1, newrel);
*again = TRUE;
}
}
else if (code == 1 && symval == 0)
{
insn[1] &= 0xfc;
SNIP (offset, 1, R_RX_NONE);
*again = TRUE;
}
}
/* IMM* codes:
0 00 imm:32
1 01 simm:8
2 10 simm:16
3 11 simm:24. */
/* These always occur alone. */
if (irel->r_addend & RX_RELAXA_IMM6)
{
long ssymval;
GET_RELOC;
/* These relocations sign-extend, so we must do signed compares. */
ssymval = (long) symval;
code = insn[0] & 0x03;
if (code == 0 && ssymval <= 8388607 && ssymval >= -8388608)
{
unsigned int newrel = ELF32_R_TYPE (srel->r_info);
insn[0] &= 0xfc;
insn[0] |= 0x03;
newrel = next_smaller_reloc (ELF32_R_TYPE (srel->r_info));
if (newrel != ELF32_R_TYPE (srel->r_info))
{
SNIP (2, 1, newrel);
*again = TRUE;
}
}
else if (code == 3 && ssymval <= 32767 && ssymval >= -32768)
{
unsigned int newrel = ELF32_R_TYPE (srel->r_info);
insn[0] &= 0xfc;
insn[0] |= 0x02;
newrel = next_smaller_reloc (ELF32_R_TYPE (srel->r_info));
if (newrel != ELF32_R_TYPE (srel->r_info))
{
SNIP (2, 1, newrel);
*again = TRUE;
}
}
/* Special case UIMM8 format: CMP #uimm8,Rdst. */
else if (code == 2 && ssymval <= 255 && ssymval >= 16
/* Decodable bits. */
&& (insn[0] & 0xfc) == 0x74
/* Decodable bits. */
&& ((insn[1] & 0xf0) == 0x00))
{
int newrel;
insn[0] = 0x75;
insn[1] = 0x50 | (insn[1] & 0x0f);
/* We can't relax this new opcode. */
irel->r_addend = 0;
if (STACK_REL_P (ELF32_R_TYPE (srel->r_info)))
newrel = R_RX_ABS8U;
else
newrel = R_RX_DIR8U;
SNIP (2, 1, newrel);
*again = TRUE;
}
else if (code == 2 && ssymval <= 127 && ssymval >= -128)
{
unsigned int newrel = ELF32_R_TYPE (srel->r_info);
insn[0] &= 0xfc;
insn[0] |= 0x01;
newrel = next_smaller_reloc (ELF32_R_TYPE (srel->r_info));
if (newrel != ELF32_R_TYPE (srel->r_info))
{
SNIP (2, 1, newrel);
*again = TRUE;
}
}
/* Special case UIMM4 format: CMP, MUL, AND, OR. */
else if (code == 1 && ssymval <= 15 && ssymval >= 0
/* Decodable bits and immediate type. */
&& insn[0] == 0x75
/* Decodable bits. */
&& (insn[1] & 0xc0) == 0x00)
{
static const int newop[4] = { 1, 3, 4, 5 };
insn[0] = 0x60 | newop[insn[1] >> 4];
/* The register number doesn't move. */
/* We can't relax this new opcode. */
irel->r_addend = 0;
move_reloc (irel, srel, -1);
SNIP (2, 1, R_RX_RH_UIMM4p8);
*again = TRUE;
}
/* Special case UIMM4 format: ADD -> ADD/SUB. */
else if (code == 1 && ssymval <= 15 && ssymval >= -15
/* Decodable bits and immediate type. */
&& insn[0] == 0x71
/* Same register for source and destination. */
&& ((insn[1] >> 4) == (insn[1] & 0x0f)))
{
int newrel;
/* Note that we can't turn "add $0,Rs" into a NOP
because the flags need to be set right. */
if (ssymval < 0)
{
insn[0] = 0x60; /* Subtract. */
newrel = R_RX_RH_UNEG4p8;
}
else
{
insn[0] = 0x62; /* Add. */
newrel = R_RX_RH_UIMM4p8;
}
/* The register number is in the right place. */
/* We can't relax this new opcode. */
irel->r_addend = 0;
move_reloc (irel, srel, -1);
SNIP (2, 1, newrel);
*again = TRUE;
}
}
/* These are either matched with a DSP6 (2-byte base) or an id24
(3-byte base). */
if (irel->r_addend & RX_RELAXA_IMM12)
{
int dspcode, offset = 0;
long ssymval;
GET_RELOC;
if ((insn[0] & 0xfc) == 0xfc)
dspcode = 1; /* Just something with one byte operand. */
else
dspcode = insn[0] & 3;
switch (dspcode)
{
case 0: offset = 2; break;
case 1: offset = 3; break;
case 2: offset = 4; break;
case 3: offset = 2; break;
}
/* These relocations sign-extend, so we must do signed compares. */
ssymval = (long) symval;
code = (insn[1] >> 2) & 3;
if (code == 0 && ssymval <= 8388607 && ssymval >= -8388608)
{
unsigned int newrel = ELF32_R_TYPE (srel->r_info);
insn[1] &= 0xf3;
insn[1] |= 0x0c;
newrel = next_smaller_reloc (ELF32_R_TYPE (srel->r_info));
if (newrel != ELF32_R_TYPE (srel->r_info))
{
SNIP (offset, 1, newrel);
*again = TRUE;
}
}
else if (code == 3 && ssymval <= 32767 && ssymval >= -32768)
{
unsigned int newrel = ELF32_R_TYPE (srel->r_info);
insn[1] &= 0xf3;
insn[1] |= 0x08;
newrel = next_smaller_reloc (ELF32_R_TYPE (srel->r_info));
if (newrel != ELF32_R_TYPE (srel->r_info))
{
SNIP (offset, 1, newrel);
*again = TRUE;
}
}
/* Special case UIMM8 format: MOV #uimm8,Rdst. */
else if (code == 2 && ssymval <= 255 && ssymval >= 16
/* Decodable bits. */
&& insn[0] == 0xfb
/* Decodable bits. */
&& ((insn[1] & 0x03) == 0x02))
{
int newrel;
insn[0] = 0x75;
insn[1] = 0x40 | (insn[1] >> 4);
/* We can't relax this new opcode. */
irel->r_addend = 0;
if (STACK_REL_P (ELF32_R_TYPE (srel->r_info)))
newrel = R_RX_ABS8U;
else
newrel = R_RX_DIR8U;
SNIP (2, 1, newrel);
*again = TRUE;
}
else if (code == 2 && ssymval <= 127 && ssymval >= -128)
{
unsigned int newrel = ELF32_R_TYPE(srel->r_info);
insn[1] &= 0xf3;
insn[1] |= 0x04;
newrel = next_smaller_reloc (ELF32_R_TYPE (srel->r_info));
if (newrel != ELF32_R_TYPE(srel->r_info))
{
SNIP (offset, 1, newrel);
*again = TRUE;
}
}
/* Special case UIMM4 format: MOV #uimm4,Rdst. */
else if (code == 1 && ssymval <= 15 && ssymval >= 0
/* Decodable bits. */
&& insn[0] == 0xfb
/* Decodable bits. */
&& ((insn[1] & 0x03) == 0x02))
{
insn[0] = 0x66;
insn[1] = insn[1] >> 4;
/* We can't relax this new opcode. */
irel->r_addend = 0;
move_reloc (irel, srel, -1);
SNIP (2, 1, R_RX_RH_UIMM4p8);
*again = TRUE;
}
}
if (irel->r_addend & RX_RELAXA_BRA)
{
unsigned int newrel = ELF32_R_TYPE (srel->r_info);
int max_pcrel3 = 4;
int alignment_glue = 0;
GET_RELOC;
/* Branches over alignment chunks are problematic, as
deleting bytes here makes the branch *further* away. We
can be agressive with branches within this alignment
block, but not branches outside it. */
if ((prev_alignment == NULL
|| symval < (bfd_vma)(sec_start + prev_alignment->r_offset))
&& (next_alignment == NULL
|| symval > (bfd_vma)(sec_start + next_alignment->r_offset)))
alignment_glue = section_alignment_glue;
if (ELF32_R_TYPE(srel[1].r_info) == R_RX_RH_RELAX
&& srel[1].r_addend & RX_RELAXA_BRA
&& srel[1].r_offset < irel->r_offset + pcrel)
max_pcrel3 ++;
newrel = next_smaller_reloc (ELF32_R_TYPE (srel->r_info));
/* The values we compare PCREL with are not what you'd
expect; they're off by a little to compensate for (1)
where the reloc is relative to the insn, and (2) how much
the insn is going to change when we relax it. */
/* These we have to decode. */
switch (insn[0])
{
case 0x04: /* BRA pcdsp:24 */
if (-32768 + alignment_glue <= pcrel
&& pcrel <= 32765 - alignment_glue)
{
insn[0] = 0x38;
SNIP (3, 1, newrel);
*again = TRUE;
}
break;
case 0x38: /* BRA pcdsp:16 */
if (-128 + alignment_glue <= pcrel
&& pcrel <= 127 - alignment_glue)
{
insn[0] = 0x2e;
SNIP (2, 1, newrel);
*again = TRUE;
}
break;
case 0x2e: /* BRA pcdsp:8 */
/* Note that there's a risk here of shortening things so
much that we no longer fit this reloc; it *should*
only happen when you branch across a branch, and that
branch also devolves into BRA.S. "Real" code should
be OK. */
if (max_pcrel3 + alignment_glue <= pcrel
&& pcrel <= 10 - alignment_glue
&& allow_pcrel3)
{
insn[0] = 0x08;
SNIP (1, 1, newrel);
move_reloc (irel, srel, -1);
*again = TRUE;
}
break;
case 0x05: /* BSR pcdsp:24 */
if (-32768 + alignment_glue <= pcrel
&& pcrel <= 32765 - alignment_glue)
{
insn[0] = 0x39;
SNIP (1, 1, newrel);
*again = TRUE;
}
break;
case 0x3a: /* BEQ.W pcdsp:16 */
case 0x3b: /* BNE.W pcdsp:16 */
if (-128 + alignment_glue <= pcrel
&& pcrel <= 127 - alignment_glue)
{
insn[0] = 0x20 | (insn[0] & 1);
SNIP (1, 1, newrel);
*again = TRUE;
}
break;
case 0x20: /* BEQ.B pcdsp:8 */
case 0x21: /* BNE.B pcdsp:8 */
if (max_pcrel3 + alignment_glue <= pcrel
&& pcrel - alignment_glue <= 10
&& allow_pcrel3)
{
insn[0] = 0x10 | ((insn[0] & 1) << 3);
SNIP (1, 1, newrel);
move_reloc (irel, srel, -1);
*again = TRUE;
}
break;
case 0x16: /* synthetic BNE dsp24 */
case 0x1e: /* synthetic BEQ dsp24 */
if (-32767 + alignment_glue <= pcrel
&& pcrel <= 32766 - alignment_glue
&& insn[1] == 0x04)
{
if (insn[0] == 0x16)
insn[0] = 0x3b;
else
insn[0] = 0x3a;
/* We snip out the bytes at the end else the reloc
will get moved too, and too much. */
SNIP (3, 2, newrel);
move_reloc (irel, srel, -1);
*again = TRUE;
}
break;
}
/* Special case - synthetic conditional branches, pcrel24.
Note that EQ and NE have been handled above. */
if ((insn[0] & 0xf0) == 0x20
&& insn[1] == 0x06
&& insn[2] == 0x04
&& srel->r_offset != irel->r_offset + 1
&& -32767 + alignment_glue <= pcrel
&& pcrel <= 32766 - alignment_glue)
{
insn[1] = 0x05;
insn[2] = 0x38;
SNIP (5, 1, newrel);
*again = TRUE;
}
/* Special case - synthetic conditional branches, pcrel16 */
if ((insn[0] & 0xf0) == 0x20
&& insn[1] == 0x05
&& insn[2] == 0x38
&& srel->r_offset != irel->r_offset + 1
&& -127 + alignment_glue <= pcrel
&& pcrel <= 126 - alignment_glue)
{
int cond = (insn[0] & 0x0f) ^ 0x01;
insn[0] = 0x20 | cond;
/* By moving the reloc first, we avoid having
delete_bytes move it also. */
move_reloc (irel, srel, -2);
SNIP (2, 3, newrel);
*again = TRUE;
}
}
BFD_ASSERT (nrelocs == 0);
/* Special case - check MOV.bwl #IMM, dsp[reg] and see if we can
use MOV.bwl #uimm:8, dsp:5[r7] format. This is tricky
because it may have one or two relocations. */
if ((insn[0] & 0xfc) == 0xf8
&& (insn[1] & 0x80) == 0x00
&& (insn[0] & 0x03) != 0x03)
{
int dcode, icode, reg, ioff, dscale, ilen;
bfd_vma disp_val = 0;
long imm_val = 0;
Elf_Internal_Rela * disp_rel = 0;
Elf_Internal_Rela * imm_rel = 0;
/* Reset this. */
srel = irel;
dcode = insn[0] & 0x03;
icode = (insn[1] >> 2) & 0x03;
reg = (insn[1] >> 4) & 0x0f;
ioff = dcode == 1 ? 3 : dcode == 2 ? 4 : 2;
/* Figure out what the dispacement is. */
if (dcode == 1 || dcode == 2)
{
/* There's a displacement. See if there's a reloc for it. */
if (srel[1].r_offset == irel->r_offset + 2)
{
GET_RELOC;
disp_val = symval;
disp_rel = srel;
}
else
{
if (dcode == 1)
disp_val = insn[2];
else
{
#if RX_OPCODE_BIG_ENDIAN
disp_val = insn[2] * 256 + insn[3];
#else
disp_val = insn[2] + insn[3] * 256;
#endif
}
switch (insn[1] & 3)
{
case 1:
disp_val *= 2;
scale = 2;
break;
case 2:
disp_val *= 4;
scale = 4;
break;
}
}
}
dscale = scale;
/* Figure out what the immediate is. */
if (srel[1].r_offset == irel->r_offset + ioff)
{
GET_RELOC;
imm_val = (long) symval;
imm_rel = srel;
}
else
{
unsigned char * ip = insn + ioff;
switch (icode)
{
case 1:
/* For byte writes, we don't sign extend. Makes the math easier later. */
if (scale == 1)
imm_val = ip[0];
else
imm_val = (char) ip[0];
break;
case 2:
#if RX_OPCODE_BIG_ENDIAN
imm_val = ((char) ip[0] << 8) | ip[1];
#else
imm_val = ((char) ip[1] << 8) | ip[0];
#endif
break;
case 3:
#if RX_OPCODE_BIG_ENDIAN
imm_val = ((char) ip[0] << 16) | (ip[1] << 8) | ip[2];
#else
imm_val = ((char) ip[2] << 16) | (ip[1] << 8) | ip[0];
#endif
break;
case 0:
#if RX_OPCODE_BIG_ENDIAN
imm_val = (ip[0] << 24) | (ip[1] << 16) | (ip[2] << 8) | ip[3];
#else
imm_val = (ip[3] << 24) | (ip[2] << 16) | (ip[1] << 8) | ip[0];
#endif
break;
}
}
ilen = 2;
switch (dcode)
{
case 1:
ilen += 1;
break;
case 2:
ilen += 2;
break;
}
switch (icode)
{
case 1:
ilen += 1;
break;
case 2:
ilen += 2;
break;
case 3:
ilen += 3;
break;
case 4:
ilen += 4;
break;
}
/* The shortcut happens when the immediate is 0..255,
register r0 to r7, and displacement (scaled) 0..31. */
if (0 <= imm_val && imm_val <= 255
&& 0 <= reg && reg <= 7
&& disp_val / dscale <= 31)
{
insn[0] = 0x3c | (insn[1] & 0x03);
insn[1] = (((disp_val / dscale) << 3) & 0x80) | (reg << 4) | ((disp_val/dscale) & 0x0f);
insn[2] = imm_val;
if (disp_rel)
{
int newrel = R_RX_NONE;
switch (dscale)
{
case 1:
newrel = R_RX_RH_ABS5p8B;
break;
case 2:
newrel = R_RX_RH_ABS5p8W;
break;
case 4:
newrel = R_RX_RH_ABS5p8L;
break;
}
disp_rel->r_info = ELF32_R_INFO (ELF32_R_SYM (disp_rel->r_info), newrel);
move_reloc (irel, disp_rel, -1);
}
if (imm_rel)
{
imm_rel->r_info = ELF32_R_INFO (ELF32_R_SYM (imm_rel->r_info), R_RX_DIR8U);
move_reloc (disp_rel ? disp_rel : irel,
imm_rel,
irel->r_offset - imm_rel->r_offset + 2);
}
SNIPNR (3, ilen - 3);
*again = TRUE;
/* We can't relax this new opcode. */
irel->r_addend = 0;
}
}
}
/* We can't reliably relax branches to DIR3U_PCREL unless we know
whatever they're branching over won't shrink any more. If we're
basically done here, do one more pass just for branches - but
don't request a pass after that one! */
if (!*again && !allow_pcrel3)
{
bfd_boolean ignored;
elf32_rx_relax_section (abfd, sec, link_info, &ignored, TRUE);
}
return TRUE;
error_return:
if (free_relocs != NULL)
free (free_relocs);
if (free_contents != NULL)
free (free_contents);
if (shndx_buf != NULL)
{
shndx_hdr->contents = NULL;
free (shndx_buf);
}
if (free_intsyms != NULL)
free (free_intsyms);
return FALSE;
}
static bfd_boolean
elf32_rx_relax_section_wrapper (bfd * abfd,
asection * sec,
struct bfd_link_info * link_info,
bfd_boolean * again)
{
return elf32_rx_relax_section (abfd, sec, link_info, again, FALSE);
}
/* Function to set the ELF flag bits. */
static bfd_boolean
rx_elf_set_private_flags (bfd * abfd, flagword flags)
{
elf_elfheader (abfd)->e_flags = flags;
elf_flags_init (abfd) = TRUE;
return TRUE;
}
static bfd_boolean no_warn_mismatch = FALSE;
static bfd_boolean ignore_lma = TRUE;
void bfd_elf32_rx_set_target_flags (bfd_boolean, bfd_boolean);
void
bfd_elf32_rx_set_target_flags (bfd_boolean user_no_warn_mismatch,
bfd_boolean user_ignore_lma)
{
no_warn_mismatch = user_no_warn_mismatch;
ignore_lma = user_ignore_lma;
}
/* Converts FLAGS into a descriptive string.
Returns a static pointer. */
static const char *
describe_flags (flagword flags)
{
static char buf [128];
buf[0] = 0;
if (flags & E_FLAG_RX_64BIT_DOUBLES)
strcat (buf, "64-bit doubles");
else
strcat (buf, "32-bit doubles");
if (flags & E_FLAG_RX_DSP)
strcat (buf, ", dsp");
else
strcat (buf, ", no dsp");
if (flags & E_FLAG_RX_PID)
strcat (buf, ", pid");
else
strcat (buf, ", no pid");
if (flags & E_FLAG_RX_ABI)
strcat (buf, ", RX ABI");
else
strcat (buf, ", GCC ABI");
return buf;
}
/* Merge backend specific data from an object file to the output
object file when linking. */
static bfd_boolean
rx_elf_merge_private_bfd_data (bfd * ibfd, bfd * obfd)
{
flagword old_flags;
flagword new_flags;
bfd_boolean error = FALSE;
new_flags = elf_elfheader (ibfd)->e_flags;
old_flags = elf_elfheader (obfd)->e_flags;
if (!elf_flags_init (obfd))
{
/* First call, no flags set. */
elf_flags_init (obfd) = TRUE;
elf_elfheader (obfd)->e_flags = new_flags;
}
else if (old_flags != new_flags)
{
flagword known_flags;
known_flags = E_FLAG_RX_ABI | E_FLAG_RX_64BIT_DOUBLES
| E_FLAG_RX_DSP | E_FLAG_RX_PID;
if ((old_flags ^ new_flags) & known_flags)
{
/* Only complain if flag bits we care about do not match.
Other bits may be set, since older binaries did use some
deprecated flags. */
if (no_warn_mismatch)
{
elf_elfheader (obfd)->e_flags = (new_flags | old_flags) & known_flags;
}
else
{
_bfd_error_handler ("There is a conflict merging the ELF header flags from %s",
bfd_get_filename (ibfd));
_bfd_error_handler (" the input file's flags: %s",
describe_flags (new_flags));
_bfd_error_handler (" the output file's flags: %s",
describe_flags (old_flags));
error = TRUE;
}
}
else
elf_elfheader (obfd)->e_flags = new_flags & known_flags;
}
if (error)
bfd_set_error (bfd_error_bad_value);
return !error;
}
static bfd_boolean
rx_elf_print_private_bfd_data (bfd * abfd, void * ptr)
{
FILE * file = (FILE *) ptr;
flagword flags;
BFD_ASSERT (abfd != NULL && ptr != NULL);
/* Print normal ELF private data. */
_bfd_elf_print_private_bfd_data (abfd, ptr);
flags = elf_elfheader (abfd)->e_flags;
fprintf (file, _("private flags = 0x%lx:"), (long) flags);
fprintf (file, "%s", describe_flags (flags));
return TRUE;
}
/* Return the MACH for an e_flags value. */
static int
elf32_rx_machine (bfd * abfd ATTRIBUTE_UNUSED)
{
#if 0 /* FIXME: EF_RX_CPU_MASK collides with E_FLAG_RX_...
Need to sort out how these flag bits are used.
For now we assume that the flags are OK. */
if ((elf_elfheader (abfd)->e_flags & EF_RX_CPU_MASK) == EF_RX_CPU_RX)
#endif
return bfd_mach_rx;
return 0;
}
static bfd_boolean
rx_elf_object_p (bfd * abfd)
{
int i;
unsigned int u;
Elf_Internal_Phdr *phdr = elf_tdata (abfd)->phdr;
int nphdrs = elf_elfheader (abfd)->e_phnum;
sec_ptr bsec;
static int saw_be = FALSE;
/* We never want to automatically choose the non-swapping big-endian
target. The user can only get that explicitly, such as with -I
and objcopy. */
if (abfd->xvec == &bfd_elf32_rx_be_ns_vec
&& abfd->target_defaulted)
return FALSE;
/* BFD->target_defaulted is not set to TRUE when a target is chosen
as a fallback, so we check for "scanning" to know when to stop
using the non-swapping target. */
if (abfd->xvec == &bfd_elf32_rx_be_ns_vec
&& saw_be)
return FALSE;
if (abfd->xvec == &bfd_elf32_rx_be_vec)
saw_be = TRUE;
bfd_default_set_arch_mach (abfd, bfd_arch_rx,
elf32_rx_machine (abfd));
/* For each PHDR in the object, we must find some section that
corresponds (based on matching file offsets) and use its VMA
information to reconstruct the p_vaddr field we clobbered when we
wrote it out. */
for (i=0; i<nphdrs; i++)
{
for (u=0; u<elf_tdata(abfd)->num_elf_sections; u++)
{
Elf_Internal_Shdr *sec = elf_tdata(abfd)->elf_sect_ptr[u];
if (phdr[i].p_filesz
&& phdr[i].p_offset <= (bfd_vma) sec->sh_offset
&& (bfd_vma)sec->sh_offset <= phdr[i].p_offset + (phdr[i].p_filesz - 1))
{
/* Found one! The difference between the two addresses,
plus the difference between the two file offsets, is
enough information to reconstruct the lma. */
/* Example where they aren't:
PHDR[1] = lma fffc0100 offset 00002010 size 00000100
SEC[6] = vma 00000050 offset 00002050 size 00000040
The correct LMA for the section is fffc0140 + (2050-2010).
*/
phdr[i].p_vaddr = sec->sh_addr + (sec->sh_offset - phdr[i].p_offset);
break;
}
}
/* We must update the bfd sections as well, so we don't stop
with one match. */
bsec = abfd->sections;
while (bsec)
{
if (phdr[i].p_filesz
&& phdr[i].p_vaddr <= bsec->vma
&& bsec->vma <= phdr[i].p_vaddr + (phdr[i].p_filesz - 1))
{
bsec->lma = phdr[i].p_paddr + (bsec->vma - phdr[i].p_vaddr);
}
bsec = bsec->next;
}
}
return TRUE;
}
#ifdef DEBUG
void
rx_dump_symtab (bfd * abfd, void * internal_syms, void * external_syms)
{
size_t locsymcount;
Elf_Internal_Sym * isymbuf;
Elf_Internal_Sym * isymend;
Elf_Internal_Sym * isym;
Elf_Internal_Shdr * symtab_hdr;
bfd_boolean free_internal = FALSE, free_external = FALSE;
char * st_info_str;
char * st_info_stb_str;
char * st_other_str;
char * st_shndx_str;
if (! internal_syms)
{
internal_syms = bfd_malloc (1000);
free_internal = 1;
}
if (! external_syms)
{
external_syms = bfd_malloc (1000);
free_external = 1;
}
symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
locsymcount = symtab_hdr->sh_size / get_elf_backend_data (abfd)->s->sizeof_sym;
if (free_internal)
isymbuf = bfd_elf_get_elf_syms (abfd, symtab_hdr,
symtab_hdr->sh_info, 0,
internal_syms, external_syms, NULL);
else
isymbuf = internal_syms;
isymend = isymbuf + locsymcount;
for (isym = isymbuf ; isym < isymend ; isym++)
{
switch (ELF_ST_TYPE (isym->st_info))
{
case STT_FUNC: st_info_str = "STT_FUNC";
case STT_SECTION: st_info_str = "STT_SECTION";
case STT_FILE: st_info_str = "STT_FILE";
case STT_OBJECT: st_info_str = "STT_OBJECT";
case STT_TLS: st_info_str = "STT_TLS";
default: st_info_str = "";
}
switch (ELF_ST_BIND (isym->st_info))
{
case STB_LOCAL: st_info_stb_str = "STB_LOCAL";
case STB_GLOBAL: st_info_stb_str = "STB_GLOBAL";
default: st_info_stb_str = "";
}
switch (ELF_ST_VISIBILITY (isym->st_other))
{
case STV_DEFAULT: st_other_str = "STV_DEFAULT";
case STV_INTERNAL: st_other_str = "STV_INTERNAL";
case STV_PROTECTED: st_other_str = "STV_PROTECTED";
default: st_other_str = "";
}
switch (isym->st_shndx)
{
case SHN_ABS: st_shndx_str = "SHN_ABS";
case SHN_COMMON: st_shndx_str = "SHN_COMMON";
case SHN_UNDEF: st_shndx_str = "SHN_UNDEF";
default: st_shndx_str = "";
}
printf ("isym = %p st_value = %lx st_size = %lx st_name = (%lu) %s "
"st_info = (%d) %s %s st_other = (%d) %s st_shndx = (%d) %s\n",
isym,
(unsigned long) isym->st_value,
(unsigned long) isym->st_size,
isym->st_name,
bfd_elf_string_from_elf_section (abfd, symtab_hdr->sh_link,
isym->st_name),
isym->st_info, st_info_str, st_info_stb_str,
isym->st_other, st_other_str,
isym->st_shndx, st_shndx_str);
}
if (free_internal)
free (internal_syms);
if (free_external)
free (external_syms);
}
char *
rx_get_reloc (long reloc)
{
if (0 <= reloc && reloc < R_RX_max)
return rx_elf_howto_table[reloc].name;
return "";
}
#endif /* DEBUG */
/* We must take care to keep the on-disk copy of any code sections
that are fully linked swapped if the target is big endian, to match
the Renesas tools. */
/* The rule is: big endian object that are final-link executables,
have code sections stored with 32-bit words swapped relative to
what you'd get by default. */
static bfd_boolean
rx_get_section_contents (bfd * abfd,
sec_ptr section,
void * location,
file_ptr offset,
bfd_size_type count)
{
int exec = (abfd->flags & EXEC_P) ? 1 : 0;
int s_code = (section->flags & SEC_CODE) ? 1 : 0;
bfd_boolean rv;
#ifdef DJDEBUG
fprintf (stderr, "dj: get %ld %ld from %s %s e%d sc%d %08lx:%08lx\n",
(long) offset, (long) count, section->name,
bfd_big_endian(abfd) ? "be" : "le",
exec, s_code, (long unsigned) section->filepos,
(long unsigned) offset);
#endif
if (exec && s_code && bfd_big_endian (abfd))
{
char * cloc = (char *) location;
bfd_size_type cnt, end_cnt;
rv = TRUE;
/* Fetch and swap unaligned bytes at the beginning. */
if (offset % 4)
{
char buf[4];
rv = _bfd_generic_get_section_contents (abfd, section, buf,
(offset & -4), 4);
if (!rv)
return FALSE;
bfd_putb32 (bfd_getl32 (buf), buf);
cnt = 4 - (offset % 4);
if (cnt > count)
cnt = count;
memcpy (location, buf + (offset % 4), cnt);
count -= cnt;
offset += cnt;
cloc += count;
}
end_cnt = count % 4;
/* Fetch and swap the middle bytes. */
if (count >= 4)
{
rv = _bfd_generic_get_section_contents (abfd, section, cloc, offset,
count - end_cnt);
if (!rv)
return FALSE;
for (cnt = count; cnt >= 4; cnt -= 4, cloc += 4)
bfd_putb32 (bfd_getl32 (cloc), cloc);
}
/* Fetch and swap the end bytes. */
if (end_cnt > 0)
{
char buf[4];
/* Fetch the end bytes. */
rv = _bfd_generic_get_section_contents (abfd, section, buf,
offset + count - end_cnt, 4);
if (!rv)
return FALSE;
bfd_putb32 (bfd_getl32 (buf), buf);
memcpy (cloc, buf, end_cnt);
}
}
else
rv = _bfd_generic_get_section_contents (abfd, section, location, offset, count);
return rv;
}
#ifdef DJDEBUG
static bfd_boolean
rx2_set_section_contents (bfd * abfd,
sec_ptr section,
const void * location,
file_ptr offset,
bfd_size_type count)
{
bfd_size_type i;
fprintf (stderr, " set sec %s %08x loc %p offset %#x count %#x\n",
section->name, (unsigned) section->vma, location, (int) offset, (int) count);
for (i = 0; i < count; i++)
{
if (i % 16 == 0 && i > 0)
fprintf (stderr, "\n");
if (i % 16 && i % 4 == 0)
fprintf (stderr, " ");
if (i % 16 == 0)
fprintf (stderr, " %08x:", (int) (section->vma + offset + i));
fprintf (stderr, " %02x", ((unsigned char *) location)[i]);
}
fprintf (stderr, "\n");
return _bfd_elf_set_section_contents (abfd, section, location, offset, count);
}
#define _bfd_elf_set_section_contents rx2_set_section_contents
#endif
static bfd_boolean
rx_set_section_contents (bfd * abfd,
sec_ptr section,
const void * location,
file_ptr offset,
bfd_size_type count)
{
bfd_boolean exec = (abfd->flags & EXEC_P) ? TRUE : FALSE;
bfd_boolean s_code = (section->flags & SEC_CODE) ? TRUE : FALSE;
bfd_boolean rv;
char * swapped_data = NULL;
bfd_size_type i;
bfd_vma caddr = section->vma + offset;
file_ptr faddr = 0;
bfd_size_type scount;
#ifdef DJDEBUG
bfd_size_type i;
fprintf (stderr, "\ndj: set %ld %ld to %s %s e%d sc%d\n",
(long) offset, (long) count, section->name,
bfd_big_endian (abfd) ? "be" : "le",
exec, s_code);
for (i = 0; i < count; i++)
{
int a = section->vma + offset + i;
if (a % 16 == 0 && a > 0)
fprintf (stderr, "\n");
if (a % 16 && a % 4 == 0)
fprintf (stderr, " ");
if (a % 16 == 0 || i == 0)
fprintf (stderr, " %08x:", (int) (section->vma + offset + i));
fprintf (stderr, " %02x", ((unsigned char *) location)[i]);
}
fprintf (stderr, "\n");
#endif
if (! exec || ! s_code || ! bfd_big_endian (abfd))
return _bfd_elf_set_section_contents (abfd, section, location, offset, count);
while (count > 0 && caddr > 0 && caddr % 4)
{
switch (caddr % 4)
{
case 0: faddr = offset + 3; break;
case 1: faddr = offset + 1; break;
case 2: faddr = offset - 1; break;
case 3: faddr = offset - 3; break;
}
rv = _bfd_elf_set_section_contents (abfd, section, location, faddr, 1);
if (! rv)
return rv;
location ++;
offset ++;
count --;
caddr ++;
}
scount = (int)(count / 4) * 4;
if (scount > 0)
{
char * cloc = (char *) location;
swapped_data = (char *) bfd_alloc (abfd, count);
for (i = 0; i < count; i += 4)
{
bfd_vma v = bfd_getl32 (cloc + i);
bfd_putb32 (v, swapped_data + i);
}
rv = _bfd_elf_set_section_contents (abfd, section, swapped_data, offset, scount);
if (!rv)
return rv;
}
count -= scount;
location += scount;
offset += scount;
if (count > 0)
{
caddr = section->vma + offset;
while (count > 0)
{
switch (caddr % 4)
{
case 0: faddr = offset + 3; break;
case 1: faddr = offset + 1; break;
case 2: faddr = offset - 1; break;
case 3: faddr = offset - 3; break;
}
rv = _bfd_elf_set_section_contents (abfd, section, location, faddr, 1);
if (! rv)
return rv;
location ++;
offset ++;
count --;
caddr ++;
}
}
return TRUE;
}
static bfd_boolean
rx_final_link (bfd * abfd, struct bfd_link_info * info)
{
asection * o;
for (o = abfd->sections; o != NULL; o = o->next)
{
#ifdef DJDEBUG
fprintf (stderr, "sec %s fl %x vma %lx lma %lx size %lx raw %lx\n",
o->name, o->flags, o->vma, o->lma, o->size, o->rawsize);
#endif
if (o->flags & SEC_CODE
&& bfd_big_endian (abfd)
&& o->size % 4)
{
#ifdef DJDEBUG
fprintf (stderr, "adjusting...\n");
#endif
o->size += 4 - (o->size % 4);
}
}
return bfd_elf_final_link (abfd, info);
}
static bfd_boolean
elf32_rx_modify_program_headers (bfd * abfd ATTRIBUTE_UNUSED,
struct bfd_link_info * info ATTRIBUTE_UNUSED)
{
const struct elf_backend_data * bed;
struct elf_obj_tdata * tdata;
Elf_Internal_Phdr * phdr;
unsigned int count;
unsigned int i;
bed = get_elf_backend_data (abfd);
tdata = elf_tdata (abfd);
phdr = tdata->phdr;
count = elf_program_header_size (abfd) / bed->s->sizeof_phdr;
if (ignore_lma)
for (i = count; i-- != 0;)
if (phdr[i].p_type == PT_LOAD)
{
/* The Renesas tools expect p_paddr to be zero. However,
there is no other way to store the writable data in ROM for
startup initialization. So, we let the linker *think*
we're using paddr and vaddr the "usual" way, but at the
last minute we move the paddr into the vaddr (which is what
the simulator uses) and zero out paddr. Note that this
does not affect the section headers, just the program
headers. We hope. */
phdr[i].p_vaddr = phdr[i].p_paddr;
#if 0 /* If we zero out p_paddr, then the LMA in the section table
becomes wrong. */
phdr[i].p_paddr = 0;
#endif
}
return TRUE;
}
/* The default literal sections should always be marked as "code" (i.e.,
SHF_EXECINSTR). This is particularly important for big-endian mode
when we do not want their contents byte reversed. */
static const struct bfd_elf_special_section elf32_rx_special_sections[] =
{
{ STRING_COMMA_LEN (".init_array"), 0, SHT_INIT_ARRAY, SHF_ALLOC + SHF_EXECINSTR },
{ STRING_COMMA_LEN (".fini_array"), 0, SHT_FINI_ARRAY, SHF_ALLOC + SHF_EXECINSTR },
{ STRING_COMMA_LEN (".preinit_array"), 0, SHT_PREINIT_ARRAY, SHF_ALLOC + SHF_EXECINSTR },
{ NULL, 0, 0, 0, 0 }
};
#define ELF_ARCH bfd_arch_rx
#define ELF_MACHINE_CODE EM_RX
#define ELF_MAXPAGESIZE 0x1000
#define TARGET_BIG_SYM bfd_elf32_rx_be_vec
#define TARGET_BIG_NAME "elf32-rx-be"
#define TARGET_LITTLE_SYM bfd_elf32_rx_le_vec
#define TARGET_LITTLE_NAME "elf32-rx-le"
#define elf_info_to_howto_rel NULL
#define elf_info_to_howto rx_info_to_howto_rela
#define elf_backend_object_p rx_elf_object_p
#define elf_backend_relocate_section rx_elf_relocate_section
#define elf_symbol_leading_char ('_')
#define elf_backend_can_gc_sections 1
#define elf_backend_modify_program_headers elf32_rx_modify_program_headers
#define bfd_elf32_bfd_reloc_type_lookup rx_reloc_type_lookup
#define bfd_elf32_bfd_reloc_name_lookup rx_reloc_name_lookup
#define bfd_elf32_bfd_set_private_flags rx_elf_set_private_flags
#define bfd_elf32_bfd_merge_private_bfd_data rx_elf_merge_private_bfd_data
#define bfd_elf32_bfd_print_private_bfd_data rx_elf_print_private_bfd_data
#define bfd_elf32_get_section_contents rx_get_section_contents
#define bfd_elf32_set_section_contents rx_set_section_contents
#define bfd_elf32_bfd_final_link rx_final_link
#define bfd_elf32_bfd_relax_section elf32_rx_relax_section_wrapper
#define elf_backend_special_sections elf32_rx_special_sections
#include "elf32-target.h"
/* We define a second big-endian target that doesn't have the custom
section get/set hooks, for times when we want to preserve the
pre-swapped .text sections (like objcopy). */
#undef TARGET_BIG_SYM
#define TARGET_BIG_SYM bfd_elf32_rx_be_ns_vec
#undef TARGET_BIG_NAME
#define TARGET_BIG_NAME "elf32-rx-be-ns"
#undef TARGET_LITTLE_SYM
#undef bfd_elf32_get_section_contents
#undef bfd_elf32_set_section_contents
#undef elf32_bed
#define elf32_bed elf32_rx_be_ns_bed
#include "elf32-target.h"
|