/* RISC-V simulator. Copyright (C) 2005-2021 Free Software Foundation, Inc. Contributed by Mike Frysinger. This file is part of simulators. This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 3 of the License, or (at your option) any later version. This program is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. You should have received a copy of the GNU General Public License along with this program. If not, see . */ /* This must come before any other includes. */ #include "defs.h" #include "sim-main.h" #include "sim-options.h" void sim_engine_run (SIM_DESC sd, int next_cpu_nr, /* ignore */ int nr_cpus, /* ignore */ int siggnal) /* ignore */ { SIM_CPU *cpu; SIM_ASSERT (STATE_MAGIC (sd) == SIM_MAGIC_NUMBER); cpu = STATE_CPU (sd, 0); while (1) { step_once (cpu); if (sim_events_tick (sd)) sim_events_process (sd); } } static void free_state (SIM_DESC sd) { if (STATE_MODULES (sd) != NULL) sim_module_uninstall (sd); sim_cpu_free_all (sd); sim_state_free (sd); } extern const SIM_MACH * const riscv_sim_machs[]; SIM_DESC sim_open (SIM_OPEN_KIND kind, host_callback *callback, struct bfd *abfd, char * const *argv) { char c; int i; SIM_DESC sd = sim_state_alloc_extra (kind, callback, sizeof (struct riscv_sim_state)); /* Set default options before parsing user options. */ STATE_MACHS (sd) = riscv_sim_machs; STATE_MODEL_NAME (sd) = WITH_TARGET_WORD_BITSIZE == 32 ? "RV32G" : "RV64G"; current_target_byte_order = BFD_ENDIAN_LITTLE; /* The cpu data is kept in a separately allocated chunk of memory. */ if (sim_cpu_alloc_all (sd, 1) != SIM_RC_OK) { free_state (sd); return 0; } if (sim_pre_argv_init (sd, argv[0]) != SIM_RC_OK) { free_state (sd); return 0; } /* XXX: Default to the Virtual environment. */ if (STATE_ENVIRONMENT (sd) == ALL_ENVIRONMENT) STATE_ENVIRONMENT (sd) = VIRTUAL_ENVIRONMENT; /* The parser will print an error message for us, so we silently return. */ if (sim_parse_args (sd, argv) != SIM_RC_OK) { free_state (sd); return 0; } /* Check for/establish the a reference program image. */ if (sim_analyze_program (sd, (STATE_PROG_ARGV (sd) != NULL ? *STATE_PROG_ARGV (sd) : NULL), abfd) != SIM_RC_OK) { free_state (sd); return 0; } /* Establish any remaining configuration options. */ if (sim_config (sd) != SIM_RC_OK) { free_state (sd); return 0; } if (sim_post_argv_init (sd) != SIM_RC_OK) { free_state (sd); return 0; } /* CPU specific initialization. */ for (i = 0; i < MAX_NR_PROCESSORS; ++i) { SIM_CPU *cpu = STATE_CPU (sd, i); initialize_cpu (sd, cpu, i); } /* Allocate external memory if none specified by user. Use address 4 here in case the user wanted address 0 unmapped. */ if (sim_core_read_buffer (sd, NULL, read_map, &c, 4, 1) == 0) sim_do_commandf (sd, "memory-size %#x", DEFAULT_MEM_SIZE); return sd; } SIM_RC sim_create_inferior (SIM_DESC sd, struct bfd *abfd, char * const *argv, char * const *env) { SIM_CPU *cpu = STATE_CPU (sd, 0); SIM_ADDR addr; /* Set the PC. */ if (abfd != NULL) addr = bfd_get_start_address (abfd); else addr = 0; sim_pc_set (cpu, addr); /* Standalone mode (i.e. `run`) will take care of the argv for us in sim_open() -> sim_parse_args(). But in debug mode (i.e. 'target sim' with `gdb`), we need to handle it because the user can change the argv on the fly via gdb's 'run'. */ if (STATE_PROG_ARGV (sd) != argv) { freeargv (STATE_PROG_ARGV (sd)); STATE_PROG_ARGV (sd) = dupargv (argv); } initialize_env (sd, (void *)argv, (void *)env); return SIM_RC_OK; }