# Makefile template for Configure for the frv simulator # Copyright (C) 1998-2021 Free Software Foundation, Inc. # Contributed by Red Hat. # # This program is free software; you can redistribute it and/or modify # it under the terms of the GNU General Public License as published by # the Free Software Foundation; either version 3 of the License, or # (at your option) any later version. # # This program is distributed in the hope that it will be useful, # but WITHOUT ANY WARRANTY; without even the implied warranty of # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the # GNU General Public License for more details. # # You should have received a copy of the GNU General Public License # along with this program. If not, see . ## COMMON_PRE_CONFIG_FRAG FRV_OBJS = frv.o cpu.o decode.o sem.o model.o mloop.o cgen-par.o SIM_OBJS = \ $(SIM_NEW_COMMON_OBJS) \ cgen-utils.o cgen-trace.o cgen-scache.o cgen-fpu.o cgen-accfp.o \ cgen-run.o \ sim-if.o arch.o \ $(FRV_OBJS) \ traps.o interrupts.o memory.o cache.o pipeline.o \ profile.o profile-fr400.o profile-fr450.o profile-fr500.o profile-fr550.o options.o \ reset.o registers.o # Extra headers included by sim-main.h. SIM_EXTRA_DEPS = \ $(CGEN_INCLUDE_DEPS) \ arch.h cpuall.h frv-sim.h $(srcdir)/../../opcodes/frv-desc.h cache.h \ registers.h profile.h eng.h \ $(sim-options_h) SIM_EXTRA_CFLAGS = @sim_trapdump@ SIM_EXTRA_CLEAN = frv-clean # Code doesn't build cleanly yet. SIM_WERROR_CFLAGS = ## COMMON_POST_CONFIG_FRAG arch = frv # FRV objs FRVBF_INCLUDE_DEPS = \ $(CGEN_MAIN_CPU_DEPS) \ $(SIM_EXTRA_DEPS) \ cpu.h decode.h eng.h # FIXME: Use of `mono' is wip. mloop.c eng.h: stamp-mloop stamp-mloop: $(srcdir)/../common/genmloop.sh mloop.in Makefile $(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \ -mono -scache -parallel-generic-write -parallel-only \ -cpu frvbf -infile $(srcdir)/mloop.in $(SHELL) $(srcroot)/move-if-change eng.hin eng.h $(SHELL) $(srcroot)/move-if-change mloop.cin mloop.c touch stamp-mloop frv-clean: rm -f mloop.c eng.h stamp-mloop rm -f tmp-* rm -f stamp-arch stamp-cpu stamp-arch: $(CGEN_READ_SCM) $(CGEN_ARCH_SCM) $(srcdir)/../../cpu/frv.cpu $(MAKE) cgen-arch $(CGEN_FLAGS_TO_PASS) mach=all \ archfile=$(srcdir)/../../cpu/frv.cpu \ FLAGS="with-scache" touch stamp-arch arch.h arch.c cpuall.h: $(CGEN_MAINT) stamp-arch # @true stamp-cpu: $(CGEN_READ_SCM) $(CGEN_CPU_SCM) $(CGEN_DECODE_SCM) $(srcdir)/../../cpu/frv.cpu $(MAKE) cgen-cpu-decode $(CGEN_FLAGS_TO_PASS) \ cpu=frvbf mach=frv,fr550,fr500,fr450,fr400,tomcat,simple SUFFIX= \ archfile=$(srcdir)/../../cpu/frv.cpu \ FLAGS="with-scache with-profile=fn with-generic-write with-parallel-only" \ EXTRAFILES="$(CGEN_CPU_SEM)" touch stamp-cpu cpu.h sem.c model.c decode.c decode.h: $(CGEN_MAINT) stamp-cpu # @true