# Makefile.in generated by automake 1.15.1 from Makefile.am.
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am__installdirs = "$(DESTDIR)$(armdocdir)" "$(DESTDIR)$(dtbdir)" \
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am__pkginclude_HEADERS_DIST = $(srcroot)/include/sim/callback.h \
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RECURSIVE_CLEAN_TARGETS = mostlyclean-recursive clean-recursive	\
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am__recursive_targets = \
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AM_RECURSIVE_TARGETS = $(am__recursive_targets:-recursive=) TAGS CTAGS \
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am__tagged_files = $(HEADERS) $(SOURCES) $(TAGS_FILES) \
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am__uniquify_input = $(AWK) '\
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# Make sure the list of sources is unique.  This is necessary because,
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am__define_uniq_tagged_files = \
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ETAGS = etags
CTAGS = ctags
CSCOPE = cscope
DEJATOOL = $(PACKAGE)
RUNTESTDEFAULTFLAGS = --tool $$tool --srcdir $$srcdir
EXPECT = expect
RUNTEST = runtest
am__tty_colors_dummy = \
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am__tty_colors = { \
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am__recheck_rx = ^[ 	]*:recheck:[ 	]*
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am__list_recheck_tests = $(AWK) '{ \
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# A command that, given a newline-separated list of test names on the
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am__create_global_log = $(AWK) ' \
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{ \
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# Restructured Text title.
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# Solaris 10 'make', and several other traditional 'make' implementations,
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am__sh_e_setup = case $$- in *e*) set +e;; esac
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# To be inserted before the command running the test.  Creates the
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am__check_pre = \
$(am__sh_e_setup);					\
$(am__vpath_adj_setup) $(am__vpath_adj)			\
$(am__tty_colors);					\
srcdir=$(srcdir); export srcdir;			\
case "$@" in						\
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esac;							\
test "x$$am__odir" = x"." || test -d "$$am__odir" 	\
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if test -f "./$$f"; then dir=./;			\
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if test -n '$(DISABLE_HARD_ERRORS)'; then		\
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$(AM_TESTS_ENVIRONMENT) $(TESTS_ENVIRONMENT)
# A shell command to get the names of the tests scripts with any registered
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am__set_TESTS_bases = \
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RECHECK_LOGS = $(TEST_LOGS)
TEST_SUITE_LOG = test-suite.log
TEST_EXTENSIONS = @EXEEXT@ .test
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am__set_b = \
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am__test_logs1 = $(TESTS:=.log)
am__test_logs2 = $(am__test_logs1:@EXEEXT@.log=.log)
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TEST_LOG_COMPILE = $(TEST_LOG_COMPILER) $(AM_TEST_LOG_FLAGS) \
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DIST_SUBDIRS = $(SUBDIRS)
ACLOCAL = @ACLOCAL@
AMTAR = @AMTAR@
AM_DEFAULT_VERBOSITY = @AM_DEFAULT_VERBOSITY@
AR = @AR@
AR_FOR_BUILD = @AR_FOR_BUILD@
AS_FOR_TARGET = @AS_FOR_TARGET@
AS_FOR_TARGET_AARCH64 = @AS_FOR_TARGET_AARCH64@
AS_FOR_TARGET_ARM = @AS_FOR_TARGET_ARM@
AS_FOR_TARGET_AVR = @AS_FOR_TARGET_AVR@
AS_FOR_TARGET_BFIN = @AS_FOR_TARGET_BFIN@
AS_FOR_TARGET_BPF = @AS_FOR_TARGET_BPF@
AS_FOR_TARGET_CR16 = @AS_FOR_TARGET_CR16@
AS_FOR_TARGET_CRIS = @AS_FOR_TARGET_CRIS@
AS_FOR_TARGET_D10V = @AS_FOR_TARGET_D10V@
AS_FOR_TARGET_ERC32 = @AS_FOR_TARGET_ERC32@
AS_FOR_TARGET_EXAMPLE_SYNACOR = @AS_FOR_TARGET_EXAMPLE_SYNACOR@
AS_FOR_TARGET_FRV = @AS_FOR_TARGET_FRV@
AS_FOR_TARGET_FT32 = @AS_FOR_TARGET_FT32@
AS_FOR_TARGET_H8300 = @AS_FOR_TARGET_H8300@
AS_FOR_TARGET_IQ2000 = @AS_FOR_TARGET_IQ2000@
AS_FOR_TARGET_LM32 = @AS_FOR_TARGET_LM32@
AS_FOR_TARGET_M32C = @AS_FOR_TARGET_M32C@
AS_FOR_TARGET_M32R = @AS_FOR_TARGET_M32R@
AS_FOR_TARGET_M68HC11 = @AS_FOR_TARGET_M68HC11@
AS_FOR_TARGET_MCORE = @AS_FOR_TARGET_MCORE@
AS_FOR_TARGET_MICROBLAZE = @AS_FOR_TARGET_MICROBLAZE@
AS_FOR_TARGET_MIPS = @AS_FOR_TARGET_MIPS@
AS_FOR_TARGET_MN10300 = @AS_FOR_TARGET_MN10300@
AS_FOR_TARGET_MOXIE = @AS_FOR_TARGET_MOXIE@
AS_FOR_TARGET_MSP430 = @AS_FOR_TARGET_MSP430@
AS_FOR_TARGET_OR1K = @AS_FOR_TARGET_OR1K@
AS_FOR_TARGET_PPC = @AS_FOR_TARGET_PPC@
AS_FOR_TARGET_PRU = @AS_FOR_TARGET_PRU@
AS_FOR_TARGET_RISCV = @AS_FOR_TARGET_RISCV@
AS_FOR_TARGET_RL78 = @AS_FOR_TARGET_RL78@
AS_FOR_TARGET_RX = @AS_FOR_TARGET_RX@
AS_FOR_TARGET_SH = @AS_FOR_TARGET_SH@
AS_FOR_TARGET_V850 = @AS_FOR_TARGET_V850@
AUTOCONF = @AUTOCONF@
AUTOHEADER = @AUTOHEADER@
AUTOMAKE = @AUTOMAKE@
AWK = @AWK@
CC = @CC@
CCDEPMODE = @CCDEPMODE@
CC_FOR_BUILD = @CC_FOR_BUILD@
CC_FOR_TARGET = @CC_FOR_TARGET@
CC_FOR_TARGET_AARCH64 = @CC_FOR_TARGET_AARCH64@
CC_FOR_TARGET_ARM = @CC_FOR_TARGET_ARM@
CC_FOR_TARGET_AVR = @CC_FOR_TARGET_AVR@
CC_FOR_TARGET_BFIN = @CC_FOR_TARGET_BFIN@
CC_FOR_TARGET_BPF = @CC_FOR_TARGET_BPF@
CC_FOR_TARGET_CR16 = @CC_FOR_TARGET_CR16@
CC_FOR_TARGET_CRIS = @CC_FOR_TARGET_CRIS@
CC_FOR_TARGET_D10V = @CC_FOR_TARGET_D10V@
CC_FOR_TARGET_ERC32 = @CC_FOR_TARGET_ERC32@
CC_FOR_TARGET_EXAMPLE_SYNACOR = @CC_FOR_TARGET_EXAMPLE_SYNACOR@
CC_FOR_TARGET_FRV = @CC_FOR_TARGET_FRV@
CC_FOR_TARGET_FT32 = @CC_FOR_TARGET_FT32@
CC_FOR_TARGET_H8300 = @CC_FOR_TARGET_H8300@
CC_FOR_TARGET_IQ2000 = @CC_FOR_TARGET_IQ2000@
CC_FOR_TARGET_LM32 = @CC_FOR_TARGET_LM32@
CC_FOR_TARGET_M32C = @CC_FOR_TARGET_M32C@
CC_FOR_TARGET_M32R = @CC_FOR_TARGET_M32R@
CC_FOR_TARGET_M68HC11 = @CC_FOR_TARGET_M68HC11@
CC_FOR_TARGET_MCORE = @CC_FOR_TARGET_MCORE@
CC_FOR_TARGET_MICROBLAZE = @CC_FOR_TARGET_MICROBLAZE@
CC_FOR_TARGET_MIPS = @CC_FOR_TARGET_MIPS@
CC_FOR_TARGET_MN10300 = @CC_FOR_TARGET_MN10300@
CC_FOR_TARGET_MOXIE = @CC_FOR_TARGET_MOXIE@
CC_FOR_TARGET_MSP430 = @CC_FOR_TARGET_MSP430@
CC_FOR_TARGET_OR1K = @CC_FOR_TARGET_OR1K@
CC_FOR_TARGET_PPC = @CC_FOR_TARGET_PPC@
CC_FOR_TARGET_PRU = @CC_FOR_TARGET_PRU@
CC_FOR_TARGET_RISCV = @CC_FOR_TARGET_RISCV@
CC_FOR_TARGET_RL78 = @CC_FOR_TARGET_RL78@
CC_FOR_TARGET_RX = @CC_FOR_TARGET_RX@
CC_FOR_TARGET_SH = @CC_FOR_TARGET_SH@
CC_FOR_TARGET_V850 = @CC_FOR_TARGET_V850@
CFLAGS = @CFLAGS@
CFLAGS_FOR_BUILD = @CFLAGS_FOR_BUILD@
CGEN_MAINT = @CGEN_MAINT@
CPP = @CPP@
CPPFLAGS = @CPPFLAGS@
CPPFLAGS_FOR_BUILD = @CPPFLAGS_FOR_BUILD@
CYGPATH_W = @CYGPATH_W@
C_DIALECT = @C_DIALECT@
DEFS = @DEFS@
DEPDIR = @DEPDIR@
DSYMUTIL = @DSYMUTIL@
DTC = @DTC@
DUMPBIN = @DUMPBIN@
ECHO_C = @ECHO_C@
ECHO_N = @ECHO_N@
ECHO_T = @ECHO_T@
EGREP = @EGREP@
EXEEXT = @EXEEXT@
FGREP = @FGREP@
GREP = @GREP@
IGEN_FLAGS_SMP = @IGEN_FLAGS_SMP@
INSTALL = @INSTALL@
INSTALL_DATA = @INSTALL_DATA@
INSTALL_PROGRAM = @INSTALL_PROGRAM@
INSTALL_SCRIPT = @INSTALL_SCRIPT@
INSTALL_STRIP_PROGRAM = @INSTALL_STRIP_PROGRAM@
LD = @LD@
LDFLAGS = @LDFLAGS@
LDFLAGS_FOR_BUILD = @LDFLAGS_FOR_BUILD@
LD_FOR_TARGET = @LD_FOR_TARGET@
LD_FOR_TARGET_AARCH64 = @LD_FOR_TARGET_AARCH64@
LD_FOR_TARGET_ARM = @LD_FOR_TARGET_ARM@
LD_FOR_TARGET_AVR = @LD_FOR_TARGET_AVR@
LD_FOR_TARGET_BFIN = @LD_FOR_TARGET_BFIN@
LD_FOR_TARGET_BPF = @LD_FOR_TARGET_BPF@
LD_FOR_TARGET_CR16 = @LD_FOR_TARGET_CR16@
LD_FOR_TARGET_CRIS = @LD_FOR_TARGET_CRIS@
LD_FOR_TARGET_D10V = @LD_FOR_TARGET_D10V@
LD_FOR_TARGET_ERC32 = @LD_FOR_TARGET_ERC32@
LD_FOR_TARGET_EXAMPLE_SYNACOR = @LD_FOR_TARGET_EXAMPLE_SYNACOR@
LD_FOR_TARGET_FRV = @LD_FOR_TARGET_FRV@
LD_FOR_TARGET_FT32 = @LD_FOR_TARGET_FT32@
LD_FOR_TARGET_H8300 = @LD_FOR_TARGET_H8300@
LD_FOR_TARGET_IQ2000 = @LD_FOR_TARGET_IQ2000@
LD_FOR_TARGET_LM32 = @LD_FOR_TARGET_LM32@
LD_FOR_TARGET_M32C = @LD_FOR_TARGET_M32C@
LD_FOR_TARGET_M32R = @LD_FOR_TARGET_M32R@
LD_FOR_TARGET_M68HC11 = @LD_FOR_TARGET_M68HC11@
LD_FOR_TARGET_MCORE = @LD_FOR_TARGET_MCORE@
LD_FOR_TARGET_MICROBLAZE = @LD_FOR_TARGET_MICROBLAZE@
LD_FOR_TARGET_MIPS = @LD_FOR_TARGET_MIPS@
LD_FOR_TARGET_MN10300 = @LD_FOR_TARGET_MN10300@
LD_FOR_TARGET_MOXIE = @LD_FOR_TARGET_MOXIE@
LD_FOR_TARGET_MSP430 = @LD_FOR_TARGET_MSP430@
LD_FOR_TARGET_OR1K = @LD_FOR_TARGET_OR1K@
LD_FOR_TARGET_PPC = @LD_FOR_TARGET_PPC@
LD_FOR_TARGET_PRU = @LD_FOR_TARGET_PRU@
LD_FOR_TARGET_RISCV = @LD_FOR_TARGET_RISCV@
LD_FOR_TARGET_RL78 = @LD_FOR_TARGET_RL78@
LD_FOR_TARGET_RX = @LD_FOR_TARGET_RX@
LD_FOR_TARGET_SH = @LD_FOR_TARGET_SH@
LD_FOR_TARGET_V850 = @LD_FOR_TARGET_V850@
LIBOBJS = @LIBOBJS@
LIBS = @LIBS@
LIBTOOL = @LIBTOOL@
LIPO = @LIPO@
LN_S = @LN_S@
LTLIBOBJS = @LTLIBOBJS@
MAINT = @MAINT@
MAKEINFO = @MAKEINFO@
MKDIR_P = @MKDIR_P@
NM = @NM@
NMEDIT = @NMEDIT@
OBJDUMP = @OBJDUMP@
OBJEXT = @OBJEXT@
OTOOL = @OTOOL@
OTOOL64 = @OTOOL64@
PACKAGE = @PACKAGE@
PACKAGE_BUGREPORT = @PACKAGE_BUGREPORT@
PACKAGE_NAME = @PACKAGE_NAME@
PACKAGE_STRING = @PACKAGE_STRING@
PACKAGE_TARNAME = @PACKAGE_TARNAME@
PACKAGE_URL = @PACKAGE_URL@
PACKAGE_VERSION = @PACKAGE_VERSION@
PATH_SEPARATOR = @PATH_SEPARATOR@
PKGVERSION = @PKGVERSION@
PKG_CONFIG = @PKG_CONFIG@
PKG_CONFIG_LIBDIR = @PKG_CONFIG_LIBDIR@
PKG_CONFIG_PATH = @PKG_CONFIG_PATH@
RANLIB = @RANLIB@
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READLINE_CFLAGS = @READLINE_CFLAGS@
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REPORT_BUGS_TEXI = @REPORT_BUGS_TEXI@
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SDL_CFLAGS = @SDL_CFLAGS@
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SED = @SED@
SET_MAKE = @SET_MAKE@
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SIM_COMMON_BUILD_FALSE = @SIM_COMMON_BUILD_FALSE@
SIM_COMMON_BUILD_TRUE = @SIM_COMMON_BUILD_TRUE@
SIM_ENABLED_ARCHES = @SIM_ENABLED_ARCHES@
SIM_FRV_TRAPDUMP_FLAGS = @SIM_FRV_TRAPDUMP_FLAGS@
SIM_HW_CFLAGS = @SIM_HW_CFLAGS@
SIM_HW_SOCKSER = @SIM_HW_SOCKSER@
SIM_INLINE = @SIM_INLINE@
SIM_MIPS_BITSIZE = @SIM_MIPS_BITSIZE@
SIM_MIPS_FPU_BITSIZE = @SIM_MIPS_FPU_BITSIZE@
SIM_MIPS_GEN = @SIM_MIPS_GEN@
SIM_MIPS_IGEN_ITABLE_FLAGS = @SIM_MIPS_IGEN_ITABLE_FLAGS@
SIM_MIPS_M16_FLAGS = @SIM_MIPS_M16_FLAGS@
SIM_MIPS_MULTI_IGEN_CONFIGS = @SIM_MIPS_MULTI_IGEN_CONFIGS@
SIM_MIPS_MULTI_OBJ = @SIM_MIPS_MULTI_OBJ@
SIM_MIPS_MULTI_SRC = @SIM_MIPS_MULTI_SRC@
SIM_MIPS_SINGLE_FLAGS = @SIM_MIPS_SINGLE_FLAGS@
SIM_MIPS_SUBTARGET = @SIM_MIPS_SUBTARGET@
SIM_PRIMARY_TARGET = @SIM_PRIMARY_TARGET@
SIM_RISCV_BITSIZE = @SIM_RISCV_BITSIZE@
SIM_RX_CYCLE_ACCURATE_FLAGS = @SIM_RX_CYCLE_ACCURATE_FLAGS@
SIM_SUBDIRS = @SIM_SUBDIRS@
SIM_TOOLCHAIN_VARS = @SIM_TOOLCHAIN_VARS@
STRIP = @STRIP@
TERMCAP_LIB = @TERMCAP_LIB@
VERSION = @VERSION@
WARN_CFLAGS = @WARN_CFLAGS@
WERROR_CFLAGS = @WERROR_CFLAGS@
abs_builddir = @abs_builddir@
abs_srcdir = @abs_srcdir@
abs_top_builddir = @abs_top_builddir@
abs_top_srcdir = @abs_top_srcdir@
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cgen = @cgen@
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datarootdir = @datarootdir@
docdir = @docdir@
dvidir = @dvidir@
exec_prefix = @exec_prefix@
host = @host@
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host_cpu = @host_cpu@
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htmldir = @htmldir@
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AUTOMAKE_OPTIONS = dejagnu foreign no-dist subdir-objects
ACLOCAL_AMFLAGS = -Im4 -I.. -I../config
GNULIB_PARENT_DIR = ..
srccom = $(srcdir)/common
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AM_MAKEFLAGS = SIM_NEW_COMMON_OBJS_="$(SIM_NEW_COMMON_OBJS)" \
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pkginclude_HEADERS = $(am__append_1)
noinst_LIBRARIES = $(SIM_COMMON_LIB) $(am__append_5)
CLEANFILES = common/version.c common/version.c-stamp \
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DISTCLEANFILES = $(am__append_67)
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	$(am__append_85) $(am__append_88)
AM_CFLAGS = $(WERROR_CFLAGS) $(WARN_CFLAGS)
AM_CPPFLAGS = $(INCGNU) -I$(srcroot)/include -I../bfd -I.. \
	$(SIM_HW_CFLAGS) $(SIM_INLINE) -I$(srcdir)/common \
	-DSIM_COMMON_BUILD
AM_CPPFLAGS_FOR_BUILD = -I$(srcroot)/include $(SIM_HW_CFLAGS) \
	$(SIM_INLINE) -I$(srcdir)/common
COMPILE_FOR_BUILD = $(CC_FOR_BUILD) $(AM_CPPFLAGS_FOR_BUILD) $(CPPFLAGS_FOR_BUILD) $(CFLAGS_FOR_BUILD)
LINK_FOR_BUILD = $(CC_FOR_BUILD) $(CFLAGS_FOR_BUILD) $(LDFLAGS_FOR_BUILD) -o $@
SIM_ALL_RECURSIVE_DEPS = common/libcommon.a \
	$(common_HW_CONFIG_H_TARGETS) $(am__append_4) $(am__append_14) \
	$(am__append_17) $(am__append_23) $(am__append_26) \
	$(am__append_34) $(am__append_39) $(am__append_43) \
	$(am__append_46) $(am__append_51) $(am__append_55) \
	$(am__append_65) $(am__append_70) $(am__append_75) \
	$(am__append_83) $(am__append_87)
SIM_INSTALL_DATA_LOCAL_DEPS = 
SIM_INSTALL_EXEC_LOCAL_DEPS = $(am__append_30)
SIM_UNINSTALL_LOCAL_DEPS = $(am__append_31)
SIM_COMMON_LIB = common/libcommon.a
common_libcommon_a_SOURCES = \
	common/callback.c \
	common/portability.c \
	common/sim-load.c \
	common/syscall.c \
	common/target-newlib-errno.c \
	common/target-newlib-open.c \
	common/target-newlib-signal.c \
	common/target-newlib-syscall.c \
	common/version.c

SIM_COMMON_HW_OBJS = \
	hw-alloc.o \
	hw-base.o \
	hw-device.o \
	hw-events.o \
	hw-handles.o \
	hw-instances.o \
	hw-ports.o \
	hw-properties.o \
	hw-tree.o \
	sim-hw.o

SIM_NEW_COMMON_OBJS = sim-arange.o sim-bits.o sim-close.o \
	sim-command.o sim-config.o sim-core.o sim-cpu.o sim-endian.o \
	sim-engine.o sim-events.o sim-fpu.o sim-hload.o sim-hrw.o \
	sim-io.o sim-info.o sim-memopt.o sim-model.o sim-module.o \
	sim-options.o sim-profile.o sim-reason.o sim-reg.o \
	sim-signal.o sim-stop.o sim-syscall.o sim-trace.o sim-utils.o \
	sim-watch.o $(am__append_2)
SIM_HW_DEVICES = cfi core pal glue
common_HW_CONFIG_H_TARGETS = $(patsubst %,%/hw-config.h,$(SIM_ENABLED_ARCHES))
LIBIBERTY_LIB = ../libiberty/libiberty.a
BFD_LIB = ../bfd/libbfd.la
OPCODES_LIB = ../opcodes/libopcodes.la
SIM_COMMON_LIBS = \
	$(SIM_COMMON_LIB) \
	$(BFD_LIB) \
	$(OPCODES_LIB) \
	$(LIBIBERTY_LIB) \
	$(LIBGNU) \
	$(LIBGNU_EXTRA_LIBS)

GUILE = $(or $(wildcard ../guile/libguile/guile),guile)
CGEN = "$(GUILE) -l $(cgendir)/guile.scm -s"
CGENFLAGS = -v
CGEN_CPU_DIR = $(cgendir)/cpu
CPU_DIR = $(srcroot)/cpu
CGEN_ARCHFILE = $(CPU_DIR)/$(@D).cpu
CGEN_READ_SCM = $(cgendir)/sim.scm
CGEN_ARCH_SCM = $(cgendir)/sim-arch.scm
CGEN_CPU_SCM = $(cgendir)/sim-cpu.scm $(cgendir)/sim-model.scm
CGEN_DECODE_SCM = $(cgendir)/sim-decode.scm
CGEN_DESC_SCM = $(cgendir)/desc.scm $(cgendir)/desc-cpu.scm
CGEN_CPU_EXTR = /extr/
CGEN_CPU_READ = /read/
CGEN_CPU_WRITE = /write/
CGEN_CPU_SEM = /sem/
CGEN_CPU_SEMSW = /semsw/
CGEN_WRAPPER = $(srccom)/cgen.sh
CGEN_GEN_ARCH = \
	$(SHELL) $(CGEN_WRAPPER) arch $(srcdir)/$(@D) \
		$(CGEN) $(cgendir) "$(CGENFLAGS)" \
		$(@D) "$$FLAGS" ignored "$$isa" $$mach ignored \
		$(CGEN_ARCHFILE) ignored

CGEN_GEN_CPU = \
	$(SHELL) $(CGEN_WRAPPER) cpu $(srcdir)/$(@D) \
		$(CGEN) $(cgendir) "$(CGENFLAGS)" \
		$(@D) "$$FLAGS" $$cpu "$$isa" $$mach "$$SUFFIX" \
		$(CGEN_ARCHFILE) "$$EXTRAFILES"

CGEN_GEN_DEFS = \
	$(SHELL) $(CGEN_WRAPPER) defs $(srcdir)/$(@D) \
		$(CGEN) $(cgendir) "$(CGENFLAGS)" \
		$(@D) "$$FLAGS" $$cpu "$$isa" $$mach "$$SUFFIX" \
		$(CGEN_ARCHFILE) ignored

CGEN_GEN_DECODE = \
	$(SHELL) $(CGEN_WRAPPER) decode $(srcdir)/$(@D) \
		$(CGEN) $(cgendir) "$(CGENFLAGS)" \
		$(@D) "$$FLAGS" $$cpu "$$isa" $$mach "$$SUFFIX" \
		$(CGEN_ARCHFILE) "$$EXTRAFILES"

CGEN_GEN_CPU_DECODE = \
	$(SHELL) $(CGEN_WRAPPER) cpu-decode $(srcdir)/$(@D) \
		$(CGEN) $(cgendir) "$(CGENFLAGS)" \
		$(@D) "$$FLAGS" $$cpu "$$isa" $$mach "$$SUFFIX" \
		$(CGEN_ARCHFILE) "$$EXTRAFILES"

CGEN_GEN_CPU_DESC = \
	$(SHELL) $(CGEN_WRAPPER) desc $(srcdir)/$(@D) \
		$(CGEN) $(cgendir) "$(CGENFLAGS)" \
		$(@D) "$$FLAGS" $$cpu "$$isa" $$mach "$$SUFFIX" \
		$(CGEN_ARCHFILE) ignored $$opcfile


# igen leaks memory, and therefore makes AddressSanitizer unhappy.  Disable
# leak detection while running it.
@SIM_ENABLE_IGEN_TRUE@IGEN = igen/igen$(EXEEXT)
@SIM_ENABLE_IGEN_TRUE@IGEN_RUN = ASAN_OPTIONS=detect_leaks=0 $(IGEN) $(IGEN_FLAGS_SMP)
@SIM_ENABLE_IGEN_TRUE@igen_libigen_a_SOURCES = \
@SIM_ENABLE_IGEN_TRUE@	igen/table.c \
@SIM_ENABLE_IGEN_TRUE@	igen/lf.c \
@SIM_ENABLE_IGEN_TRUE@	igen/misc.c \
@SIM_ENABLE_IGEN_TRUE@	igen/filter_host.c \
@SIM_ENABLE_IGEN_TRUE@	igen/ld-decode.c \
@SIM_ENABLE_IGEN_TRUE@	igen/ld-cache.c \
@SIM_ENABLE_IGEN_TRUE@	igen/filter.c \
@SIM_ENABLE_IGEN_TRUE@	igen/ld-insn.c \
@SIM_ENABLE_IGEN_TRUE@	igen/gen-model.c \
@SIM_ENABLE_IGEN_TRUE@	igen/gen-itable.c \
@SIM_ENABLE_IGEN_TRUE@	igen/gen-icache.c \
@SIM_ENABLE_IGEN_TRUE@	igen/gen-semantics.c \
@SIM_ENABLE_IGEN_TRUE@	igen/gen-idecode.c \
@SIM_ENABLE_IGEN_TRUE@	igen/gen-support.c \
@SIM_ENABLE_IGEN_TRUE@	igen/gen-engine.c \
@SIM_ENABLE_IGEN_TRUE@	igen/gen.c

@SIM_ENABLE_IGEN_TRUE@igen_igen_SOURCES = igen/igen.c
@SIM_ENABLE_IGEN_TRUE@igen_igen_LDADD = igen/libigen.a
@SIM_ENABLE_IGEN_TRUE@igen_filter_SOURCES = 
@SIM_ENABLE_IGEN_TRUE@igen_filter_LDADD = igen/filter-main.o igen/libigen.a
@SIM_ENABLE_IGEN_TRUE@igen_gen_SOURCES = 
@SIM_ENABLE_IGEN_TRUE@igen_gen_LDADD = igen/gen-main.o igen/libigen.a
@SIM_ENABLE_IGEN_TRUE@igen_ld_cache_SOURCES = 
@SIM_ENABLE_IGEN_TRUE@igen_ld_cache_LDADD = igen/ld-cache-main.o igen/libigen.a
@SIM_ENABLE_IGEN_TRUE@igen_ld_decode_SOURCES = 
@SIM_ENABLE_IGEN_TRUE@igen_ld_decode_LDADD = igen/ld-decode-main.o igen/libigen.a
@SIM_ENABLE_IGEN_TRUE@igen_ld_insn_SOURCES = 
@SIM_ENABLE_IGEN_TRUE@igen_ld_insn_LDADD = igen/ld-insn-main.o igen/libigen.a
@SIM_ENABLE_IGEN_TRUE@igen_table_SOURCES = 
@SIM_ENABLE_IGEN_TRUE@igen_table_LDADD = igen/table-main.o igen/libigen.a
@SIM_ENABLE_IGEN_TRUE@igen_IGEN_TOOLS = \
@SIM_ENABLE_IGEN_TRUE@	$(IGEN) \
@SIM_ENABLE_IGEN_TRUE@	igen/filter \
@SIM_ENABLE_IGEN_TRUE@	igen/gen \
@SIM_ENABLE_IGEN_TRUE@	igen/ld-cache \
@SIM_ENABLE_IGEN_TRUE@	igen/ld-decode \
@SIM_ENABLE_IGEN_TRUE@	igen/ld-insn \
@SIM_ENABLE_IGEN_TRUE@	igen/table

EXTRA_DEJAGNU_SITE_CONFIG = site-sim-config.exp

# Custom verbose test variables that automake doesn't provide (yet?).
AM_V_RUNTEST = $(AM_V_RUNTEST_@AM_V@)
AM_V_RUNTEST_ = $(AM_V_RUNTEST_@AM_DEFAULT_V@)
AM_V_RUNTEST_0 = @echo "  RUNTEST  $(RUNTESTFLAGS) $*";
AM_V_RUNTEST_1 = 
DO_RUNTEST = \
	LC_ALL=C; export LC_ALL; \
	EXPECT=${EXPECT} ; export EXPECT ; \
	runtest=$(RUNTEST); \
	$$runtest $(RUNTESTFLAGS)

testsuite_common_CPPFLAGS = \
	-I$(srcdir)/common \
	-I$(srcroot)/include \
	-I../bfd

@SIM_ENABLE_ARCH_aarch64_TRUE@aarch64_run_SOURCES = 
@SIM_ENABLE_ARCH_aarch64_TRUE@aarch64_run_LDADD = \
@SIM_ENABLE_ARCH_aarch64_TRUE@	aarch64/nrun.o \
@SIM_ENABLE_ARCH_aarch64_TRUE@	aarch64/libsim.a \
@SIM_ENABLE_ARCH_aarch64_TRUE@	$(SIM_COMMON_LIBS)

@SIM_ENABLE_ARCH_arm_TRUE@arm_run_SOURCES = 
@SIM_ENABLE_ARCH_arm_TRUE@arm_run_LDADD = \
@SIM_ENABLE_ARCH_arm_TRUE@	arm/nrun.o \
@SIM_ENABLE_ARCH_arm_TRUE@	arm/libsim.a \
@SIM_ENABLE_ARCH_arm_TRUE@	$(SIM_COMMON_LIBS)

@SIM_ENABLE_ARCH_arm_TRUE@armdocdir = $(docdir)/arm
@SIM_ENABLE_ARCH_arm_TRUE@armdoc_DATA = arm/README
@SIM_ENABLE_ARCH_avr_TRUE@avr_run_SOURCES = 
@SIM_ENABLE_ARCH_avr_TRUE@avr_run_LDADD = \
@SIM_ENABLE_ARCH_avr_TRUE@	avr/nrun.o \
@SIM_ENABLE_ARCH_avr_TRUE@	avr/libsim.a \
@SIM_ENABLE_ARCH_avr_TRUE@	$(SIM_COMMON_LIBS)

@SIM_ENABLE_ARCH_bfin_TRUE@bfin_run_SOURCES = 
@SIM_ENABLE_ARCH_bfin_TRUE@bfin_run_LDADD = \
@SIM_ENABLE_ARCH_bfin_TRUE@	bfin/nrun.o \
@SIM_ENABLE_ARCH_bfin_TRUE@	bfin/libsim.a \
@SIM_ENABLE_ARCH_bfin_TRUE@	$(SIM_COMMON_LIBS)

@SIM_ENABLE_ARCH_bfin_TRUE@bfin_SIM_EXTRA_HW_DEVICES = \
@SIM_ENABLE_ARCH_bfin_TRUE@	bfin_cec \
@SIM_ENABLE_ARCH_bfin_TRUE@	bfin_ctimer \
@SIM_ENABLE_ARCH_bfin_TRUE@	bfin_dma \
@SIM_ENABLE_ARCH_bfin_TRUE@	bfin_dmac \
@SIM_ENABLE_ARCH_bfin_TRUE@	bfin_ebiu_amc \
@SIM_ENABLE_ARCH_bfin_TRUE@	bfin_ebiu_ddrc \
@SIM_ENABLE_ARCH_bfin_TRUE@	bfin_ebiu_sdc \
@SIM_ENABLE_ARCH_bfin_TRUE@	bfin_emac \
@SIM_ENABLE_ARCH_bfin_TRUE@	bfin_eppi \
@SIM_ENABLE_ARCH_bfin_TRUE@	bfin_evt \
@SIM_ENABLE_ARCH_bfin_TRUE@	bfin_gpio \
@SIM_ENABLE_ARCH_bfin_TRUE@	bfin_gpio2 \
@SIM_ENABLE_ARCH_bfin_TRUE@	bfin_gptimer \
@SIM_ENABLE_ARCH_bfin_TRUE@	bfin_jtag \
@SIM_ENABLE_ARCH_bfin_TRUE@	bfin_mmu \
@SIM_ENABLE_ARCH_bfin_TRUE@	bfin_nfc \
@SIM_ENABLE_ARCH_bfin_TRUE@	bfin_otp \
@SIM_ENABLE_ARCH_bfin_TRUE@	bfin_pfmon \
@SIM_ENABLE_ARCH_bfin_TRUE@	bfin_pint \
@SIM_ENABLE_ARCH_bfin_TRUE@	bfin_pll \
@SIM_ENABLE_ARCH_bfin_TRUE@	bfin_ppi \
@SIM_ENABLE_ARCH_bfin_TRUE@	bfin_rtc \
@SIM_ENABLE_ARCH_bfin_TRUE@	bfin_sic \
@SIM_ENABLE_ARCH_bfin_TRUE@	bfin_spi \
@SIM_ENABLE_ARCH_bfin_TRUE@	bfin_trace \
@SIM_ENABLE_ARCH_bfin_TRUE@	bfin_twi \
@SIM_ENABLE_ARCH_bfin_TRUE@	bfin_uart \
@SIM_ENABLE_ARCH_bfin_TRUE@	bfin_uart2 \
@SIM_ENABLE_ARCH_bfin_TRUE@	bfin_wdog \
@SIM_ENABLE_ARCH_bfin_TRUE@	bfin_wp \
@SIM_ENABLE_ARCH_bfin_TRUE@	eth_phy

@SIM_ENABLE_ARCH_bpf_TRUE@bpf_run_SOURCES = 
@SIM_ENABLE_ARCH_bpf_TRUE@bpf_run_LDADD = \
@SIM_ENABLE_ARCH_bpf_TRUE@	bpf/nrun.o \
@SIM_ENABLE_ARCH_bpf_TRUE@	bpf/libsim.a \
@SIM_ENABLE_ARCH_bpf_TRUE@	$(SIM_COMMON_LIBS)

@SIM_ENABLE_ARCH_bpf_TRUE@bpf_BUILD_OUTPUTS = \
@SIM_ENABLE_ARCH_bpf_TRUE@	bpf/eng-le.h \
@SIM_ENABLE_ARCH_bpf_TRUE@	bpf/mloop-le.c \
@SIM_ENABLE_ARCH_bpf_TRUE@	bpf/stamp-mloop-le \
@SIM_ENABLE_ARCH_bpf_TRUE@	bpf/eng-be.h \
@SIM_ENABLE_ARCH_bpf_TRUE@	bpf/mloop-be.c \
@SIM_ENABLE_ARCH_bpf_TRUE@	bpf/stamp-mloop-be

@SIM_ENABLE_ARCH_cr16_TRUE@cr16_run_SOURCES = 
@SIM_ENABLE_ARCH_cr16_TRUE@cr16_run_LDADD = \
@SIM_ENABLE_ARCH_cr16_TRUE@	cr16/nrun.o \
@SIM_ENABLE_ARCH_cr16_TRUE@	cr16/libsim.a \
@SIM_ENABLE_ARCH_cr16_TRUE@	$(SIM_COMMON_LIBS)

@SIM_ENABLE_ARCH_cr16_TRUE@cr16_BUILD_OUTPUTS = \
@SIM_ENABLE_ARCH_cr16_TRUE@	cr16/gencode$(EXEEXT) \
@SIM_ENABLE_ARCH_cr16_TRUE@	cr16/simops.h \
@SIM_ENABLE_ARCH_cr16_TRUE@	cr16/table.c

@SIM_ENABLE_ARCH_cr16_TRUE@cr16_gencode_SOURCES = cr16/gencode.c
@SIM_ENABLE_ARCH_cr16_TRUE@cr16_gencode_LDADD = cr16/cr16-opc.o
@SIM_ENABLE_ARCH_cris_TRUE@cris_run_SOURCES = 
@SIM_ENABLE_ARCH_cris_TRUE@cris_run_LDADD = \
@SIM_ENABLE_ARCH_cris_TRUE@	cris/nrun.o \
@SIM_ENABLE_ARCH_cris_TRUE@	cris/libsim.a \
@SIM_ENABLE_ARCH_cris_TRUE@	$(SIM_COMMON_LIBS)

@SIM_ENABLE_ARCH_cris_TRUE@cris_SIM_EXTRA_HW_DEVICES = rv cris cris_900000xx
@SIM_ENABLE_ARCH_cris_TRUE@cris_rvdummy_SOURCES = cris/rvdummy.c
@SIM_ENABLE_ARCH_cris_TRUE@cris_rvdummy_LDADD = $(LIBIBERTY_LIB)
@SIM_ENABLE_ARCH_cris_TRUE@cris_BUILD_OUTPUTS = \
@SIM_ENABLE_ARCH_cris_TRUE@	cris/engv10.h \
@SIM_ENABLE_ARCH_cris_TRUE@	cris/mloopv10f.c \
@SIM_ENABLE_ARCH_cris_TRUE@	cris/stamp-mloop-v10f \
@SIM_ENABLE_ARCH_cris_TRUE@	cris/engv32.h \
@SIM_ENABLE_ARCH_cris_TRUE@	cris/mloopv32f.c \
@SIM_ENABLE_ARCH_cris_TRUE@	cris/stamp-mloop-v32f

@SIM_ENABLE_ARCH_d10v_TRUE@d10v_run_SOURCES = 
@SIM_ENABLE_ARCH_d10v_TRUE@d10v_run_LDADD = \
@SIM_ENABLE_ARCH_d10v_TRUE@	d10v/nrun.o \
@SIM_ENABLE_ARCH_d10v_TRUE@	d10v/libsim.a \
@SIM_ENABLE_ARCH_d10v_TRUE@	$(SIM_COMMON_LIBS)

@SIM_ENABLE_ARCH_d10v_TRUE@d10v_BUILD_OUTPUTS = \
@SIM_ENABLE_ARCH_d10v_TRUE@	d10v/gencode$(EXEEXT) \
@SIM_ENABLE_ARCH_d10v_TRUE@	d10v/simops.h \
@SIM_ENABLE_ARCH_d10v_TRUE@	d10v/table.c

@SIM_ENABLE_ARCH_d10v_TRUE@d10v_gencode_SOURCES = d10v/gencode.c
@SIM_ENABLE_ARCH_d10v_TRUE@d10v_gencode_LDADD = d10v/d10v-opc.o
@SIM_ENABLE_ARCH_erc32_TRUE@erc32_run_SOURCES = 
@SIM_ENABLE_ARCH_erc32_TRUE@erc32_run_LDADD = \
@SIM_ENABLE_ARCH_erc32_TRUE@	erc32/sis.o \
@SIM_ENABLE_ARCH_erc32_TRUE@	erc32/libsim.a \
@SIM_ENABLE_ARCH_erc32_TRUE@	$(SIM_COMMON_LIBS) $(READLINE_LIB) $(TERMCAP_LIB)

@SIM_ENABLE_ARCH_erc32_TRUE@erc32docdir = $(docdir)/erc32
@SIM_ENABLE_ARCH_erc32_TRUE@erc32doc_DATA = erc32/README.erc32 erc32/README.gdb erc32/README.sis
@SIM_ENABLE_ARCH_examples_TRUE@example_synacor_run_SOURCES = 
@SIM_ENABLE_ARCH_examples_TRUE@example_synacor_run_LDADD = \
@SIM_ENABLE_ARCH_examples_TRUE@	example-synacor/nrun.o \
@SIM_ENABLE_ARCH_examples_TRUE@	example-synacor/libsim.a \
@SIM_ENABLE_ARCH_examples_TRUE@	$(SIM_COMMON_LIBS)

@SIM_ENABLE_ARCH_frv_TRUE@frv_run_SOURCES = 
@SIM_ENABLE_ARCH_frv_TRUE@frv_run_LDADD = \
@SIM_ENABLE_ARCH_frv_TRUE@	frv/nrun.o \
@SIM_ENABLE_ARCH_frv_TRUE@	frv/libsim.a \
@SIM_ENABLE_ARCH_frv_TRUE@	$(SIM_COMMON_LIBS)

@SIM_ENABLE_ARCH_frv_TRUE@frvdocdir = $(docdir)/frv
@SIM_ENABLE_ARCH_frv_TRUE@frvdoc_DATA = frv/README
@SIM_ENABLE_ARCH_frv_TRUE@frv_BUILD_OUTPUTS = \
@SIM_ENABLE_ARCH_frv_TRUE@	frv/eng.h \
@SIM_ENABLE_ARCH_frv_TRUE@	frv/mloop.c \
@SIM_ENABLE_ARCH_frv_TRUE@	frv/stamp-mloop

@SIM_ENABLE_ARCH_ft32_TRUE@ft32_run_SOURCES = 
@SIM_ENABLE_ARCH_ft32_TRUE@ft32_run_LDADD = \
@SIM_ENABLE_ARCH_ft32_TRUE@	ft32/nrun.o \
@SIM_ENABLE_ARCH_ft32_TRUE@	ft32/libsim.a \
@SIM_ENABLE_ARCH_ft32_TRUE@	$(SIM_COMMON_LIBS)

@SIM_ENABLE_ARCH_h8300_TRUE@h8300_run_SOURCES = 
@SIM_ENABLE_ARCH_h8300_TRUE@h8300_run_LDADD = \
@SIM_ENABLE_ARCH_h8300_TRUE@	h8300/nrun.o \
@SIM_ENABLE_ARCH_h8300_TRUE@	h8300/libsim.a \
@SIM_ENABLE_ARCH_h8300_TRUE@	$(SIM_COMMON_LIBS)

@SIM_ENABLE_ARCH_iq2000_TRUE@iq2000_run_SOURCES = 
@SIM_ENABLE_ARCH_iq2000_TRUE@iq2000_run_LDADD = \
@SIM_ENABLE_ARCH_iq2000_TRUE@	iq2000/nrun.o \
@SIM_ENABLE_ARCH_iq2000_TRUE@	iq2000/libsim.a \
@SIM_ENABLE_ARCH_iq2000_TRUE@	$(SIM_COMMON_LIBS)

@SIM_ENABLE_ARCH_iq2000_TRUE@iq2000_BUILD_OUTPUTS = \
@SIM_ENABLE_ARCH_iq2000_TRUE@	iq2000/eng.h \
@SIM_ENABLE_ARCH_iq2000_TRUE@	iq2000/mloop.c \
@SIM_ENABLE_ARCH_iq2000_TRUE@	iq2000/stamp-mloop

@SIM_ENABLE_ARCH_lm32_TRUE@lm32_run_SOURCES = 
@SIM_ENABLE_ARCH_lm32_TRUE@lm32_run_LDADD = \
@SIM_ENABLE_ARCH_lm32_TRUE@	lm32/nrun.o \
@SIM_ENABLE_ARCH_lm32_TRUE@	lm32/libsim.a \
@SIM_ENABLE_ARCH_lm32_TRUE@	$(SIM_COMMON_LIBS)

@SIM_ENABLE_ARCH_lm32_TRUE@lm32_SIM_EXTRA_HW_DEVICES = lm32cpu lm32timer lm32uart
@SIM_ENABLE_ARCH_lm32_TRUE@lm32_BUILD_OUTPUTS = \
@SIM_ENABLE_ARCH_lm32_TRUE@	lm32/eng.h \
@SIM_ENABLE_ARCH_lm32_TRUE@	lm32/mloop.c \
@SIM_ENABLE_ARCH_lm32_TRUE@	lm32/stamp-mloop

@SIM_ENABLE_ARCH_m32c_TRUE@m32c_run_SOURCES = 
@SIM_ENABLE_ARCH_m32c_TRUE@m32c_run_LDADD = \
@SIM_ENABLE_ARCH_m32c_TRUE@	m32c/main.o \
@SIM_ENABLE_ARCH_m32c_TRUE@	m32c/libsim.a \
@SIM_ENABLE_ARCH_m32c_TRUE@	$(SIM_COMMON_LIBS)

@SIM_ENABLE_ARCH_m32c_TRUE@m32c_BUILD_OUTPUTS = \
@SIM_ENABLE_ARCH_m32c_TRUE@	m32c/opc2c$(EXEEXT) \
@SIM_ENABLE_ARCH_m32c_TRUE@	m32c/m32c.c \
@SIM_ENABLE_ARCH_m32c_TRUE@	m32c/r8c.c

@SIM_ENABLE_ARCH_m32c_TRUE@m32c_opc2c_SOURCES = m32c/opc2c.c

# opc2c leaks memory, and therefore makes AddressSanitizer unhappy.  Disable
# leak detection while running it.
@SIM_ENABLE_ARCH_m32c_TRUE@m32c_OPC2C_RUN = ASAN_OPTIONS=detect_leaks=0 m32c/opc2c$(EXEEXT)
@SIM_ENABLE_ARCH_m32r_TRUE@m32r_run_SOURCES = 
@SIM_ENABLE_ARCH_m32r_TRUE@m32r_run_LDADD = \
@SIM_ENABLE_ARCH_m32r_TRUE@	m32r/nrun.o \
@SIM_ENABLE_ARCH_m32r_TRUE@	m32r/libsim.a \
@SIM_ENABLE_ARCH_m32r_TRUE@	$(SIM_COMMON_LIBS)

@SIM_ENABLE_ARCH_m32r_TRUE@m32r_SIM_EXTRA_HW_DEVICES = m32r_cache m32r_uart
@SIM_ENABLE_ARCH_m32r_TRUE@m32r_BUILD_OUTPUTS = \
@SIM_ENABLE_ARCH_m32r_TRUE@	m32r/eng.h \
@SIM_ENABLE_ARCH_m32r_TRUE@	m32r/mloop.c \
@SIM_ENABLE_ARCH_m32r_TRUE@	m32r/stamp-mloop \
@SIM_ENABLE_ARCH_m32r_TRUE@	m32r/engx.h \
@SIM_ENABLE_ARCH_m32r_TRUE@	m32r/mloopx.c \
@SIM_ENABLE_ARCH_m32r_TRUE@	m32r/stamp-mloop-x \
@SIM_ENABLE_ARCH_m32r_TRUE@	m32r/eng2.h \
@SIM_ENABLE_ARCH_m32r_TRUE@	m32r/mloop2.c \
@SIM_ENABLE_ARCH_m32r_TRUE@	m32r/stamp-mloop-2

@SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11_run_SOURCES = 
@SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11_run_LDADD = \
@SIM_ENABLE_ARCH_m68hc11_TRUE@	m68hc11/nrun.o \
@SIM_ENABLE_ARCH_m68hc11_TRUE@	m68hc11/libsim.a \
@SIM_ENABLE_ARCH_m68hc11_TRUE@	$(SIM_COMMON_LIBS)

@SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11_SIM_EXTRA_HW_DEVICES = m68hc11 m68hc11sio m68hc11eepr m68hc11tim m68hc11spi nvram
@SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11_BUILD_OUTPUTS = \
@SIM_ENABLE_ARCH_m68hc11_TRUE@	m68hc11/gencode$(EXEEXT) \
@SIM_ENABLE_ARCH_m68hc11_TRUE@	m68hc11/m68hc11int.c \
@SIM_ENABLE_ARCH_m68hc11_TRUE@	m68hc11/m68hc12int.c

@SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11_gencode_SOURCES = m68hc11/gencode.c
@SIM_ENABLE_ARCH_mcore_TRUE@mcore_run_SOURCES = 
@SIM_ENABLE_ARCH_mcore_TRUE@mcore_run_LDADD = \
@SIM_ENABLE_ARCH_mcore_TRUE@	mcore/nrun.o \
@SIM_ENABLE_ARCH_mcore_TRUE@	mcore/libsim.a \
@SIM_ENABLE_ARCH_mcore_TRUE@	$(SIM_COMMON_LIBS)

@SIM_ENABLE_ARCH_microblaze_TRUE@microblaze_run_SOURCES = 
@SIM_ENABLE_ARCH_microblaze_TRUE@microblaze_run_LDADD = \
@SIM_ENABLE_ARCH_microblaze_TRUE@	microblaze/nrun.o \
@SIM_ENABLE_ARCH_microblaze_TRUE@	microblaze/libsim.a \
@SIM_ENABLE_ARCH_microblaze_TRUE@	$(SIM_COMMON_LIBS)

@SIM_ENABLE_ARCH_mips_TRUE@mips_run_SOURCES = 
@SIM_ENABLE_ARCH_mips_TRUE@mips_run_LDADD = \
@SIM_ENABLE_ARCH_mips_TRUE@	mips/nrun.o \
@SIM_ENABLE_ARCH_mips_TRUE@	mips/libsim.a \
@SIM_ENABLE_ARCH_mips_TRUE@	$(SIM_COMMON_LIBS)

@SIM_ENABLE_ARCH_mips_TRUE@mips_SIM_EXTRA_HW_DEVICES = tx3904cpu tx3904irc tx3904tmr tx3904sio
@SIM_ENABLE_ARCH_mips_TRUE@mips_BUILT_SRC_FROM_IGEN_ITABLE = \
@SIM_ENABLE_ARCH_mips_TRUE@	mips/itable.h \
@SIM_ENABLE_ARCH_mips_TRUE@	mips/itable.c

@SIM_ENABLE_ARCH_mips_TRUE@mips_BUILT_SRC_FROM_GEN_MODE_SINGLE = \
@SIM_ENABLE_ARCH_mips_TRUE@	mips/icache.h \
@SIM_ENABLE_ARCH_mips_TRUE@	mips/icache.c \
@SIM_ENABLE_ARCH_mips_TRUE@	mips/idecode.h \
@SIM_ENABLE_ARCH_mips_TRUE@	mips/idecode.c \
@SIM_ENABLE_ARCH_mips_TRUE@	mips/semantics.h \
@SIM_ENABLE_ARCH_mips_TRUE@	mips/semantics.c \
@SIM_ENABLE_ARCH_mips_TRUE@	mips/model.h \
@SIM_ENABLE_ARCH_mips_TRUE@	mips/model.c \
@SIM_ENABLE_ARCH_mips_TRUE@	mips/support.h \
@SIM_ENABLE_ARCH_mips_TRUE@	mips/support.c \
@SIM_ENABLE_ARCH_mips_TRUE@	mips/engine.h \
@SIM_ENABLE_ARCH_mips_TRUE@	mips/engine.c \
@SIM_ENABLE_ARCH_mips_TRUE@	mips/irun.c

@SIM_ENABLE_ARCH_mips_TRUE@mips_BUILT_SRC_FROM_GEN_MODE_M16_M16 = \
@SIM_ENABLE_ARCH_mips_TRUE@	mips/m16_icache.h \
@SIM_ENABLE_ARCH_mips_TRUE@	mips/m16_icache.c \
@SIM_ENABLE_ARCH_mips_TRUE@	mips/m16_idecode.h \
@SIM_ENABLE_ARCH_mips_TRUE@	mips/m16_idecode.c \
@SIM_ENABLE_ARCH_mips_TRUE@	mips/m16_semantics.h \
@SIM_ENABLE_ARCH_mips_TRUE@	mips/m16_semantics.c \
@SIM_ENABLE_ARCH_mips_TRUE@	mips/m16_model.h \
@SIM_ENABLE_ARCH_mips_TRUE@	mips/m16_model.c \
@SIM_ENABLE_ARCH_mips_TRUE@	mips/m16_support.h \
@SIM_ENABLE_ARCH_mips_TRUE@	mips/m16_support.c \
@SIM_ENABLE_ARCH_mips_TRUE@mips_BUILT_SRC_FROM_GEN_MODE_M16_M32 = \
@SIM_ENABLE_ARCH_mips_TRUE@	mips/m32_icache.h \
@SIM_ENABLE_ARCH_mips_TRUE@	mips/m32_icache.c \
@SIM_ENABLE_ARCH_mips_TRUE@	mips/m32_idecode.h \
@SIM_ENABLE_ARCH_mips_TRUE@	mips/m32_idecode.c \
@SIM_ENABLE_ARCH_mips_TRUE@	mips/m32_semantics.h \
@SIM_ENABLE_ARCH_mips_TRUE@	mips/m32_semantics.c \
@SIM_ENABLE_ARCH_mips_TRUE@	mips/m32_model.h \
@SIM_ENABLE_ARCH_mips_TRUE@	mips/m32_model.c \
@SIM_ENABLE_ARCH_mips_TRUE@	mips/m32_support.h \
@SIM_ENABLE_ARCH_mips_TRUE@	mips/m32_support.c

@SIM_ENABLE_ARCH_mips_TRUE@mips_BUILD_OUTPUTS =  \
@SIM_ENABLE_ARCH_mips_TRUE@	$(mips_BUILT_SRC_FROM_IGEN_ITABLE) \
@SIM_ENABLE_ARCH_mips_TRUE@	mips/stamp-igen-itable \
@SIM_ENABLE_ARCH_mips_TRUE@	$(am__append_62) $(am__append_63) \
@SIM_ENABLE_ARCH_mips_TRUE@	$(am__append_64)
@SIM_ENABLE_ARCH_mips_TRUE@mips_IGEN_TRACE = # -G omit-line-numbers # -G trace-rule-selection -G trace-rule-rejection -G trace-entries # -G trace-all
@SIM_ENABLE_ARCH_mips_TRUE@mips_IGEN_INSN = $(srcdir)/mips/mips.igen
@SIM_ENABLE_ARCH_mips_TRUE@mips_IGEN_INSN_INC = \
@SIM_ENABLE_ARCH_mips_TRUE@	mips/dsp.igen \
@SIM_ENABLE_ARCH_mips_TRUE@	mips/dsp2.igen \
@SIM_ENABLE_ARCH_mips_TRUE@	mips/m16.igen \
@SIM_ENABLE_ARCH_mips_TRUE@	mips/m16e.igen \
@SIM_ENABLE_ARCH_mips_TRUE@	mips/mdmx.igen \
@SIM_ENABLE_ARCH_mips_TRUE@	mips/micromipsdsp.igen \
@SIM_ENABLE_ARCH_mips_TRUE@	mips/micromips.igen \
@SIM_ENABLE_ARCH_mips_TRUE@	mips/mips3264r2.igen \
@SIM_ENABLE_ARCH_mips_TRUE@	mips/mips3264r6.igen \
@SIM_ENABLE_ARCH_mips_TRUE@	mips/mips3d.igen \
@SIM_ENABLE_ARCH_mips_TRUE@	mips/sb1.igen \
@SIM_ENABLE_ARCH_mips_TRUE@	mips/tx.igen \
@SIM_ENABLE_ARCH_mips_TRUE@	mips/vr.igen

@SIM_ENABLE_ARCH_mips_TRUE@mips_IGEN_DC = $(srcdir)/mips/mips.dc
@SIM_ENABLE_ARCH_mips_TRUE@mips_M16_DC = $(srcdir)/mips/m16.dc
@SIM_ENABLE_ARCH_mips_TRUE@mips_MICROMIPS32_DC = $(srcdir)/mips/micromips.dc
@SIM_ENABLE_ARCH_mips_TRUE@mips_MICROMIPS16_DC = $(srcdir)/mips/micromips16.dc
@SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_run_SOURCES = 
@SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_run_LDADD = \
@SIM_ENABLE_ARCH_mn10300_TRUE@	mn10300/nrun.o \
@SIM_ENABLE_ARCH_mn10300_TRUE@	mn10300/libsim.a \
@SIM_ENABLE_ARCH_mn10300_TRUE@	$(SIM_COMMON_LIBS)

@SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_SIM_EXTRA_HW_DEVICES = mn103cpu mn103int mn103tim mn103ser mn103iop
@SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_BUILT_SRC_FROM_IGEN = \
@SIM_ENABLE_ARCH_mn10300_TRUE@	mn10300/icache.h \
@SIM_ENABLE_ARCH_mn10300_TRUE@	mn10300/icache.c \
@SIM_ENABLE_ARCH_mn10300_TRUE@	mn10300/idecode.h \
@SIM_ENABLE_ARCH_mn10300_TRUE@	mn10300/idecode.c \
@SIM_ENABLE_ARCH_mn10300_TRUE@	mn10300/semantics.h \
@SIM_ENABLE_ARCH_mn10300_TRUE@	mn10300/semantics.c \
@SIM_ENABLE_ARCH_mn10300_TRUE@	mn10300/model.h \
@SIM_ENABLE_ARCH_mn10300_TRUE@	mn10300/model.c \
@SIM_ENABLE_ARCH_mn10300_TRUE@	mn10300/support.h \
@SIM_ENABLE_ARCH_mn10300_TRUE@	mn10300/support.c \
@SIM_ENABLE_ARCH_mn10300_TRUE@	mn10300/itable.h \
@SIM_ENABLE_ARCH_mn10300_TRUE@	mn10300/itable.c \
@SIM_ENABLE_ARCH_mn10300_TRUE@	mn10300/engine.h \
@SIM_ENABLE_ARCH_mn10300_TRUE@	mn10300/engine.c \
@SIM_ENABLE_ARCH_mn10300_TRUE@	mn10300/irun.c

@SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_BUILD_OUTPUTS = \
@SIM_ENABLE_ARCH_mn10300_TRUE@	$(mn10300_BUILT_SRC_FROM_IGEN) \
@SIM_ENABLE_ARCH_mn10300_TRUE@	mn10300/stamp-igen

@SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_IGEN_TRACE = # -G omit-line-numbers # -G trace-rule-selection -G trace-rule-rejection -G trace-entries
@SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_IGEN_INSN = $(srcdir)/mn10300/mn10300.igen
@SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_IGEN_INSN_INC = mn10300/am33.igen mn10300/am33-2.igen
@SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_IGEN_DC = $(srcdir)/mn10300/mn10300.dc
@SIM_ENABLE_ARCH_moxie_TRUE@moxie_run_SOURCES = 
@SIM_ENABLE_ARCH_moxie_TRUE@moxie_run_LDADD = \
@SIM_ENABLE_ARCH_moxie_TRUE@	moxie/nrun.o \
@SIM_ENABLE_ARCH_moxie_TRUE@	moxie/libsim.a \
@SIM_ENABLE_ARCH_moxie_TRUE@	$(SIM_COMMON_LIBS)

@SIM_ENABLE_ARCH_moxie_TRUE@dtbdir = $(datadir)/gdb/dtb
@SIM_ENABLE_ARCH_moxie_TRUE@dtb_DATA = moxie/moxie-gdb.dtb
@SIM_ENABLE_ARCH_msp430_TRUE@msp430_run_SOURCES = 
@SIM_ENABLE_ARCH_msp430_TRUE@msp430_run_LDADD = \
@SIM_ENABLE_ARCH_msp430_TRUE@	msp430/nrun.o \
@SIM_ENABLE_ARCH_msp430_TRUE@	msp430/libsim.a \
@SIM_ENABLE_ARCH_msp430_TRUE@	$(SIM_COMMON_LIBS)

@SIM_ENABLE_ARCH_or1k_TRUE@or1k_run_SOURCES = 
@SIM_ENABLE_ARCH_or1k_TRUE@or1k_run_LDADD = \
@SIM_ENABLE_ARCH_or1k_TRUE@	or1k/nrun.o \
@SIM_ENABLE_ARCH_or1k_TRUE@	or1k/libsim.a \
@SIM_ENABLE_ARCH_or1k_TRUE@	$(SIM_COMMON_LIBS)

@SIM_ENABLE_ARCH_or1k_TRUE@or1kdocdir = $(docdir)/or1k
@SIM_ENABLE_ARCH_or1k_TRUE@or1kdoc_DATA = or1k/README
@SIM_ENABLE_ARCH_or1k_TRUE@or1k_BUILD_OUTPUTS = \
@SIM_ENABLE_ARCH_or1k_TRUE@	or1k/eng.h \
@SIM_ENABLE_ARCH_or1k_TRUE@	or1k/mloop.c \
@SIM_ENABLE_ARCH_or1k_TRUE@	or1k/stamp-mloop

@SIM_ENABLE_ARCH_ppc_TRUE@ppc_run_SOURCES = 
@SIM_ENABLE_ARCH_ppc_TRUE@ppc_run_LDADD = \
@SIM_ENABLE_ARCH_ppc_TRUE@	ppc/main.o \
@SIM_ENABLE_ARCH_ppc_TRUE@	ppc/libsim.a \
@SIM_ENABLE_ARCH_ppc_TRUE@	$(SIM_COMMON_LIBS)

@SIM_ENABLE_ARCH_ppc_TRUE@ppcdocdir = $(docdir)/ppc
@SIM_ENABLE_ARCH_ppc_TRUE@ppcdoc_DATA = ppc/BUGS ppc/INSTALL ppc/README ppc/RUN
@SIM_ENABLE_ARCH_pru_TRUE@pru_run_SOURCES = 
@SIM_ENABLE_ARCH_pru_TRUE@pru_run_LDADD = \
@SIM_ENABLE_ARCH_pru_TRUE@	pru/nrun.o \
@SIM_ENABLE_ARCH_pru_TRUE@	pru/libsim.a \
@SIM_ENABLE_ARCH_pru_TRUE@	$(SIM_COMMON_LIBS)

@SIM_ENABLE_ARCH_riscv_TRUE@riscv_run_SOURCES = 
@SIM_ENABLE_ARCH_riscv_TRUE@riscv_run_LDADD = \
@SIM_ENABLE_ARCH_riscv_TRUE@	riscv/nrun.o \
@SIM_ENABLE_ARCH_riscv_TRUE@	riscv/libsim.a \
@SIM_ENABLE_ARCH_riscv_TRUE@	$(SIM_COMMON_LIBS)

@SIM_ENABLE_ARCH_rl78_TRUE@rl78_run_SOURCES = 
@SIM_ENABLE_ARCH_rl78_TRUE@rl78_run_LDADD = \
@SIM_ENABLE_ARCH_rl78_TRUE@	rl78/main.o \
@SIM_ENABLE_ARCH_rl78_TRUE@	rl78/libsim.a \
@SIM_ENABLE_ARCH_rl78_TRUE@	$(SIM_COMMON_LIBS)

@SIM_ENABLE_ARCH_rx_TRUE@rx_run_SOURCES = 
@SIM_ENABLE_ARCH_rx_TRUE@rx_run_LDADD = \
@SIM_ENABLE_ARCH_rx_TRUE@	rx/main.o \
@SIM_ENABLE_ARCH_rx_TRUE@	rx/libsim.a \
@SIM_ENABLE_ARCH_rx_TRUE@	$(SIM_COMMON_LIBS)

@SIM_ENABLE_ARCH_rx_TRUE@rxdocdir = $(docdir)/rx
@SIM_ENABLE_ARCH_rx_TRUE@rxdoc_DATA = rx/README.txt
@SIM_ENABLE_ARCH_sh_TRUE@sh_run_SOURCES = 
@SIM_ENABLE_ARCH_sh_TRUE@sh_run_LDADD = \
@SIM_ENABLE_ARCH_sh_TRUE@	sh/nrun.o \
@SIM_ENABLE_ARCH_sh_TRUE@	sh/libsim.a \
@SIM_ENABLE_ARCH_sh_TRUE@	$(SIM_COMMON_LIBS)

@SIM_ENABLE_ARCH_sh_TRUE@sh_BUILD_OUTPUTS = \
@SIM_ENABLE_ARCH_sh_TRUE@	sh/gencode$(EXEEXT) \
@SIM_ENABLE_ARCH_sh_TRUE@	sh/code.c \
@SIM_ENABLE_ARCH_sh_TRUE@	sh/ppi.c \
@SIM_ENABLE_ARCH_sh_TRUE@	sh/table.c

@SIM_ENABLE_ARCH_sh_TRUE@sh_gencode_SOURCES = sh/gencode.c
@SIM_ENABLE_ARCH_v850_TRUE@v850_run_SOURCES = 
@SIM_ENABLE_ARCH_v850_TRUE@v850_run_LDADD = \
@SIM_ENABLE_ARCH_v850_TRUE@	v850/nrun.o \
@SIM_ENABLE_ARCH_v850_TRUE@	v850/libsim.a \
@SIM_ENABLE_ARCH_v850_TRUE@	$(SIM_COMMON_LIBS)

@SIM_ENABLE_ARCH_v850_TRUE@v850_BUILT_SRC_FROM_IGEN = \
@SIM_ENABLE_ARCH_v850_TRUE@	v850/icache.h \
@SIM_ENABLE_ARCH_v850_TRUE@	v850/icache.c \
@SIM_ENABLE_ARCH_v850_TRUE@	v850/idecode.h \
@SIM_ENABLE_ARCH_v850_TRUE@	v850/idecode.c \
@SIM_ENABLE_ARCH_v850_TRUE@	v850/semantics.h \
@SIM_ENABLE_ARCH_v850_TRUE@	v850/semantics.c \
@SIM_ENABLE_ARCH_v850_TRUE@	v850/model.h \
@SIM_ENABLE_ARCH_v850_TRUE@	v850/model.c \
@SIM_ENABLE_ARCH_v850_TRUE@	v850/support.h \
@SIM_ENABLE_ARCH_v850_TRUE@	v850/support.c \
@SIM_ENABLE_ARCH_v850_TRUE@	v850/itable.h \
@SIM_ENABLE_ARCH_v850_TRUE@	v850/itable.c \
@SIM_ENABLE_ARCH_v850_TRUE@	v850/engine.h \
@SIM_ENABLE_ARCH_v850_TRUE@	v850/engine.c \
@SIM_ENABLE_ARCH_v850_TRUE@	v850/irun.c

@SIM_ENABLE_ARCH_v850_TRUE@v850_BUILD_OUTPUTS = \
@SIM_ENABLE_ARCH_v850_TRUE@	$(v850_BUILT_SRC_FROM_IGEN) \
@SIM_ENABLE_ARCH_v850_TRUE@	v850/stamp-igen

@SIM_ENABLE_ARCH_v850_TRUE@v850_IGEN_TRACE = # -G omit-line-numbers # -G trace-rule-selection -G trace-rule-rejection -G trace-entries
@SIM_ENABLE_ARCH_v850_TRUE@v850_IGEN_INSN = $(srcdir)/v850/v850.igen
@SIM_ENABLE_ARCH_v850_TRUE@v850_IGEN_DC = $(srcdir)/v850/v850.dc
all: config.h
	$(MAKE) $(AM_MAKEFLAGS) all-recursive

.SUFFIXES:
.SUFFIXES: .c .lo .log .o .obj .test .test$(EXEEXT) .trs
am--refresh: Makefile
	@:
$(srcdir)/Makefile.in: @MAINTAINER_MODE_TRUE@ $(srcdir)/Makefile.am $(srcdir)/common/local.mk $(srcdir)/igen/local.mk $(srcdir)/testsuite/local.mk $(srcdir)/testsuite/common/local.mk $(srcdir)/aarch64/local.mk $(srcdir)/arm/local.mk $(srcdir)/avr/local.mk $(srcdir)/bfin/local.mk $(srcdir)/bpf/local.mk $(srcdir)/cr16/local.mk $(srcdir)/cris/local.mk $(srcdir)/d10v/local.mk $(srcdir)/erc32/local.mk $(srcdir)/example-synacor/local.mk $(srcdir)/frv/local.mk $(srcdir)/ft32/local.mk $(srcdir)/h8300/local.mk $(srcdir)/iq2000/local.mk $(srcdir)/lm32/local.mk $(srcdir)/m32c/local.mk $(srcdir)/m32r/local.mk $(srcdir)/m68hc11/local.mk $(srcdir)/mcore/local.mk $(srcdir)/microblaze/local.mk $(srcdir)/mips/local.mk $(srcdir)/mn10300/local.mk $(srcdir)/moxie/local.mk $(srcdir)/msp430/local.mk $(srcdir)/or1k/local.mk $(srcdir)/ppc/local.mk $(srcdir)/pru/local.mk $(srcdir)/riscv/local.mk $(srcdir)/rl78/local.mk $(srcdir)/rx/local.mk $(srcdir)/sh/local.mk $(srcdir)/v850/local.mk $(am__configure_deps)
	@for dep in $?; do \
	  case '$(am__configure_deps)' in \
	    *$$dep*) \
	      echo ' cd $(srcdir) && $(AUTOMAKE) --foreign'; \
	      $(am__cd) $(srcdir) && $(AUTOMAKE) --foreign \
		&& exit 0; \
	      exit 1;; \
	  esac; \
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	echo ' cd $(top_srcdir) && $(AUTOMAKE) --foreign Makefile'; \
	$(am__cd) $(top_srcdir) && \
	  $(AUTOMAKE) --foreign Makefile
Makefile: $(srcdir)/Makefile.in $(top_builddir)/config.status
	@case '$?' in \
	  *config.status*) \
	    echo ' $(SHELL) ./config.status'; \
	    $(SHELL) ./config.status;; \
	  *) \
	    echo ' cd $(top_builddir) && $(SHELL) ./config.status $@ $(am__depfiles_maybe)'; \
	    cd $(top_builddir) && $(SHELL) ./config.status $@ $(am__depfiles_maybe);; \
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$(srcdir)/common/local.mk $(srcdir)/igen/local.mk $(srcdir)/testsuite/local.mk $(srcdir)/testsuite/common/local.mk $(srcdir)/aarch64/local.mk $(srcdir)/arm/local.mk $(srcdir)/avr/local.mk $(srcdir)/bfin/local.mk $(srcdir)/bpf/local.mk $(srcdir)/cr16/local.mk $(srcdir)/cris/local.mk $(srcdir)/d10v/local.mk $(srcdir)/erc32/local.mk $(srcdir)/example-synacor/local.mk $(srcdir)/frv/local.mk $(srcdir)/ft32/local.mk $(srcdir)/h8300/local.mk $(srcdir)/iq2000/local.mk $(srcdir)/lm32/local.mk $(srcdir)/m32c/local.mk $(srcdir)/m32r/local.mk $(srcdir)/m68hc11/local.mk $(srcdir)/mcore/local.mk $(srcdir)/microblaze/local.mk $(srcdir)/mips/local.mk $(srcdir)/mn10300/local.mk $(srcdir)/moxie/local.mk $(srcdir)/msp430/local.mk $(srcdir)/or1k/local.mk $(srcdir)/ppc/local.mk $(srcdir)/pru/local.mk $(srcdir)/riscv/local.mk $(srcdir)/rl78/local.mk $(srcdir)/rx/local.mk $(srcdir)/sh/local.mk $(srcdir)/v850/local.mk $(am__empty):

$(top_builddir)/config.status: $(top_srcdir)/configure $(CONFIG_STATUS_DEPENDENCIES)
	$(SHELL) ./config.status --recheck

$(top_srcdir)/configure: @MAINTAINER_MODE_TRUE@ $(am__configure_deps)
	$(am__cd) $(srcdir) && $(AUTOCONF)
$(ACLOCAL_M4): @MAINTAINER_MODE_TRUE@ $(am__aclocal_m4_deps)
	$(am__cd) $(srcdir) && $(ACLOCAL) $(ACLOCAL_AMFLAGS)
$(am__aclocal_m4_deps):

config.h: stamp-h1
	@test -f $@ || rm -f stamp-h1
	@test -f $@ || $(MAKE) $(AM_MAKEFLAGS) stamp-h1

stamp-h1: $(srcdir)/config.h.in $(top_builddir)/config.status
	@rm -f stamp-h1
	cd $(top_builddir) && $(SHELL) ./config.status config.h
$(srcdir)/config.h.in: @MAINTAINER_MODE_TRUE@ $(am__configure_deps) 
	($(am__cd) $(top_srcdir) && $(AUTOHEADER))
	rm -f stamp-h1
	touch $@

distclean-hdr:
	-rm -f config.h stamp-h1
Make-common.sim: $(top_builddir)/config.status $(top_srcdir)/common/Make-common.in
	cd $(top_builddir) && $(SHELL) ./config.status $@
aarch64/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/aarch64/Makefile.in
	cd $(top_builddir) && $(SHELL) ./config.status $@
aarch64/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
	cd $(top_builddir) && $(SHELL) ./config.status $@
arm/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/arm/Makefile.in
	cd $(top_builddir) && $(SHELL) ./config.status $@
arm/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
	cd $(top_builddir) && $(SHELL) ./config.status $@
avr/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/avr/Makefile.in
	cd $(top_builddir) && $(SHELL) ./config.status $@
avr/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
	cd $(top_builddir) && $(SHELL) ./config.status $@
bfin/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/bfin/Makefile.in
	cd $(top_builddir) && $(SHELL) ./config.status $@
bfin/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
	cd $(top_builddir) && $(SHELL) ./config.status $@
bpf/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/bpf/Makefile.in
	cd $(top_builddir) && $(SHELL) ./config.status $@
bpf/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
	cd $(top_builddir) && $(SHELL) ./config.status $@
cr16/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/cr16/Makefile.in
	cd $(top_builddir) && $(SHELL) ./config.status $@
cr16/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
	cd $(top_builddir) && $(SHELL) ./config.status $@
cris/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/cris/Makefile.in
	cd $(top_builddir) && $(SHELL) ./config.status $@
cris/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
	cd $(top_builddir) && $(SHELL) ./config.status $@
d10v/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/d10v/Makefile.in
	cd $(top_builddir) && $(SHELL) ./config.status $@
d10v/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
	cd $(top_builddir) && $(SHELL) ./config.status $@
frv/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/frv/Makefile.in
	cd $(top_builddir) && $(SHELL) ./config.status $@
frv/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
	cd $(top_builddir) && $(SHELL) ./config.status $@
ft32/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/ft32/Makefile.in
	cd $(top_builddir) && $(SHELL) ./config.status $@
ft32/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
	cd $(top_builddir) && $(SHELL) ./config.status $@
h8300/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/h8300/Makefile.in
	cd $(top_builddir) && $(SHELL) ./config.status $@
h8300/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
	cd $(top_builddir) && $(SHELL) ./config.status $@
iq2000/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/iq2000/Makefile.in
	cd $(top_builddir) && $(SHELL) ./config.status $@
iq2000/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
	cd $(top_builddir) && $(SHELL) ./config.status $@
lm32/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/lm32/Makefile.in
	cd $(top_builddir) && $(SHELL) ./config.status $@
lm32/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
	cd $(top_builddir) && $(SHELL) ./config.status $@
m32c/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/m32c/Makefile.in
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m32c/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
	cd $(top_builddir) && $(SHELL) ./config.status $@
m32r/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/m32r/Makefile.in
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	-rm -f d10v/$(DEPDIR)/$(am__dirstamp)
	-rm -f d10v/$(am__dirstamp)
	-rm -f erc32/$(DEPDIR)/$(am__dirstamp)
	-rm -f erc32/$(am__dirstamp)
	-rm -f example-synacor/$(am__dirstamp)
	-rm -f frv/$(am__dirstamp)
	-rm -f ft32/$(am__dirstamp)
	-rm -f h8300/$(am__dirstamp)
	-rm -f igen/$(DEPDIR)/$(am__dirstamp)
	-rm -f igen/$(am__dirstamp)
	-rm -f iq2000/$(am__dirstamp)
	-rm -f lm32/$(am__dirstamp)
	-rm -f m32c/$(DEPDIR)/$(am__dirstamp)
	-rm -f m32c/$(am__dirstamp)
	-rm -f m32r/$(am__dirstamp)
	-rm -f m68hc11/$(DEPDIR)/$(am__dirstamp)
	-rm -f m68hc11/$(am__dirstamp)
	-rm -f mcore/$(am__dirstamp)
	-rm -f microblaze/$(am__dirstamp)
	-rm -f mips/$(am__dirstamp)
	-rm -f mn10300/$(am__dirstamp)
	-rm -f moxie/$(am__dirstamp)
	-rm -f msp430/$(am__dirstamp)
	-rm -f or1k/$(am__dirstamp)
	-rm -f ppc/$(DEPDIR)/$(am__dirstamp)
	-rm -f ppc/$(am__dirstamp)
	-rm -f pru/$(am__dirstamp)
	-rm -f riscv/$(am__dirstamp)
	-rm -f rl78/$(am__dirstamp)
	-rm -f rx/$(am__dirstamp)
	-rm -f sh/$(DEPDIR)/$(am__dirstamp)
	-rm -f sh/$(am__dirstamp)
	-rm -f testsuite/common/$(DEPDIR)/$(am__dirstamp)
	-rm -f testsuite/common/$(am__dirstamp)
	-rm -f v850/$(am__dirstamp)
	-test -z "$(DISTCLEANFILES)" || rm -f $(DISTCLEANFILES)

maintainer-clean-generic:
	@echo "This command is intended for maintainers to use"
	@echo "it deletes files that may require special tools to rebuild."
clean: clean-recursive

clean-am: clean-checkPROGRAMS clean-generic clean-libtool \
	clean-noinstLIBRARIES clean-noinstPROGRAMS mostlyclean-am

distclean: distclean-recursive
	-rm -f $(am__CONFIG_DISTCLEAN_FILES)
	-rm -rf common/$(DEPDIR) cr16/$(DEPDIR) cris/$(DEPDIR) d10v/$(DEPDIR) erc32/$(DEPDIR) igen/$(DEPDIR) m32c/$(DEPDIR) m68hc11/$(DEPDIR) ppc/$(DEPDIR) sh/$(DEPDIR) testsuite/common/$(DEPDIR)
	-rm -f Makefile
distclean-am: clean-am distclean-DEJAGNU distclean-compile \
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	distclean-tags

dvi: dvi-recursive

dvi-am:

html: html-recursive

html-am:

info: info-recursive

info-am:

install-data-am: install-armdocDATA install-data-local install-dtbDATA \
	install-erc32docDATA install-frvdocDATA install-or1kdocDATA \
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install-dvi: install-dvi-recursive

install-dvi-am:

install-exec-am: install-exec-local

install-html: install-html-recursive

install-html-am:

install-info: install-info-recursive

install-info-am:

install-man:

install-pdf: install-pdf-recursive

install-pdf-am:

install-ps: install-ps-recursive

install-ps-am:

installcheck-am:

maintainer-clean: maintainer-clean-recursive
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	-rm -f Makefile
maintainer-clean-am: distclean-am maintainer-clean-generic

mostlyclean: mostlyclean-recursive

mostlyclean-am: mostlyclean-compile mostlyclean-generic \
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pdf: pdf-recursive

pdf-am:

ps: ps-recursive

ps-am:

uninstall-am: uninstall-armdocDATA uninstall-dtbDATA \
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.MAKE: $(am__recursive_targets) all check-am install-am install-strip

.PHONY: $(am__recursive_targets) CTAGS GTAGS TAGS all all-am \
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	install-exec-am install-exec-local install-frvdocDATA \
	install-html install-html-am install-info install-info-am \
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	uninstall-rxdocDATA

.PRECIOUS: Makefile

@am__include@ @am__quote@$(GNULIB_PARENT_DIR)/gnulib/Makefile.gnulib.inc@am__quote@

# Generate target constants for newlib/libgloss from its source tree.
# This file is shipped with distributions so we build in the source dir.
# Use `make nltvals' to rebuild.
.PHONY: nltvals
nltvals:
	$(srccom)/gennltvals.py --cpp "$(CPP)"

common/version.c: common/version.c-stamp ; @true
common/version.c-stamp: $(srcroot)/gdb/version.in $(srcroot)/bfd/version.h $(srcdir)/common/create-version.sh
	$(AM_V_GEN)$(SHELL) $(srcdir)/common/create-version.sh $(srcroot)/gdb $@.tmp
	$(AM_V_at)$(SHELL) $(srcroot)/move-if-change $@.tmp $(@:-stamp=)
	$(AM_V_at)touch $@

# FIXME This is one very simple-minded way of generating the file hw-config.h.
%/hw-config.h: %/stamp-hw ; @true
%/stamp-hw: Makefile
	$(AM_V_GEN)set -e; \
	( \
	sim_hw="$(SIM_HW_DEVICES) $($(@D)_SIM_EXTRA_HW_DEVICES)" ; \
	echo "/* generated by Makefile */" ; \
	printf "extern const struct hw_descriptor dv_%s_descriptor[];\n" $$sim_hw ; \
	echo "const struct hw_descriptor * const hw_descriptors[] = {" ; \
	printf "  dv_%s_descriptor,\n" $$sim_hw ; \
	echo "  NULL," ; \
	echo "};" \
	) > $@.tmp; \
	$(SHELL) $(srcroot)/move-if-change $@.tmp $(@D)/hw-config.h; \
	touch $@
.PRECIOUS: %/stamp-hw

# Alias for developers.
@SIM_ENABLE_IGEN_TRUE@igen: $(IGEN)

# These rules are copied from automake, but tweaked to use FOR_BUILD variables.
@SIM_ENABLE_IGEN_TRUE@igen/libigen.a: $(igen_libigen_a_OBJECTS) $(igen_libigen_a_DEPENDENCIES) $(EXTRA_igen_libigen_a_DEPENDENCIES) igen/$(am__dirstamp)
@SIM_ENABLE_IGEN_TRUE@	$(AM_V_at)-rm -f $@
@SIM_ENABLE_IGEN_TRUE@	$(AM_V_AR)$(AR_FOR_BUILD) $(ARFLAGS) $@ $(igen_libigen_a_OBJECTS) $(igen_libigen_a_LIBADD)
@SIM_ENABLE_IGEN_TRUE@	$(AM_V_at)$(RANLIB_FOR_BUILD) $@

@SIM_ENABLE_IGEN_TRUE@igen/igen$(EXEEXT): $(igen_igen_OBJECTS) $(igen_igen_DEPENDENCIES) igen/$(am__dirstamp)
@SIM_ENABLE_IGEN_TRUE@	$(AM_V_CCLD)$(LINK_FOR_BUILD) $(igen_igen_OBJECTS) $(igen_igen_LDADD)

# igen is a build-time only tool.  Override the default rules for it.
@SIM_ENABLE_IGEN_TRUE@igen/%.o: igen/%.c
@SIM_ENABLE_IGEN_TRUE@	$(AM_V_CC)$(COMPILE_FOR_BUILD) -c $< -o $@

# Build some of the files in standalone mode for developers of igen itself.
@SIM_ENABLE_IGEN_TRUE@igen/%-main.o: igen/%.c
@SIM_ENABLE_IGEN_TRUE@	$(AM_V_CC)$(COMPILE_FOR_BUILD) -DMAIN -c $< -o $@

site-sim-config.exp: Makefile
	$(AM_V_GEN)( \
	echo "set SIM_PRIMARY_TARGET \"$(SIM_PRIMARY_TARGET)\""; \
	echo "set builddir \"$(builddir)\""; \
	echo "set srcdir \"$(srcdir)/testsuite\""; \
	$(foreach V,$(SIM_TOOLCHAIN_VARS),echo "set $(V) \"$($(V))\"";) \
	) > $@

# Ignore dirs that only contain configuration settings.
check/./config/%.exp: ; @true
check/config/%.exp: ; @true
check/./lib/%.exp: ; @true
check/lib/%.exp: ; @true

check/%.exp:
	$(AM_V_at)mkdir -p testsuite/$*
	$(AM_V_RUNTEST)$(DO_RUNTEST) --objdir testsuite/$* --outdir testsuite/$* $*.exp

check-DEJAGNU-parallel:
	$(AM_V_at)( \
	set -- `cd $(srcdir)/testsuite && find . -name '*.exp' -printf '%P\n' | sed 's:[.]exp$$::'`; \
	$(MAKE) -k `printf 'check/%s.exp ' $$@`; \
	ret=$$?; \
	set -- `printf 'testsuite/%s/ ' $$@`; \
	$(SHELL) $(srcroot)/contrib/dg-extract-results.sh \
	  `find $$@ -maxdepth 1 -name testrun.sum 2>/dev/null | sort` > testrun.sum; \
	$(SHELL) $(srcroot)/contrib/dg-extract-results.sh -L \
	  `find $$@ -maxdepth 1 -name testrun.log 2>/dev/null | sort` > testrun.log; \
	echo; \
	$(SED) -n '/^.*===.*Summary.*===/,$$p' testrun.sum; \
	exit $$ret)

check-DEJAGNU-single:
	$(AM_V_RUNTEST)$(DO_RUNTEST)

# If running a single job, invoking runtest once is faster & has nicer output.
check-DEJAGNU: site.exp
	$(AM_V_at)(set -e; \
	EXPECT=${EXPECT} ; export EXPECT ; \
	runtest=$(RUNTEST); \
	if $(SHELL) -c "$$runtest --version" > /dev/null 2>&1; then \
	  case "$(MAKEFLAGS)" in \
	  *-j*) $(MAKE) check-DEJAGNU-parallel;; \
	  *)    $(MAKE) check-DEJAGNU-single;; \
	  esac; \
	else \
	  echo "WARNING: could not find \`runtest'" 1>&2; :;\
	fi)

# These tests are build-time only tools.  Override the default rules for them.
testsuite/common/%.o: testsuite/common/%.c
	$(AM_V_CC)$(COMPILE_FOR_BUILD) $(testsuite_common_CPPFLAGS) -c $< -o $@

testsuite/common/alu-tst$(EXEEXT): $(testsuite_common_alu_tst_OBJECTS) $(testsuite_common_alu_tst_DEPENDENCIES) testsuite/common/$(am__dirstamp)
	$(AM_V_CCLD)$(LINK_FOR_BUILD) $(testsuite_common_alu_tst_OBJECTS) $(testsuite_common_alu_tst_LDADD)

testsuite/common/fpu-tst$(EXEEXT): $(testsuite_common_fpu_tst_OBJECTS) $(testsuite_common_fpu_tst_DEPENDENCIES) testsuite/common/$(am__dirstamp)
	$(AM_V_CCLD)$(LINK_FOR_BUILD) $(testsuite_common_fpu_tst_OBJECTS) $(testsuite_common_fpu_tst_LDADD)

testsuite/common/bits-gen$(EXEEXT): $(testsuite_common_bits_gen_OBJECTS) $(testsuite_common_bits_gen_DEPENDENCIES) testsuite/common/$(am__dirstamp)
	$(AM_V_CCLD)$(LINK_FOR_BUILD) $(testsuite_common_bits_gen_OBJECTS) $(testsuite_common_bits_gen_LDADD)

testsuite/common/bits32m0$(EXEEXT): $(testsuite_common_bits32m0_OBJECTS) $(testsuite_common_bits32m0_DEPENDENCIES) testsuite/common/$(am__dirstamp)
	$(AM_V_CCLD)$(LINK_FOR_BUILD) $(testsuite_common_bits32m0_OBJECTS) $(testsuite_common_bits32m0_LDADD)

testsuite/common/bits32m0.c: testsuite/common/bits-gen$(EXEEXT) testsuite/common/bits-tst.c
	$(AM_V_GEN)$< 32 0 big > $@.tmp
	$(AM_V_at)cat $(srcdir)/testsuite/common/bits-tst.c >> $@.tmp
	$(AM_V_at)mv $@.tmp $@

testsuite/common/bits32m31$(EXEEXT): $(testsuite_common_bits32m31_OBJECTS) $(testsuite_common_bits32m31_DEPENDENCIES) testsuite/common/$(am__dirstamp)
	$(AM_V_CCLD)$(LINK_FOR_BUILD) $(testsuite_common_bits32m31_OBJECTS) $(testsuite_common_bits32m31_LDADD)

testsuite/common/bits32m31.c: testsuite/common/bits-gen$(EXEEXT) testsuite/common/bits-tst.c
	$(AM_V_GEN)$< 32 31 little > $@.tmp
	$(AM_V_at)cat $(srcdir)/testsuite/common/bits-tst.c >> $@.tmp
	$(AM_V_at)mv $@.tmp $@

testsuite/common/bits64m0$(EXEEXT): $(testsuite_common_bits64m0_OBJECTS) $(testsuite_common_bits64m0_DEPENDENCIES) testsuite/common/$(am__dirstamp)
	$(AM_V_CCLD)$(LINK_FOR_BUILD) $(testsuite_common_bits64m0_OBJECTS) $(testsuite_common_bits64m0_LDADD)

testsuite/common/bits64m0.c: testsuite/common/bits-gen$(EXEEXT) testsuite/common/bits-tst.c
	$(AM_V_GEN)$< 64 0 big > $@.tmp
	$(AM_V_at)cat $(srcdir)/testsuite/common/bits-tst.c >> $@.tmp
	$(AM_V_at)mv $@.tmp $@

testsuite/common/bits64m63$(EXEEXT): $(testsuite_common_bits64m63_OBJECTS) $(testsuite_common_bits64m63_DEPENDENCIES) testsuite/common/$(am__dirstamp)
	$(AM_V_CCLD)$(LINK_FOR_BUILD) $(testsuite_common_bits64m63_OBJECTS) $(testsuite_common_bits64m63_LDADD)

testsuite/common/bits64m63.c: testsuite/common/bits-gen$(EXEEXT) testsuite/common/bits-tst.c
	$(AM_V_GEN)$< 64 63 little > $@.tmp
	$(AM_V_at)cat $(srcdir)/testsuite/common/bits-tst.c >> $@.tmp
	$(AM_V_at)mv $@.tmp $@

@SIM_ENABLE_ARCH_bfin_TRUE@bfin/linux-fixed-code.h: @MAINT@ $(srcdir)/bfin/linux-fixed-code.s bfin/local.mk bfin/$(am__dirstamp)
@SIM_ENABLE_ARCH_bfin_TRUE@	$(AM_V_GEN)$(AS_FOR_TARGET_BFIN) $(srcdir)/bfin/linux-fixed-code.s -o bfin/linux-fixed-code.o
@SIM_ENABLE_ARCH_bfin_TRUE@	$(AM_V_at)(\
@SIM_ENABLE_ARCH_bfin_TRUE@		set -e; \
@SIM_ENABLE_ARCH_bfin_TRUE@		echo "/* DO NOT EDIT: Autogenerated from linux-fixed-code.s.  */"; \
@SIM_ENABLE_ARCH_bfin_TRUE@		echo "static const unsigned char bfin_linux_fixed_code[] ="; \
@SIM_ENABLE_ARCH_bfin_TRUE@		echo "{"; \
@SIM_ENABLE_ARCH_bfin_TRUE@		$(OBJDUMP_FOR_TARGET_BFIN) -d -z bfin/linux-fixed-code.o > $@.dis; \
@SIM_ENABLE_ARCH_bfin_TRUE@		sed -n \
@SIM_ENABLE_ARCH_bfin_TRUE@			-e 's:^[^	]*	:0x:' \
@SIM_ENABLE_ARCH_bfin_TRUE@			-e '/^0x/{s:	.*::;s: *$$:,:;s: :, 0x:g;p;}' \
@SIM_ENABLE_ARCH_bfin_TRUE@			$@.dis; \
@SIM_ENABLE_ARCH_bfin_TRUE@		rm -f $@.dis; \
@SIM_ENABLE_ARCH_bfin_TRUE@		echo "};" \
@SIM_ENABLE_ARCH_bfin_TRUE@	) > $@.tmp
@SIM_ENABLE_ARCH_bfin_TRUE@	$(AM_V_at)$(SHELL) $(srcroot)/move-if-change $@.tmp $(srcdir)/bfin/linux-fixed-code.h
@SIM_ENABLE_ARCH_bfin_TRUE@	$(AM_V_at)touch $(srcdir)/bfin/linux-fixed-code.h

@SIM_ENABLE_ARCH_bpf_TRUE@bpf/mloop-le.c bpf/eng-le.h: bpf/stamp-mloop-le ; @true
@SIM_ENABLE_ARCH_bpf_TRUE@bpf/stamp-mloop-le: $(srccom)/genmloop.sh bpf/mloop.in
@SIM_ENABLE_ARCH_bpf_TRUE@	$(AM_V_GEN)$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
@SIM_ENABLE_ARCH_bpf_TRUE@		-mono -scache -prefix bpfbf_ebpfle -cpu bpfbf \
@SIM_ENABLE_ARCH_bpf_TRUE@		-infile $(srcdir)/bpf/mloop.in \
@SIM_ENABLE_ARCH_bpf_TRUE@		-outfile-prefix bpf/ -outfile-suffix -le
@SIM_ENABLE_ARCH_bpf_TRUE@	$(AM_V_at)$(SHELL) $(srcroot)/move-if-change bpf/eng-le.hin bpf/eng-le.h
@SIM_ENABLE_ARCH_bpf_TRUE@	$(AM_V_at)$(SHELL) $(srcroot)/move-if-change bpf/mloop-le.cin bpf/mloop-le.c
@SIM_ENABLE_ARCH_bpf_TRUE@	$(AM_V_at)touch $@

@SIM_ENABLE_ARCH_bpf_TRUE@bpf/mloop-be.c bpf/eng-be.h: bpf/stamp-mloop-be ; @true
@SIM_ENABLE_ARCH_bpf_TRUE@bpf/stamp-mloop-be: $(srccom)/genmloop.sh bpf/mloop.in
@SIM_ENABLE_ARCH_bpf_TRUE@	$(AM_V_GEN)$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
@SIM_ENABLE_ARCH_bpf_TRUE@		-mono -scache -prefix bpfbf_ebpfbe -cpu bpfbf \
@SIM_ENABLE_ARCH_bpf_TRUE@		-infile $(srcdir)/bpf/mloop.in \
@SIM_ENABLE_ARCH_bpf_TRUE@		-outfile-prefix bpf/ -outfile-suffix -be
@SIM_ENABLE_ARCH_bpf_TRUE@	$(AM_V_at)$(SHELL) $(srcroot)/move-if-change bpf/eng-be.hin bpf/eng-be.h
@SIM_ENABLE_ARCH_bpf_TRUE@	$(AM_V_at)$(SHELL) $(srcroot)/move-if-change bpf/mloop-be.cin bpf/mloop-be.c
@SIM_ENABLE_ARCH_bpf_TRUE@	$(AM_V_at)touch $@

@SIM_ENABLE_ARCH_bpf_TRUE@bpf/cgen: bpf/cgen-arch bpf/cgen-cpu bpf/cgen-defs-le bpf/cgen-defs-be bpf/cgen-decode-le bpf/cgen-decode-be

@SIM_ENABLE_ARCH_bpf_TRUE@bpf/cgen-arch:
@SIM_ENABLE_ARCH_bpf_TRUE@	$(AM_V_GEN)mach=bpf cpu=bpfbf FLAGS="with-scache"; $(CGEN_GEN_ARCH)
@SIM_ENABLE_ARCH_bpf_TRUE@bpf/arch.h bpf/arch.c bpf/cpuall.h: @CGEN_MAINT@ bpf/cgen-arch

@SIM_ENABLE_ARCH_bpf_TRUE@bpf/cgen-cpu:
@SIM_ENABLE_ARCH_bpf_TRUE@	$(AM_V_GEN)isa=ebpfle,ebpfbe cpu=bpfbf mach=bpf FLAGS="with-multiple-isa with-scache"; $(CGEN_GEN_CPU)
@SIM_ENABLE_ARCH_bpf_TRUE@	$(AM_V_at)rm -f $(srcdir)/bpf/model.c
@SIM_ENABLE_ARCH_bpf_TRUE@bpf/cpu.h bpf/cpu.c bpf/model.c: @CGEN_MAINT@ bpf/cgen-cpu

@SIM_ENABLE_ARCH_bpf_TRUE@bpf/cgen-defs-le:
@SIM_ENABLE_ARCH_bpf_TRUE@	$(AM_V_GEN)isa=ebpfle cpu=bpfbf mach=bpf FLAGS="with-scache" SUFFIX="-le"; $(CGEN_GEN_DEFS)
@SIM_ENABLE_ARCH_bpf_TRUE@bpf/defs-le.h: @CGEN_MAINT@ bpf/cgen-defs-le

@SIM_ENABLE_ARCH_bpf_TRUE@bpf/cgen-defs-be:
@SIM_ENABLE_ARCH_bpf_TRUE@	$(AM_V_GEN)isa=ebpfbe cpu=bpfbf mach=bpf FLAGS="with-scache" SUFFIX="-be"; $(CGEN_GEN_DEFS)
@SIM_ENABLE_ARCH_bpf_TRUE@bpf/defs-be.h: @CGEN_MAINT@ bpf/cgen-defs-be

@SIM_ENABLE_ARCH_bpf_TRUE@bpf/cgen-decode-le:
@SIM_ENABLE_ARCH_bpf_TRUE@	$(AM_V_GEN)isa=ebpfle cpu=bpfbf mach=bpf FLAGS="with-scache" SUFFIX="-le" EXTRAFILES="$(CGEN_CPU_SEM)"; $(CGEN_GEN_DECODE)
@SIM_ENABLE_ARCH_bpf_TRUE@bpf/sem-le.c bpf/decode-le.c bpf/decode-le.h: @CGEN_MAINT@ bpf/cgen-decode-vle

@SIM_ENABLE_ARCH_bpf_TRUE@bpf/cgen-decode-be:
@SIM_ENABLE_ARCH_bpf_TRUE@	$(AM_V_GEN)isa=ebpfbe cpu=bpfbf mach=bpf FLAGS="with-scache" SUFFIX="-be" EXTRAFILES="$(CGEN_CPU_SEM)"; $(CGEN_GEN_DECODE)
@SIM_ENABLE_ARCH_bpf_TRUE@bpf/sem-be.c bpf/decode-be.c bpf/decode-be.h: @CGEN_MAINT@ bpf/cgen-decode-be

# These rules are copied from automake, but tweaked to use FOR_BUILD variables.
@SIM_ENABLE_ARCH_cr16_TRUE@cr16/gencode$(EXEEXT): $(cr16_gencode_OBJECTS) $(cr16_gencode_DEPENDENCIES) cr16/$(am__dirstamp)
@SIM_ENABLE_ARCH_cr16_TRUE@	$(AM_V_CCLD)$(LINK_FOR_BUILD) $(cr16_gencode_OBJECTS) $(cr16_gencode_LDADD)

# gencode is a build-time only tool.  Override the default rules for it.
@SIM_ENABLE_ARCH_cr16_TRUE@cr16/gencode.o: cr16/gencode.c
@SIM_ENABLE_ARCH_cr16_TRUE@	$(AM_V_CC)$(COMPILE_FOR_BUILD) -c $< -o $@
@SIM_ENABLE_ARCH_cr16_TRUE@cr16/cr16-opc.o: ../opcodes/cr16-opc.c
@SIM_ENABLE_ARCH_cr16_TRUE@	$(AM_V_CC)$(COMPILE_FOR_BUILD) -c $< -o $@

@SIM_ENABLE_ARCH_cr16_TRUE@cr16/simops.h: cr16/gencode$(EXEEXT)
@SIM_ENABLE_ARCH_cr16_TRUE@	$(AM_V_GEN)$< -h >$@

@SIM_ENABLE_ARCH_cr16_TRUE@cr16/table.c: cr16/gencode$(EXEEXT)
@SIM_ENABLE_ARCH_cr16_TRUE@	$(AM_V_GEN)$< >$@

@SIM_ENABLE_ARCH_cris_TRUE@cris/mloopv10f.c cris/engv10.h: cris/stamp-mloop-v10f ; @true
@SIM_ENABLE_ARCH_cris_TRUE@cris/stamp-mloop-v10f: $(srccom)/genmloop.sh cris/mloop.in
@SIM_ENABLE_ARCH_cris_TRUE@	$(AM_V_GEN)$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
@SIM_ENABLE_ARCH_cris_TRUE@		-mono -no-fast -pbb -switch semcrisv10f-switch.c \
@SIM_ENABLE_ARCH_cris_TRUE@		-cpu crisv10f \
@SIM_ENABLE_ARCH_cris_TRUE@		-infile $(srcdir)/cris/mloop.in -outfile-prefix cris/ -outfile-suffix -v10f
@SIM_ENABLE_ARCH_cris_TRUE@	$(AM_V_at)$(SHELL) $(srcroot)/move-if-change cris/eng-v10f.hin cris/engv10.h
@SIM_ENABLE_ARCH_cris_TRUE@	$(AM_V_at)$(SHELL) $(srcroot)/move-if-change cris/mloop-v10f.cin cris/mloopv10f.c
@SIM_ENABLE_ARCH_cris_TRUE@	$(AM_V_at)touch $@

@SIM_ENABLE_ARCH_cris_TRUE@cris/mloopv32f.c cris/engv32.h: cris/stamp-mloop-v32f ; @true
@SIM_ENABLE_ARCH_cris_TRUE@cris/stamp-mloop-v32f: $(srccom)/genmloop.sh cris/mloop.in
@SIM_ENABLE_ARCH_cris_TRUE@	$(AM_V_GEN)$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
@SIM_ENABLE_ARCH_cris_TRUE@		-mono -no-fast -pbb -switch semcrisv32f-switch.c \
@SIM_ENABLE_ARCH_cris_TRUE@		-cpu crisv32f \
@SIM_ENABLE_ARCH_cris_TRUE@		-infile $(srcdir)/cris/mloop.in -outfile-prefix cris/ -outfile-suffix -v32f
@SIM_ENABLE_ARCH_cris_TRUE@	$(AM_V_at)$(SHELL) $(srcroot)/move-if-change cris/eng-v32f.hin cris/engv32.h
@SIM_ENABLE_ARCH_cris_TRUE@	$(AM_V_at)$(SHELL) $(srcroot)/move-if-change cris/mloop-v32f.cin cris/mloopv32f.c
@SIM_ENABLE_ARCH_cris_TRUE@	$(AM_V_at)touch $@

@SIM_ENABLE_ARCH_cris_TRUE@cris/cgen: cris/cgen-arch cris/cgen-cpu-decode-v10f cris/cgen-cpu-decode-v32f

@SIM_ENABLE_ARCH_cris_TRUE@cris/cgen-arch:
@SIM_ENABLE_ARCH_cris_TRUE@	$(AM_V_GEN)mach=crisv10,crisv32 FLAGS="with-scache with-profile=fn"; $(CGEN_GEN_ARCH)
@SIM_ENABLE_ARCH_cris_TRUE@cris/arch.h cris/arch.c cris/cpuall.h: @CGEN_MAINT@ cris/cgen-arch

@SIM_ENABLE_ARCH_cris_TRUE@cris/cgen-cpu-decode-v10f:
@SIM_ENABLE_ARCH_cris_TRUE@	$(AM_V_GEN)cpu=crisv10f mach=crisv10 SUFFIX=v10 FLAGS="with-scache with-profile=fn" EXTRAFILES="$(CGEN_CPU_SEMSW)"; $(CGEN_GEN_CPU_DECODE)
@SIM_ENABLE_ARCH_cris_TRUE@	$(AM_V_at)$(SHELL) $(srcroot)/move-if-change $(srcdir)/cris/semv10-switch.c $(srcdir)/cris/semcrisv10f-switch.c
@SIM_ENABLE_ARCH_cris_TRUE@cris/cpuv10.h cris/cpuv10.c cris/semcrisv10f-switch.c cris/modelv10.c cris/decodev10.c cris/decodev10.h: @CGEN_MAINT@ cris/cgen-cpu-decode-v10f

@SIM_ENABLE_ARCH_cris_TRUE@cris/cgen-cpu-decode-v32f:
@SIM_ENABLE_ARCH_cris_TRUE@	$(AM_V_GEN)cpu=crisv32f mach=crisv32 SUFFIX=v32 FLAGS="with-scache with-profile=fn" EXTRAFILES="$(CGEN_CPU_SEMSW)"; $(CGEN_GEN_CPU_DECODE)
@SIM_ENABLE_ARCH_cris_TRUE@	$(AM_V_at)$(SHELL) $(srcroot)/move-if-change $(srcdir)/cris/semv32-switch.c $(srcdir)/cris/semcrisv32f-switch.c
@SIM_ENABLE_ARCH_cris_TRUE@cris/cpuv32.h cris/cpuv32.c cris/semcrisv32f-switch.c cris/modelv32.c cris/decodev32.c cris/decodev32.h: @CGEN_MAINT@ cris/cgen-cpu-decode-v32f

# These rules are copied from automake, but tweaked to use FOR_BUILD variables.
@SIM_ENABLE_ARCH_d10v_TRUE@d10v/gencode$(EXEEXT): $(d10v_gencode_OBJECTS) $(d10v_gencode_DEPENDENCIES) d10v/$(am__dirstamp)
@SIM_ENABLE_ARCH_d10v_TRUE@	$(AM_V_CCLD)$(LINK_FOR_BUILD) $(d10v_gencode_OBJECTS) $(d10v_gencode_LDADD)

# gencode is a build-time only tool.  Override the default rules for it.
@SIM_ENABLE_ARCH_d10v_TRUE@d10v/gencode.o: d10v/gencode.c
@SIM_ENABLE_ARCH_d10v_TRUE@	$(AM_V_CC)$(COMPILE_FOR_BUILD) -c $< -o $@
@SIM_ENABLE_ARCH_d10v_TRUE@d10v/d10v-opc.o: ../opcodes/d10v-opc.c
@SIM_ENABLE_ARCH_d10v_TRUE@	$(AM_V_CC)$(COMPILE_FOR_BUILD) -c $< -o $@

@SIM_ENABLE_ARCH_d10v_TRUE@d10v/simops.h: d10v/gencode$(EXEEXT)
@SIM_ENABLE_ARCH_d10v_TRUE@	$(AM_V_GEN)$< -h >$@

@SIM_ENABLE_ARCH_d10v_TRUE@d10v/table.c: d10v/gencode$(EXEEXT)
@SIM_ENABLE_ARCH_d10v_TRUE@	$(AM_V_GEN)$< >$@

@SIM_ENABLE_ARCH_erc32_TRUE@erc32/sis$(EXEEXT): erc32/run$(EXEEXT)
@SIM_ENABLE_ARCH_erc32_TRUE@	$(AM_V_GEN)ln $< $@ 2>/dev/null || $(LN_S) $< $@ 2>/dev/null || cp -p $< $@

@SIM_ENABLE_ARCH_erc32_TRUE@erc32/%.o: erc32/%.c | erc32/libsim.a $(SIM_ALL_RECURSIVE_DEPS)
@SIM_ENABLE_ARCH_erc32_TRUE@	$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
@SIM_ENABLE_ARCH_erc32_TRUE@sim-%D-install-exec-local: installdirs
@SIM_ENABLE_ARCH_erc32_TRUE@	$(AM_V_at)$(MKDIR_P) $(DESTDIR)$(bindir)
@SIM_ENABLE_ARCH_erc32_TRUE@	n=`echo sis | sed '$(program_transform_name)'`; \
@SIM_ENABLE_ARCH_erc32_TRUE@	$(LIBTOOL) --mode=install $(INSTALL_PROGRAM) erc32/run$(EXEEXT) $(DESTDIR)$(bindir)/$$n$(EXEEXT)
@SIM_ENABLE_ARCH_erc32_TRUE@sim-erc32-uninstall-local:
@SIM_ENABLE_ARCH_erc32_TRUE@	rm -f $(DESTDIR)$(bindir)/sis

@SIM_ENABLE_ARCH_frv_TRUE@frv/mloop.c frv/eng.h: frv/stamp-mloop ; @true
@SIM_ENABLE_ARCH_frv_TRUE@frv/stamp-mloop: $(srccom)/genmloop.sh frv/mloop.in
@SIM_ENABLE_ARCH_frv_TRUE@	$(AM_V_GEN)$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
@SIM_ENABLE_ARCH_frv_TRUE@		-mono -scache -parallel-generic-write -parallel-only \
@SIM_ENABLE_ARCH_frv_TRUE@		-cpu frvbf \
@SIM_ENABLE_ARCH_frv_TRUE@		-infile $(srcdir)/frv/mloop.in -outfile-prefix frv/
@SIM_ENABLE_ARCH_frv_TRUE@	$(AM_V_at)$(SHELL) $(srcroot)/move-if-change frv/eng.hin frv/eng.h
@SIM_ENABLE_ARCH_frv_TRUE@	$(AM_V_at)$(SHELL) $(srcroot)/move-if-change frv/mloop.cin frv/mloop.c
@SIM_ENABLE_ARCH_frv_TRUE@	$(AM_V_at)touch $@

@SIM_ENABLE_ARCH_frv_TRUE@frv/cgen: frv/cgen-arch frv/cgen-cpu-decode

@SIM_ENABLE_ARCH_frv_TRUE@frv/cgen-arch:
@SIM_ENABLE_ARCH_frv_TRUE@	$(AM_V_GEN)mach=all FLAGS="with-scache"; $(CGEN_GEN_ARCH)
@SIM_ENABLE_ARCH_frv_TRUE@frv/arch.h frv/arch.c frv/cpuall.h: @CGEN_MAINT@ frv/cgen-arch

@SIM_ENABLE_ARCH_frv_TRUE@frv/cgen-cpu-decode:
@SIM_ENABLE_ARCH_frv_TRUE@	$(AM_V_GEN)cpu=frvbf mach=frv,fr550,fr500,fr450,fr400,tomcat,simple FLAGS="with-scache with-profile=fn with-generic-write with-parallel-only" EXTRAFILES="$(CGEN_CPU_SEM)"; $(CGEN_GEN_CPU_DECODE)
@SIM_ENABLE_ARCH_frv_TRUE@frv/cpu.h frv/sem.c frv/model.c frv/decode.c frv/decode.h: @CGEN_MAINT@ frv/cgen-cpu-decode

@SIM_ENABLE_ARCH_iq2000_TRUE@iq2000/mloop.c iq2000/eng.h: iq2000/stamp-mloop ; @true
@SIM_ENABLE_ARCH_iq2000_TRUE@iq2000/stamp-mloop: $(srccom)/genmloop.sh iq2000/mloop.in
@SIM_ENABLE_ARCH_iq2000_TRUE@	$(AM_V_GEN)$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
@SIM_ENABLE_ARCH_iq2000_TRUE@		-mono -fast -pbb -switch sem-switch.c \
@SIM_ENABLE_ARCH_iq2000_TRUE@		-cpu iq2000bf \
@SIM_ENABLE_ARCH_iq2000_TRUE@		-infile $(srcdir)/iq2000/mloop.in -outfile-prefix iq2000/
@SIM_ENABLE_ARCH_iq2000_TRUE@	$(AM_V_at)$(SHELL) $(srcroot)/move-if-change iq2000/eng.hin iq2000/eng.h
@SIM_ENABLE_ARCH_iq2000_TRUE@	$(AM_V_at)$(SHELL) $(srcroot)/move-if-change iq2000/mloop.cin iq2000/mloop.c
@SIM_ENABLE_ARCH_iq2000_TRUE@	$(AM_V_at)touch $@

@SIM_ENABLE_ARCH_iq2000_TRUE@iq2000/cgen: iq2000/cgen-arch iq2000/cgen-cpu-decode

@SIM_ENABLE_ARCH_iq2000_TRUE@iq2000/cgen-arch:
@SIM_ENABLE_ARCH_iq2000_TRUE@	$(AM_V_GEN)mach=iq2000 FLAGS="with-scache with-profile=fn"; $(CGEN_GEN_ARCH)
@SIM_ENABLE_ARCH_iq2000_TRUE@iq2000/arch.h iq2000/arch.c iq2000/cpuall.h: @CGEN_MAINT@ iq2000/cgen-arch

@SIM_ENABLE_ARCH_iq2000_TRUE@iq2000/cgen-cpu-decode:
@SIM_ENABLE_ARCH_iq2000_TRUE@	$(AM_V_GEN)cpu=iq2000bf mach=iq2000 FLAGS="with-scache with-profile=fn" EXTRAFILES="$(CGEN_CPU_SEM) $(CGEN_CPU_SEMSW)"; $(CGEN_GEN_CPU_DECODE)
@SIM_ENABLE_ARCH_iq2000_TRUE@iq2000/cpu.h iq2000/sem.c iq2000/sem-switch.c iq2000/model.c iq2000/decode.c iq2000/decode.h: @CGEN_MAINT@ iq2000/cgen-cpu-decode

@SIM_ENABLE_ARCH_lm32_TRUE@lm32/mloop.c lm32/eng.h: lm32/stamp-mloop ; @true
@SIM_ENABLE_ARCH_lm32_TRUE@lm32/stamp-mloop: $(srccom)/genmloop.sh lm32/mloop.in
@SIM_ENABLE_ARCH_lm32_TRUE@	$(AM_V_GEN)$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
@SIM_ENABLE_ARCH_lm32_TRUE@		-mono -fast -pbb -switch sem-switch.c \
@SIM_ENABLE_ARCH_lm32_TRUE@		-cpu lm32bf \
@SIM_ENABLE_ARCH_lm32_TRUE@		-infile $(srcdir)/lm32/mloop.in -outfile-prefix lm32/
@SIM_ENABLE_ARCH_lm32_TRUE@	$(AM_V_at)$(SHELL) $(srcroot)/move-if-change lm32/eng.hin lm32/eng.h
@SIM_ENABLE_ARCH_lm32_TRUE@	$(AM_V_at)$(SHELL) $(srcroot)/move-if-change lm32/mloop.cin lm32/mloop.c
@SIM_ENABLE_ARCH_lm32_TRUE@	$(AM_V_at)touch $@

@SIM_ENABLE_ARCH_lm32_TRUE@lm32/cgen: lm32/cgen-arch lm32/cgen-cpu-decode

@SIM_ENABLE_ARCH_lm32_TRUE@lm32/cgen-arch:
@SIM_ENABLE_ARCH_lm32_TRUE@	$(AM_V_GEN)mach=all FLAGS="with-scache with-profile=fn"; $(CGEN_GEN_ARCH)
@SIM_ENABLE_ARCH_lm32_TRUE@lm32/arch.h lm32/arch.c lm32/cpuall.h: @CGEN_MAINT@ lm32/cgen-arch

@SIM_ENABLE_ARCH_lm32_TRUE@lm32/cgen-cpu-decode:
@SIM_ENABLE_ARCH_lm32_TRUE@	$(AM_V_GEN)cpu=lm32bf mach=lm32 FLAGS="with-scache with-profile=fn" EXTRAFILES="$(CGEN_CPU_SEM) $(CGEN_CPU_SEMSW)"; $(CGEN_GEN_CPU_DECODE)
@SIM_ENABLE_ARCH_lm32_TRUE@lm32/cpu.h lm32/sem.c lm32/sem-switch.c lm32/model.c lm32/decode.c lm32/decode.h: @CGEN_MAINT@ lm32/cgen-cpu-decode

@SIM_ENABLE_ARCH_m32c_TRUE@m32c/%.o: m32c/%.c | m32c/libsim.a $(SIM_ALL_RECURSIVE_DEPS)
@SIM_ENABLE_ARCH_m32c_TRUE@	$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)

# These rules are copied from automake, but tweaked to use FOR_BUILD variables.
@SIM_ENABLE_ARCH_m32c_TRUE@m32c/opc2c$(EXEEXT): $(m32c_opc2c_OBJECTS) $(m32c_opc2c_DEPENDENCIES) m32c/$(am__dirstamp)
@SIM_ENABLE_ARCH_m32c_TRUE@	$(AM_V_CCLD)$(LINK_FOR_BUILD) $(m32c_opc2c_OBJECTS) $(m32c_opc2c_LDADD)

# opc2c is a build-time only tool.  Override the default rules for it.
@SIM_ENABLE_ARCH_m32c_TRUE@m32c/opc2c.o: m32c/opc2c.c
@SIM_ENABLE_ARCH_m32c_TRUE@	$(AM_V_CC)$(COMPILE_FOR_BUILD) -c $< -o $@

@SIM_ENABLE_ARCH_m32c_TRUE@m32c/m32c.c: m32c/m32c.opc m32c/opc2c$(EXEEXT)
@SIM_ENABLE_ARCH_m32c_TRUE@	$(AM_V_GEN)$(m32c_OPC2C_RUN) -l $@.log $< > $@.tmp
@SIM_ENABLE_ARCH_m32c_TRUE@	$(AM_V_at)mv $@.tmp $@

@SIM_ENABLE_ARCH_m32c_TRUE@m32c/r8c.c: m32c/r8c.opc m32c/opc2c$(EXEEXT)
@SIM_ENABLE_ARCH_m32c_TRUE@	$(AM_V_GEN)$(m32c_OPC2C_RUN) -l $@.log $< > $@.tmp
@SIM_ENABLE_ARCH_m32c_TRUE@	$(AM_V_at)mv $@.tmp $@

@SIM_ENABLE_ARCH_m32r_TRUE@m32r/mloop.c m32r/eng.h: m32r/stamp-mloop ; @true
@SIM_ENABLE_ARCH_m32r_TRUE@m32r/stamp-mloop: $(srccom)/genmloop.sh m32r/mloop.in
@SIM_ENABLE_ARCH_m32r_TRUE@	$(AM_V_GEN)$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
@SIM_ENABLE_ARCH_m32r_TRUE@		-mono -fast -pbb -switch sem-switch.c \
@SIM_ENABLE_ARCH_m32r_TRUE@		-cpu m32rbf \
@SIM_ENABLE_ARCH_m32r_TRUE@		-infile $(srcdir)/m32r/mloop.in -outfile-prefix m32r/
@SIM_ENABLE_ARCH_m32r_TRUE@	$(AM_V_at)$(SHELL) $(srcroot)/move-if-change m32r/eng.hin m32r/eng.h
@SIM_ENABLE_ARCH_m32r_TRUE@	$(AM_V_at)$(SHELL) $(srcroot)/move-if-change m32r/mloop.cin m32r/mloop.c
@SIM_ENABLE_ARCH_m32r_TRUE@	$(AM_V_at)touch $@

@SIM_ENABLE_ARCH_m32r_TRUE@m32r/mloopx.c m32r/engx.h: m32r/stamp-mloop ; @true
@SIM_ENABLE_ARCH_m32r_TRUE@m32r/stamp-mloop-x: $(srccom)/genmloop.sh m32r/mloop.in
@SIM_ENABLE_ARCH_m32r_TRUE@	$(AM_V_GEN)$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
@SIM_ENABLE_ARCH_m32r_TRUE@		-mono -no-fast -pbb -parallel-write -switch semx-switch.c \
@SIM_ENABLE_ARCH_m32r_TRUE@		-cpu m32rxf \
@SIM_ENABLE_ARCH_m32r_TRUE@		-infile $(srcdir)/m32r/mloopx.in -outfile-prefix m32r/ -outfile-suffix x
@SIM_ENABLE_ARCH_m32r_TRUE@	$(AM_V_at)$(SHELL) $(srcroot)/move-if-change m32r/engx.hin m32r/engx.h
@SIM_ENABLE_ARCH_m32r_TRUE@	$(AM_V_at)$(SHELL) $(srcroot)/move-if-change m32r/mloopx.cin m32r/mloopx.c
@SIM_ENABLE_ARCH_m32r_TRUE@	$(AM_V_at)touch $@

@SIM_ENABLE_ARCH_m32r_TRUE@m32r/mloop2.c m32r/eng2.h: m32r/stamp-mloop ; @true
@SIM_ENABLE_ARCH_m32r_TRUE@m32r/stamp-mloop-2: $(srccom)/genmloop.sh m32r/mloop.in
@SIM_ENABLE_ARCH_m32r_TRUE@	$(AM_V_GEN)$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
@SIM_ENABLE_ARCH_m32r_TRUE@		-mono -no-fast -pbb -parallel-write -switch sem2-switch.c \
@SIM_ENABLE_ARCH_m32r_TRUE@		-cpu m32r2f \
@SIM_ENABLE_ARCH_m32r_TRUE@		-infile $(srcdir)/m32r/mloop2.in -outfile-prefix m32r/ -outfile-suffix 2
@SIM_ENABLE_ARCH_m32r_TRUE@	$(AM_V_at)$(SHELL) $(srcroot)/move-if-change m32r/eng2.hin m32r/eng2.h
@SIM_ENABLE_ARCH_m32r_TRUE@	$(AM_V_at)$(SHELL) $(srcroot)/move-if-change m32r/mloop2.cin m32r/mloop2.c
@SIM_ENABLE_ARCH_m32r_TRUE@	$(AM_V_at)touch $@

@SIM_ENABLE_ARCH_m32r_TRUE@m32r/cgen: m32r/cgen-arch m32r/cgen-cpu-decode m32r/cgen-cpu-decode-x m32r/cgen-cpu-decode-2

@SIM_ENABLE_ARCH_m32r_TRUE@m32r/cgen-arch:
@SIM_ENABLE_ARCH_m32r_TRUE@	$(AM_V_GEN)mach=all FLAGS="with-scache with-profile=fn"; $(CGEN_GEN_ARCH)
@SIM_ENABLE_ARCH_m32r_TRUE@m32r/arch.h m32r/arch.c m32r/cpuall.h: @CGEN_MAINT@ m32r/cgen-arch

@SIM_ENABLE_ARCH_m32r_TRUE@m32r/cgen-cpu-decode:
@SIM_ENABLE_ARCH_m32r_TRUE@	$(AM_V_GEN)cpu=m32rbf mach=m32r FLAGS="with-scache with-profile=fn" EXTRAFILES="$(CGEN_CPU_SEM) $(CGEN_CPU_SEMSW)"; $(CGEN_GEN_CPU_DECODE)
@SIM_ENABLE_ARCH_m32r_TRUE@m32r/cpu.h m32r/sem.c m32r/sem-switch.c m32r/model.c m32r/decode.c m32r/decode.h: @CGEN_MAINT@ m32r/cgen-cpu-decode

@SIM_ENABLE_ARCH_m32r_TRUE@m32r/cgen-cpu-decode-x:
@SIM_ENABLE_ARCH_m32r_TRUE@	$(AM_V_GEN)cpu=m32rxf mach=m32rx SUFFIX=x FLAGS="with-scache with-profile=fn" EXTRAFILES="$(CGEN_CPU_SEMSW)"; $(CGEN_GEN_CPU_DECODE)
@SIM_ENABLE_ARCH_m32r_TRUE@m32r/cpux.h m32r/semx-switch.c m32r/modelx.c m32r/decodex.c m32r/decodex.h: @CGEN_MAINT@ m32r/cgen-cpu-decode-x

@SIM_ENABLE_ARCH_m32r_TRUE@m32r/cgen-cpu-decode-2:
@SIM_ENABLE_ARCH_m32r_TRUE@	$(AM_V_GEN)cpu=m32r2f mach=m32r2 SUFFIX=2 FLAGS="with-scache with-profile=fn" EXTRAFILES="$(CGEN_CPU_SEMSW)"; $(CGEN_GEN_CPU_DECODE)
@SIM_ENABLE_ARCH_m32r_TRUE@m32r/cpu2.h m32r/sem2-switch.c m32r/model2.c m32r/decode2.c m32r/decode2.h: @CGEN_MAINT@ m32r/cgen-cpu-decode-2

# These rules are copied from automake, but tweaked to use FOR_BUILD variables.
@SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11/gencode$(EXEEXT): $(m68hc11_gencode_OBJECTS) $(m68hc11_gencode_DEPENDENCIES) m68hc11/$(am__dirstamp)
@SIM_ENABLE_ARCH_m68hc11_TRUE@	$(AM_V_CCLD)$(LINK_FOR_BUILD) $(m68hc11_gencode_OBJECTS) $(m68hc11_gencode_LDADD)

# gencode is a build-time only tool.  Override the default rules for it.
@SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11/gencode.o: m68hc11/gencode.c
@SIM_ENABLE_ARCH_m68hc11_TRUE@	$(AM_V_CC)$(COMPILE_FOR_BUILD) -c $< -o $@

@SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11/m68hc11int.c: m68hc11/gencode$(EXEEXT)
@SIM_ENABLE_ARCH_m68hc11_TRUE@	$(AM_V_GEN)$< -m6811 >$@

@SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11/m68hc12int.c: m68hc11/gencode$(EXEEXT)
@SIM_ENABLE_ARCH_m68hc11_TRUE@	$(AM_V_GEN)$< -m6812 >$@

@SIM_ENABLE_ARCH_mips_TRUE@$(mips_BUILT_SRC_FROM_IGEN_ITABLE): mips/stamp-igen-itable
@SIM_ENABLE_ARCH_mips_TRUE@$(mips_BUILT_SRC_FROM_GEN_MODE_SINGLE): mips/stamp-gen-mode-single
@SIM_ENABLE_ARCH_mips_TRUE@$(mips_BUILT_SRC_FROM_GEN_MODE_M16_M16): mips/stamp-gen-mode-m16-m16
@SIM_ENABLE_ARCH_mips_TRUE@$(mips_BUILT_SRC_FROM_GEN_MODE_M16_M32): mips/stamp-gen-mode-m16-m32
@SIM_ENABLE_ARCH_mips_TRUE@$(SIM_MIPS_MULTI_SRC): mips/stamp-gen-mode-multi-igen mips/stamp-gen-mode-multi-run

@SIM_ENABLE_ARCH_mips_TRUE@mips/stamp-igen-itable: $(mips_IGEN_INSN) $(mips_IGEN_INSN_INC) $(IGEN)
@SIM_ENABLE_ARCH_mips_TRUE@	$(AM_V_GEN)$(IGEN_RUN) \
@SIM_ENABLE_ARCH_mips_TRUE@		$(mips_IGEN_TRACE) \
@SIM_ENABLE_ARCH_mips_TRUE@		-I $(srcdir)/mips \
@SIM_ENABLE_ARCH_mips_TRUE@		-Werror \
@SIM_ENABLE_ARCH_mips_TRUE@		-Wnodiscard \
@SIM_ENABLE_ARCH_mips_TRUE@		-Wnowidth \
@SIM_ENABLE_ARCH_mips_TRUE@		-Wnounimplemented \
@SIM_ENABLE_ARCH_mips_TRUE@		$(SIM_MIPS_IGEN_ITABLE_FLAGS) \
@SIM_ENABLE_ARCH_mips_TRUE@		-G gen-direct-access \
@SIM_ENABLE_ARCH_mips_TRUE@		-G gen-zero-r0 \
@SIM_ENABLE_ARCH_mips_TRUE@		-i $(mips_IGEN_INSN) \
@SIM_ENABLE_ARCH_mips_TRUE@		-n itable.h    -ht mips/itable.h \
@SIM_ENABLE_ARCH_mips_TRUE@		-n itable.c    -t  mips/itable.c
@SIM_ENABLE_ARCH_mips_TRUE@	$(AM_V_at)touch $@

@SIM_ENABLE_ARCH_mips_TRUE@mips/stamp-gen-mode-single: $(mips_IGEN_INSN) $(mips_IGEN_INSN_INC) $(mips_IGEN_DC) $(IGEN)
@SIM_ENABLE_ARCH_mips_TRUE@	$(AM_V_GEN)$(IGEN_RUN) \
@SIM_ENABLE_ARCH_mips_TRUE@		$(mips_IGEN_TRACE) \
@SIM_ENABLE_ARCH_mips_TRUE@		-I $(srcdir)/mips \
@SIM_ENABLE_ARCH_mips_TRUE@		-Werror \
@SIM_ENABLE_ARCH_mips_TRUE@		-Wnodiscard \
@SIM_ENABLE_ARCH_mips_TRUE@		$(SIM_MIPS_SINGLE_FLAGS) \
@SIM_ENABLE_ARCH_mips_TRUE@		-G gen-direct-access \
@SIM_ENABLE_ARCH_mips_TRUE@		-G gen-zero-r0 \
@SIM_ENABLE_ARCH_mips_TRUE@		-B 32 \
@SIM_ENABLE_ARCH_mips_TRUE@		-H 31 \
@SIM_ENABLE_ARCH_mips_TRUE@		-i $(mips_IGEN_INSN) \
@SIM_ENABLE_ARCH_mips_TRUE@		-o $(mips_IGEN_DC) \
@SIM_ENABLE_ARCH_mips_TRUE@		-x \
@SIM_ENABLE_ARCH_mips_TRUE@		-n icache.h    -hc mips/icache.h \
@SIM_ENABLE_ARCH_mips_TRUE@		-n icache.c    -c  mips/icache.c \
@SIM_ENABLE_ARCH_mips_TRUE@		-n semantics.h -hs mips/semantics.h \
@SIM_ENABLE_ARCH_mips_TRUE@		-n semantics.c -s  mips/semantics.c \
@SIM_ENABLE_ARCH_mips_TRUE@		-n idecode.h   -hd mips/idecode.h \
@SIM_ENABLE_ARCH_mips_TRUE@		-n idecode.c   -d  mips/idecode.c \
@SIM_ENABLE_ARCH_mips_TRUE@		-n model.h     -hm mips/model.h \
@SIM_ENABLE_ARCH_mips_TRUE@		-n model.c     -m  mips/model.c \
@SIM_ENABLE_ARCH_mips_TRUE@		-n support.h   -hf mips/support.h \
@SIM_ENABLE_ARCH_mips_TRUE@		-n support.c   -f  mips/support.c \
@SIM_ENABLE_ARCH_mips_TRUE@		-n engine.h    -he mips/engine.h \
@SIM_ENABLE_ARCH_mips_TRUE@		-n engine.c    -e  mips/engine.c \
@SIM_ENABLE_ARCH_mips_TRUE@		-n irun.c      -r  mips/irun.c
@SIM_ENABLE_ARCH_mips_TRUE@	$(AM_V_at)touch $@

@SIM_ENABLE_ARCH_mips_TRUE@mips/stamp-gen-mode-m16-m16: $(mips_IGEN_INSN) $(mips_IGEN_INSN_INC) $(mips_M16_DC) $(IGEN)
@SIM_ENABLE_ARCH_mips_TRUE@	$(AM_V_GEN)$(IGEN_RUN) \
@SIM_ENABLE_ARCH_mips_TRUE@		$(mips_IGEN_TRACE) \
@SIM_ENABLE_ARCH_mips_TRUE@		-I $(srcdir)/mips \
@SIM_ENABLE_ARCH_mips_TRUE@		-Werror \
@SIM_ENABLE_ARCH_mips_TRUE@		-Wnodiscard \
@SIM_ENABLE_ARCH_mips_TRUE@		$(SIM_MIPS_M16_FLAGS) \
@SIM_ENABLE_ARCH_mips_TRUE@		-G gen-direct-access \
@SIM_ENABLE_ARCH_mips_TRUE@		-G gen-zero-r0 \
@SIM_ENABLE_ARCH_mips_TRUE@		-B 16 \
@SIM_ENABLE_ARCH_mips_TRUE@		-H 15 \
@SIM_ENABLE_ARCH_mips_TRUE@		-i $(mips_IGEN_INSN) \
@SIM_ENABLE_ARCH_mips_TRUE@		-o $(mips_M16_DC) \
@SIM_ENABLE_ARCH_mips_TRUE@		-P m16_ \
@SIM_ENABLE_ARCH_mips_TRUE@		-x \
@SIM_ENABLE_ARCH_mips_TRUE@		-n m16_icache.h    -hc mips/m16_icache.h \
@SIM_ENABLE_ARCH_mips_TRUE@		-n m16_icache.c    -c  mips/m16_icache.c \
@SIM_ENABLE_ARCH_mips_TRUE@		-n m16_semantics.h -hs mips/m16_semantics.h \
@SIM_ENABLE_ARCH_mips_TRUE@		-n m16_semantics.c -s  mips/m16_semantics.c \
@SIM_ENABLE_ARCH_mips_TRUE@		-n m16_idecode.h   -hd mips/m16_idecode.h \
@SIM_ENABLE_ARCH_mips_TRUE@		-n m16_idecode.c   -d  mips/m16_idecode.c \
@SIM_ENABLE_ARCH_mips_TRUE@		-n m16_model.h     -hm mips/m16_model.h \
@SIM_ENABLE_ARCH_mips_TRUE@		-n m16_model.c     -m  mips/m16_model.c \
@SIM_ENABLE_ARCH_mips_TRUE@		-n m16_support.h   -hf mips/m16_support.h \
@SIM_ENABLE_ARCH_mips_TRUE@		-n m16_support.c   -f  mips/m16_support.c
@SIM_ENABLE_ARCH_mips_TRUE@	$(AM_V_at)touch $@

@SIM_ENABLE_ARCH_mips_TRUE@mips/stamp-gen-mode-m16-m32: $(mips_IGEN_INSN) $(mips_IGEN_INSN_INC) $(mips_IGEN_DC) $(IGEN)
@SIM_ENABLE_ARCH_mips_TRUE@	$(AM_V_GEN)$(IGEN_RUN) \
@SIM_ENABLE_ARCH_mips_TRUE@		$(mips_IGEN_TRACE) \
@SIM_ENABLE_ARCH_mips_TRUE@		-I $(srcdir)/mips \
@SIM_ENABLE_ARCH_mips_TRUE@		-Werror \
@SIM_ENABLE_ARCH_mips_TRUE@		-Wnodiscard \
@SIM_ENABLE_ARCH_mips_TRUE@		$(SIM_MIPS_SINGLE_FLAGS) \
@SIM_ENABLE_ARCH_mips_TRUE@		-G gen-direct-access \
@SIM_ENABLE_ARCH_mips_TRUE@		-G gen-zero-r0 \
@SIM_ENABLE_ARCH_mips_TRUE@		-B 32 \
@SIM_ENABLE_ARCH_mips_TRUE@		-H 31 \
@SIM_ENABLE_ARCH_mips_TRUE@		-i $(mips_IGEN_INSN) \
@SIM_ENABLE_ARCH_mips_TRUE@		-o $(mips_IGEN_DC) \
@SIM_ENABLE_ARCH_mips_TRUE@		-P m32_ \
@SIM_ENABLE_ARCH_mips_TRUE@		-x \
@SIM_ENABLE_ARCH_mips_TRUE@		-n m32_icache.h    -hc mips/m32_icache.h \
@SIM_ENABLE_ARCH_mips_TRUE@		-n m32_icache.c    -c  mips/m32_icache.c \
@SIM_ENABLE_ARCH_mips_TRUE@		-n m32_semantics.h -hs mips/m32_semantics.h \
@SIM_ENABLE_ARCH_mips_TRUE@		-n m32_semantics.c -s  mips/m32_semantics.c \
@SIM_ENABLE_ARCH_mips_TRUE@		-n m32_idecode.h   -hd mips/m32_idecode.h \
@SIM_ENABLE_ARCH_mips_TRUE@		-n m32_idecode.c   -d  mips/m32_idecode.c \
@SIM_ENABLE_ARCH_mips_TRUE@		-n m32_model.h     -hm mips/m32_model.h \
@SIM_ENABLE_ARCH_mips_TRUE@		-n m32_model.c     -m  mips/m32_model.c \
@SIM_ENABLE_ARCH_mips_TRUE@		-n m32_support.h   -hf mips/m32_support.h \
@SIM_ENABLE_ARCH_mips_TRUE@		-n m32_support.c   -f  mips/m32_support.c
@SIM_ENABLE_ARCH_mips_TRUE@	$(AM_V_at)touch $@

@SIM_ENABLE_ARCH_mips_TRUE@mips/stamp-gen-mode-multi-igen: $(mips_IGEN_INSN) $(mips_IGEN_INSN_INC) $(mips_IGEN_DC) $(mips_M16_DC) $(mips_MICROMIPS32_DC) $(mips_MICROMIPS16_DC) $(IGEN)
@SIM_ENABLE_ARCH_mips_TRUE@	$(AM_V_GEN)\
@SIM_ENABLE_ARCH_mips_TRUE@	for t in $(SIM_MIPS_MULTI_IGEN_CONFIGS); do \
@SIM_ENABLE_ARCH_mips_TRUE@	  p=`echo $${t} | sed -e 's/:.*//'` ; \
@SIM_ENABLE_ARCH_mips_TRUE@	  m=`echo $${t} | sed -e 's/.*:\(.*\):.*/\1/'` ; \
@SIM_ENABLE_ARCH_mips_TRUE@	  f=`echo $${t} | sed -e 's/.*://'` ; \
@SIM_ENABLE_ARCH_mips_TRUE@	  case $${p} in \
@SIM_ENABLE_ARCH_mips_TRUE@	    micromips16*) \
@SIM_ENABLE_ARCH_mips_TRUE@	      e="-B 16 -H 15 -o $(mips_MICROMIPS16_DC) -F 16" ;; \
@SIM_ENABLE_ARCH_mips_TRUE@	    micromips32* | micromips64*) \
@SIM_ENABLE_ARCH_mips_TRUE@	      e="-B 32 -H 31 -o $(mips_MICROMIPS32_DC) -F $${f}" ;; \
@SIM_ENABLE_ARCH_mips_TRUE@	    micromips_m32*) \
@SIM_ENABLE_ARCH_mips_TRUE@	      e="-B 32 -H 31 -o $(mips_IGEN_DC) -F $${f}"; \
@SIM_ENABLE_ARCH_mips_TRUE@	      m="mips32r2,mips3d,mdmx,dsp,dsp2,smartmips" ;; \
@SIM_ENABLE_ARCH_mips_TRUE@	    micromips_m64*) \
@SIM_ENABLE_ARCH_mips_TRUE@	      e="-B 32 -H 31 -o $(mips_IGEN_DC) -F $${f}"; \
@SIM_ENABLE_ARCH_mips_TRUE@	      m="mips64r2,mips3d,mdmx,dsp,dsp2,smartmips" ;; \
@SIM_ENABLE_ARCH_mips_TRUE@	    m16*) \
@SIM_ENABLE_ARCH_mips_TRUE@	      e="-B 16 -H 15 -o $(mips_M16_DC) -F 16" ;; \
@SIM_ENABLE_ARCH_mips_TRUE@	    *) \
@SIM_ENABLE_ARCH_mips_TRUE@	      e="-B 32 -H 31 -o $(mips_IGEN_DC) -F $${f}" ;; \
@SIM_ENABLE_ARCH_mips_TRUE@	  esac; \
@SIM_ENABLE_ARCH_mips_TRUE@	  $(IGEN_RUN) \
@SIM_ENABLE_ARCH_mips_TRUE@		$(mips_IGEN_TRACE) \
@SIM_ENABLE_ARCH_mips_TRUE@		$${e} \
@SIM_ENABLE_ARCH_mips_TRUE@		-I $(srcdir)/mips \
@SIM_ENABLE_ARCH_mips_TRUE@		-Werror \
@SIM_ENABLE_ARCH_mips_TRUE@		-Wnodiscard \
@SIM_ENABLE_ARCH_mips_TRUE@		-M $${m} \
@SIM_ENABLE_ARCH_mips_TRUE@		-G gen-direct-access \
@SIM_ENABLE_ARCH_mips_TRUE@		-G gen-zero-r0 \
@SIM_ENABLE_ARCH_mips_TRUE@		-i $(mips_IGEN_INSN) \
@SIM_ENABLE_ARCH_mips_TRUE@		-P $${p}_ \
@SIM_ENABLE_ARCH_mips_TRUE@		-x \
@SIM_ENABLE_ARCH_mips_TRUE@		-n $${p}_icache.h    -hc mips/$${p}_icache.h \
@SIM_ENABLE_ARCH_mips_TRUE@		-n $${p}_icache.c    -c  mips/$${p}_icache.c \
@SIM_ENABLE_ARCH_mips_TRUE@		-n $${p}_semantics.h -hs mips/$${p}_semantics.h \
@SIM_ENABLE_ARCH_mips_TRUE@		-n $${p}_semantics.c -s  mips/$${p}_semantics.c \
@SIM_ENABLE_ARCH_mips_TRUE@		-n $${p}_idecode.h   -hd mips/$${p}_idecode.h \
@SIM_ENABLE_ARCH_mips_TRUE@		-n $${p}_idecode.c   -d  mips/$${p}_idecode.c \
@SIM_ENABLE_ARCH_mips_TRUE@		-n $${p}_model.h     -hm mips/$${p}_model.h \
@SIM_ENABLE_ARCH_mips_TRUE@		-n $${p}_model.c     -m  mips/$${p}_model.c \
@SIM_ENABLE_ARCH_mips_TRUE@		-n $${p}_support.h   -hf mips/$${p}_support.h \
@SIM_ENABLE_ARCH_mips_TRUE@		-n $${p}_support.c   -f  mips/$${p}_support.c \
@SIM_ENABLE_ARCH_mips_TRUE@		-n $${p}_engine.h    -he mips/$${p}_engine.h \
@SIM_ENABLE_ARCH_mips_TRUE@		-n $${p}_engine.c    -e  mips/$${p}_engine.c \
@SIM_ENABLE_ARCH_mips_TRUE@	    || exit; \
@SIM_ENABLE_ARCH_mips_TRUE@	done
@SIM_ENABLE_ARCH_mips_TRUE@	$(AM_V_at)touch $@

@SIM_ENABLE_ARCH_mips_TRUE@mips/stamp-gen-mode-multi-run: mips/m16run.c mips/micromipsrun.c
@SIM_ENABLE_ARCH_mips_TRUE@	$(AM_V_GEN)\
@SIM_ENABLE_ARCH_mips_TRUE@	for t in $(SIM_MIPS_MULTI_IGEN_CONFIGS); do \
@SIM_ENABLE_ARCH_mips_TRUE@	  case $${t} in \
@SIM_ENABLE_ARCH_mips_TRUE@	    m16*) \
@SIM_ENABLE_ARCH_mips_TRUE@	      m=`echo $${t} | sed -e 's/^m16//' -e 's/:.*//'`; \
@SIM_ENABLE_ARCH_mips_TRUE@	      o=mips/m16$${m}_run.c; \
@SIM_ENABLE_ARCH_mips_TRUE@	      sed < $(srcdir)/mips/m16run.c > $$o.tmp \
@SIM_ENABLE_ARCH_mips_TRUE@		    -e "s/^sim_/m16$${m}_/" \
@SIM_ENABLE_ARCH_mips_TRUE@		    -e "/include/s/sim-engine/m16$${m}_engine/" \
@SIM_ENABLE_ARCH_mips_TRUE@		    -e "s/m16_/m16$${m}_/" \
@SIM_ENABLE_ARCH_mips_TRUE@		    -e "s/m32_/m32$${m}_/" \
@SIM_ENABLE_ARCH_mips_TRUE@		    || exit 1; \
@SIM_ENABLE_ARCH_mips_TRUE@	      $(SHELL) $(srcroot)/move-if-change $$o.tmp $$o; \
@SIM_ENABLE_ARCH_mips_TRUE@	      ;;\
@SIM_ENABLE_ARCH_mips_TRUE@	    micromips32*) \
@SIM_ENABLE_ARCH_mips_TRUE@	      m=`echo $${t} | sed -e 's/^micromips32//' -e 's/:.*//'`; \
@SIM_ENABLE_ARCH_mips_TRUE@	      o=mips/micromips$${m}_run.c; \
@SIM_ENABLE_ARCH_mips_TRUE@	      sed < $(srcdir)/mips/micromipsrun.c > $$o.tmp \
@SIM_ENABLE_ARCH_mips_TRUE@		    -e "s/^sim_/micromips32$${m}_/" \
@SIM_ENABLE_ARCH_mips_TRUE@		    -e "/include/s/sim-engine/micromips32$${m}_engine/" \
@SIM_ENABLE_ARCH_mips_TRUE@		    -e "s/micromips16_/micromips16$${m}_/" \
@SIM_ENABLE_ARCH_mips_TRUE@		    -e "s/micromips32_/micromips32$${m}_/" \
@SIM_ENABLE_ARCH_mips_TRUE@		    -e "s/m32_/m32$${m}_/" \
@SIM_ENABLE_ARCH_mips_TRUE@		    || exit 1; \
@SIM_ENABLE_ARCH_mips_TRUE@	      $(SHELL) $(srcroot)/move-if-change $$o.tmp $$o; \
@SIM_ENABLE_ARCH_mips_TRUE@	      ;;\
@SIM_ENABLE_ARCH_mips_TRUE@	    micromips64*) \
@SIM_ENABLE_ARCH_mips_TRUE@	      m=`echo $${t} | sed -e 's/^micromips64//' -e 's/:.*//'`; \
@SIM_ENABLE_ARCH_mips_TRUE@	      o=mips/micromips$${m}_run.c; \
@SIM_ENABLE_ARCH_mips_TRUE@	      sed < $(srcdir)/mips/micromipsrun.c > $$o.tmp \
@SIM_ENABLE_ARCH_mips_TRUE@		    -e "s/^sim_/micromips64$${m}_/" \
@SIM_ENABLE_ARCH_mips_TRUE@		    -e "/include/s/sim-engine/micromips64$${m}_engine/" \
@SIM_ENABLE_ARCH_mips_TRUE@		    -e "s/micromips16_/micromips16$${m}_/" \
@SIM_ENABLE_ARCH_mips_TRUE@		    -e "s/micromips32_/micromips64$${m}_/" \
@SIM_ENABLE_ARCH_mips_TRUE@		    -e "s/m32_/m64$${m}_/" \
@SIM_ENABLE_ARCH_mips_TRUE@		    || exit 1; \
@SIM_ENABLE_ARCH_mips_TRUE@	      $(SHELL) $(srcroot)/move-if-change $$o.tmp $$o; \
@SIM_ENABLE_ARCH_mips_TRUE@	      ;;\
@SIM_ENABLE_ARCH_mips_TRUE@	  esac \
@SIM_ENABLE_ARCH_mips_TRUE@	done
@SIM_ENABLE_ARCH_mips_TRUE@	$(AM_V_at)touch $@

@SIM_ENABLE_ARCH_mn10300_TRUE@$(mn10300_BUILT_SRC_FROM_IGEN): mn10300/stamp-igen
@SIM_ENABLE_ARCH_mn10300_TRUE@mn10300/stamp-igen: $(mn10300_IGEN_INSN) $(mn10300_IGEN_INSN_INC) $(mn10300_IGEN_DC) $(IGEN)
@SIM_ENABLE_ARCH_mn10300_TRUE@	$(AM_V_GEN)$(IGEN_RUN) \
@SIM_ENABLE_ARCH_mn10300_TRUE@		$(mn10300_IGEN_TRACE) \
@SIM_ENABLE_ARCH_mn10300_TRUE@		-G gen-direct-access \
@SIM_ENABLE_ARCH_mn10300_TRUE@		-M mn10300,am33 -G gen-multi-sim=am33 \
@SIM_ENABLE_ARCH_mn10300_TRUE@		-M am33_2 \
@SIM_ENABLE_ARCH_mn10300_TRUE@		-I $(srcdir)/mn10300 \
@SIM_ENABLE_ARCH_mn10300_TRUE@		-i $(mn10300_IGEN_INSN) \
@SIM_ENABLE_ARCH_mn10300_TRUE@		-o $(mn10300_IGEN_DC) \
@SIM_ENABLE_ARCH_mn10300_TRUE@		-x \
@SIM_ENABLE_ARCH_mn10300_TRUE@		-n icache.h    -hc mn10300/icache.h \
@SIM_ENABLE_ARCH_mn10300_TRUE@		-n icache.c    -c  mn10300/icache.c \
@SIM_ENABLE_ARCH_mn10300_TRUE@		-n semantics.h -hs mn10300/semantics.h \
@SIM_ENABLE_ARCH_mn10300_TRUE@		-n semantics.c -s  mn10300/semantics.c \
@SIM_ENABLE_ARCH_mn10300_TRUE@		-n idecode.h   -hd mn10300/idecode.h \
@SIM_ENABLE_ARCH_mn10300_TRUE@		-n idecode.c   -d  mn10300/idecode.c \
@SIM_ENABLE_ARCH_mn10300_TRUE@		-n model.h     -hm mn10300/model.h \
@SIM_ENABLE_ARCH_mn10300_TRUE@		-n model.c     -m  mn10300/model.c \
@SIM_ENABLE_ARCH_mn10300_TRUE@		-n support.h   -hf mn10300/support.h \
@SIM_ENABLE_ARCH_mn10300_TRUE@		-n support.c   -f  mn10300/support.c \
@SIM_ENABLE_ARCH_mn10300_TRUE@		-n itable.h    -ht mn10300/itable.h \
@SIM_ENABLE_ARCH_mn10300_TRUE@		-n itable.c    -t  mn10300/itable.c \
@SIM_ENABLE_ARCH_mn10300_TRUE@		-n engine.h    -he mn10300/engine.h \
@SIM_ENABLE_ARCH_mn10300_TRUE@		-n engine.c    -e  mn10300/engine.c \
@SIM_ENABLE_ARCH_mn10300_TRUE@		-n irun.c      -r  mn10300/irun.c
@SIM_ENABLE_ARCH_mn10300_TRUE@	$(AM_V_at)touch $@

@SIM_ENABLE_ARCH_moxie_TRUE@moxie/moxie-gdb.dtb: @MAINT@ moxie/moxie-gdb.dts moxie/$(am__dirstamp)
@SIM_ENABLE_ARCH_moxie_TRUE@	$(AM_V_GEN) \
@SIM_ENABLE_ARCH_moxie_TRUE@	if test "x$(DTC)" != x; then \
@SIM_ENABLE_ARCH_moxie_TRUE@	  $(DTC) -O dtb -o $@.tmp ${srcdir}/moxie/moxie-gdb.dts || exit 1; \
@SIM_ENABLE_ARCH_moxie_TRUE@	  $(SHELL) $(srcroot)/move-if-change $@.tmp ${srcdir}/moxie/moxie-gdb.dtb || exit 1; \
@SIM_ENABLE_ARCH_moxie_TRUE@	  touch ${srcdir}/moxie/moxie-gdb.dtb; \
@SIM_ENABLE_ARCH_moxie_TRUE@	else \
@SIM_ENABLE_ARCH_moxie_TRUE@	  echo "Could not update the moxie-gdb.dtb file because the device "; \
@SIM_ENABLE_ARCH_moxie_TRUE@	  echo "tree compiler tool (dtc) is missing.  Install the tool to "; \
@SIM_ENABLE_ARCH_moxie_TRUE@	  echo "update the device tree blob."; \
@SIM_ENABLE_ARCH_moxie_TRUE@	fi

@SIM_ENABLE_ARCH_or1k_TRUE@or1k/mloop.c or1k/eng.h: or1k/stamp-mloop ; @true
@SIM_ENABLE_ARCH_or1k_TRUE@or1k/stamp-mloop: $(srccom)/genmloop.sh or1k/mloop.in
@SIM_ENABLE_ARCH_or1k_TRUE@	$(AM_V_GEN)$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
@SIM_ENABLE_ARCH_or1k_TRUE@		-mono -fast -pbb -switch sem-switch.c \
@SIM_ENABLE_ARCH_or1k_TRUE@		-cpu or1k32bf \
@SIM_ENABLE_ARCH_or1k_TRUE@		-infile $(srcdir)/or1k/mloop.in -outfile-prefix or1k/
@SIM_ENABLE_ARCH_or1k_TRUE@	$(AM_V_at)$(SHELL) $(srcroot)/move-if-change or1k/eng.hin or1k/eng.h
@SIM_ENABLE_ARCH_or1k_TRUE@	$(AM_V_at)$(SHELL) $(srcroot)/move-if-change or1k/mloop.cin or1k/mloop.c
@SIM_ENABLE_ARCH_or1k_TRUE@	$(AM_V_at)touch $@

@SIM_ENABLE_ARCH_or1k_TRUE@or1k/cgen: or1k/cgen-arch or1k/cgen-cpu-decode

@SIM_ENABLE_ARCH_or1k_TRUE@or1k/cgen-arch:
@SIM_ENABLE_ARCH_or1k_TRUE@	$(AM_V_GEN)mach=or32,or32nd FLAGS="with-scache"; $(CGEN_GEN_ARCH)
@SIM_ENABLE_ARCH_or1k_TRUE@or1k/arch.h or1k/arch.c or1k/cpuall.h: @CGEN_MAINT@ or1k/cgen-arch

@SIM_ENABLE_ARCH_or1k_TRUE@or1k/cgen-cpu-decode:
@SIM_ENABLE_ARCH_or1k_TRUE@	$(AM_V_GEN)cpu=or1k32bf mach=or32,or32nd FLAGS="with-scache" EXTRAFILES="$(CGEN_CPU_SEM) $(CGEN_CPU_SEMSW)"; $(CGEN_GEN_CPU_DECODE)
@SIM_ENABLE_ARCH_or1k_TRUE@or1k/cpu.h or1k/cpu.c or1k/model.c or1k/sem.c or1k/sem-switch.c or1k/decode.c or1k/decode.h: @CGEN_MAINT@ or1k/cgen-cpu-decode

@SIM_ENABLE_ARCH_ppc_TRUE@ppc/psim$(EXEEXT): ppc/run$(EXEEXT)
@SIM_ENABLE_ARCH_ppc_TRUE@	$(AM_V_GEN)ln $< $@ 2>/dev/null || $(LN_S) $< $@ 2>/dev/null || cp -p $< $@

@SIM_ENABLE_ARCH_ppc_TRUE@ppc/%.o: ppc/%.c | ppc/libsim.a $(SIM_ALL_RECURSIVE_DEPS)
@SIM_ENABLE_ARCH_ppc_TRUE@	$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)

@SIM_ENABLE_ARCH_ppc_TRUE@ppc/spreg.c: @MAINT@ ppc/ppc-spr-table ppc/spreg-gen.py ppc/$(am__dirstamp)
@SIM_ENABLE_ARCH_ppc_TRUE@	$(AM_V_GEN)$(srcdir)/ppc/spreg-gen.py --source $@.tmp
@SIM_ENABLE_ARCH_ppc_TRUE@	$(AM_V_at)$(SHELL) $(srcroot)/move-if-change $@.tmp $(srcdir)/ppc/spreg.c
@SIM_ENABLE_ARCH_ppc_TRUE@	$(AM_V_at)touch $(srcdir)/ppc/spreg.c

@SIM_ENABLE_ARCH_ppc_TRUE@ppc/spreg.h: @MAINT@ ppc/ppc-spr-table ppc/spreg-gen.py ppc/$(am__dirstamp)
@SIM_ENABLE_ARCH_ppc_TRUE@	$(AM_V_GEN)$(srcdir)/ppc/spreg-gen.py --header $@.tmp
@SIM_ENABLE_ARCH_ppc_TRUE@	$(AM_V_at)$(SHELL) $(srcroot)/move-if-change $@.tmp $(srcdir)/ppc/spreg.h
@SIM_ENABLE_ARCH_ppc_TRUE@	$(AM_V_at)touch $(srcdir)/ppc/spreg.h

@SIM_ENABLE_ARCH_rl78_TRUE@rl78/%.o: rl78/%.c | rl78/libsim.a $(SIM_ALL_RECURSIVE_DEPS)
@SIM_ENABLE_ARCH_rl78_TRUE@	$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)

@SIM_ENABLE_ARCH_rx_TRUE@rx/%.o: rx/%.c | rx/libsim.a $(SIM_ALL_RECURSIVE_DEPS)
@SIM_ENABLE_ARCH_rx_TRUE@	$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)

# These rules are copied from automake, but tweaked to use FOR_BUILD variables.
@SIM_ENABLE_ARCH_sh_TRUE@sh/gencode$(EXEEXT): $(sh_gencode_OBJECTS) $(sh_gencode_DEPENDENCIES) sh/$(am__dirstamp)
@SIM_ENABLE_ARCH_sh_TRUE@	$(AM_V_CCLD)$(LINK_FOR_BUILD) $(sh_gencode_OBJECTS) $(sh_gencode_LDADD)

# gencode is a build-time only tool.  Override the default rules for it.
@SIM_ENABLE_ARCH_sh_TRUE@sh/gencode.o: sh/gencode.c
@SIM_ENABLE_ARCH_sh_TRUE@	$(AM_V_CC)$(COMPILE_FOR_BUILD) -c $< -o $@

@SIM_ENABLE_ARCH_sh_TRUE@sh/code.c: sh/gencode$(EXEEXT)
@SIM_ENABLE_ARCH_sh_TRUE@	$(AM_V_GEN)$< -x >$@

@SIM_ENABLE_ARCH_sh_TRUE@sh/ppi.c: sh/gencode$(EXEEXT)
@SIM_ENABLE_ARCH_sh_TRUE@	$(AM_V_GEN)$< -p >$@

@SIM_ENABLE_ARCH_sh_TRUE@sh/table.c: sh/gencode$(EXEEXT)
@SIM_ENABLE_ARCH_sh_TRUE@	$(AM_V_GEN)$< -s >$@

@SIM_ENABLE_ARCH_v850_TRUE@$(v850_BUILT_SRC_FROM_IGEN): v850/stamp-igen
@SIM_ENABLE_ARCH_v850_TRUE@v850/stamp-igen: $(v850_IGEN_INSN) $(v850_IGEN_DC) $(IGEN)
@SIM_ENABLE_ARCH_v850_TRUE@	$(AM_V_GEN)$(IGEN_RUN) \
@SIM_ENABLE_ARCH_v850_TRUE@		$(v850_IGEN_TRACE) \
@SIM_ENABLE_ARCH_v850_TRUE@		-G gen-direct-access \
@SIM_ENABLE_ARCH_v850_TRUE@		-G gen-zero-r0 \
@SIM_ENABLE_ARCH_v850_TRUE@		-i $(v850_IGEN_INSN) \
@SIM_ENABLE_ARCH_v850_TRUE@		-o $(v850_IGEN_DC) \
@SIM_ENABLE_ARCH_v850_TRUE@		-x \
@SIM_ENABLE_ARCH_v850_TRUE@		-n icache.h    -hc v850/icache.h \
@SIM_ENABLE_ARCH_v850_TRUE@		-n icache.c    -c  v850/icache.c \
@SIM_ENABLE_ARCH_v850_TRUE@		-n semantics.h -hs v850/semantics.h \
@SIM_ENABLE_ARCH_v850_TRUE@		-n semantics.c -s  v850/semantics.c \
@SIM_ENABLE_ARCH_v850_TRUE@		-n idecode.h   -hd v850/idecode.h \
@SIM_ENABLE_ARCH_v850_TRUE@		-n idecode.c   -d  v850/idecode.c \
@SIM_ENABLE_ARCH_v850_TRUE@		-n model.h     -hm v850/model.h \
@SIM_ENABLE_ARCH_v850_TRUE@		-n model.c     -m  v850/model.c \
@SIM_ENABLE_ARCH_v850_TRUE@		-n support.h   -hf v850/support.h \
@SIM_ENABLE_ARCH_v850_TRUE@		-n support.c   -f  v850/support.c \
@SIM_ENABLE_ARCH_v850_TRUE@		-n itable.h    -ht v850/itable.h \
@SIM_ENABLE_ARCH_v850_TRUE@		-n itable.c    -t  v850/itable.c \
@SIM_ENABLE_ARCH_v850_TRUE@		-n engine.h    -he v850/engine.h \
@SIM_ENABLE_ARCH_v850_TRUE@		-n engine.c    -e  v850/engine.c \
@SIM_ENABLE_ARCH_v850_TRUE@		-n irun.c      -r  v850/irun.c
@SIM_ENABLE_ARCH_v850_TRUE@	$(AM_V_at)touch $@

%/libsim.a: | $(SIM_ALL_RECURSIVE_DEPS)
	$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)

%/nrun.o: common/nrun.c | %/libsim.a $(SIM_ALL_RECURSIVE_DEPS)
	$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)

all-recursive: $(SIM_ALL_RECURSIVE_DEPS)

install-data-local: installdirs $(SIM_INSTALL_DATA_LOCAL_DEPS)
	$(AM_V_at)$(MKDIR_P) $(DESTDIR)$(libdir)
	lib=`echo sim | sed '$(program_transform_name)'`; \
	for d in $(SIM_ENABLED_ARCHES); do \
		n="$$lib"; \
		[ "$(SIM_PRIMARY_TARGET)" = "$$d" ] || n="$$n-$$d"; \
		n="lib$$n.a"; \
		$(INSTALL_DATA) $$d/libsim.a $(DESTDIR)$(libdir)/$$n || exit 1; \
	done

install-exec-local: installdirs $(SIM_INSTALL_EXEC_LOCAL_DEPS)
	$(AM_V_at)$(MKDIR_P) $(DESTDIR)$(bindir)
	run=`echo run | sed '$(program_transform_name)'`; \
	for d in $(SIM_ENABLED_ARCHES); do \
		n="$$run"; \
		[ "$(SIM_PRIMARY_TARGET)" = "$$d" ] || n="$$n-$$d"; \
		$(LIBTOOL) --mode=install \
			$(INSTALL_PROGRAM) $$d/run$(EXEEXT) $(DESTDIR)$(bindir)/$$n$(EXEEXT) || exit 1; \
	done

uninstall-local: $(SIM_UNINSTALL_LOCAL_DEPS)
	rm -f $(DESTDIR)$(bindir)/run $(DESTDIR)$(libdir)/libsim.a
	for d in $(SIM_ENABLED_ARCHES); do \
		rm -f $(DESTDIR)$(bindir)/run-$$d $(DESTDIR)$(libdir)/libsim-$$d.a; \
	done

# Tell versions [3.59,3.63) of GNU make to not export all variables.
# Otherwise a system limit (for SysV at least) may be exceeded.
.NOEXPORT: