2017-02-24 Jan Beulich * i386-dis.c (reg_table): REG_F6/1 and REG_F7/1 decode as TEST. 2017-02-23 Sheldon Lobo Add support for associating SPARC ASIs with an architecture level. * include/opcode/sparc.h (sparc_asi): New sparc_asi struct. * opcodes/sparc-opc.c (asi_table): Updated asi_table and encoding/ decoding of SPARC ASIs. 2017-02-23 Jan Beulich * i386-dis.c (get_valid_dis386): Don't special case VEX opcode 82. For 3-byte VEX only special case opcode 77 in VEX_0F space. 2017-02-21 Jan Beulich * aarch64-asm.c (convert_bfc_to_bfm): Copy operand 0 to operand 1 (instead of to itself). Correct typo. 2017-02-14 Andrew Waterman * riscv-opc.c (riscv_opcodes): Add sfence.vma instruction and pseudoinstructions. 2017-02-15 Richard Sandiford * aarch64-opc.c (aarch64_sys_regs): Add SVE registers. (aarch64_sys_reg_supported_p): Handle them. 2017-02-15 Claudiu Zissulescu * arc-opc.c (UIMM6_20R): Define. (SIMM12_20): Use above. (SIMM12_20R): Define. (SIMM3_5_S): Use above. (UIMM7_A32_11R_S): Define. (UIMM7_9_S): Use above. (UIMM3_13R_S): Define. (SIMM11_A32_7_S): Use above. (SIMM9_8R): Define. (UIMM10_A32_8_S): Use above. (UIMM8_8R_S): Define. (W6): Use above. (arc_relax_opcodes): Use all above defines. 2017-02-15 Vineet Gupta * arc-regs.h: Distinguish some of the registers different on ARC700 and HS38 cpus. 2017-02-14 Alan Modra PR 21118 * ppc-opc.c (powerpc_operands): Flag SPR, SPRG and TBR entries with PPC_OPERAND_SPR. Flag PSQ and PSQM with PPC_OPERAND_GQR. 2017-02-11 Stafford Horne Alan Modra * cgen-opc.c (cgen_lookup_insn): Delete buf and base_insn temps. Use insn_bytes_value and insn_int_value directly instead. Don't free allocated memory until function exit. 2017-02-10 Nicholas Piggin * ppc-opc.c (powerpc_opcodes) : New mnemonics. 2017-02-03 Nick Clifton PR 21096 * aarch64-opc.c (print_register_list): Ensure that the register list index will fir into the tb buffer. (print_register_offset_address): Likewise. * tic6x-dis.c (print_insn_tic6x): Increase size of func_unit_buf. 2017-01-27 Alexis Deruell PR 21056 * tic6x-dis.c (print_insn_tic6x): Correct displaying of parallel instructions when the previous fetch packet ends with a 32-bit instruction. 2017-01-24 Dimitar Dimitrov * pru-opc.c: Remove vague reference to a future GDB port. 2017-01-20 Nick Clifton * po/ga.po: Updated Irish translation. 2017-01-18 Szabolcs Nagy * arm-dis.c (coprocessor_opcodes): Fix vcmla mask and disassembly. 2017-01-13 Yao Qi * m68k-dis.c (match_insn_m68k): Extend comments. Return -1 if FETCH_DATA returns 0. (m68k_scan_mask): Likewise. (print_insn_m68k): Update code to handle -1 return value. 2017-01-13 Yao Qi * m68k-dis.c (enum print_insn_arg_error): New. (NEXTBYTE): Replace -3 with PRINT_INSN_ARG_MEMORY_ERROR. (NEXTULONG): Likewise. (NEXTSINGLE): Likewise. (NEXTDOUBLE): Likewise. (NEXTDOUBLE): Likewise. (NEXTPACKED): Likewise. (FETCH_ARG): Likewise. (FETCH_DATA): Update comments. (print_insn_arg): Update comments. Replace magic numbers with enum. (match_insn_m68k): Likewise. 2017-01-12 Igor Tsimbalist * i386-dis.c (enum): Add PREFIX_EVEX_0F3855, EVEX_W_0F3855_P_2. * i386-dis-evex.h (evex_table): Updated. * i386-gen.c (cpu_flag_init): Add CPU_AVX512_VPOPCNTDQ_FLAGS, CPU_ANY_AVX512_VPOPCNTDQ_FLAGS. Update CPU_ANY_AVX512F_FLAGS. (cpu_flags): Add CpuAVX512_VPOPCNTDQ. * i386-opc.h (enum): (AVX512_VPOPCNTDQ): New. (i386_cpu_flags): Add cpuavx512_vpopcntdq. * i386-opc.tbl: Add Intel AVX512_VPOPCNTDQ instructions. * i386-init.h: Regenerate. * i386-tbl.h: Ditto. 2017-01-12 Yao Qi * msp430-dis.c (msp430_singleoperand): Return -1 if msp430dis_opcode_signed returns false. (msp430_doubleoperand): Likewise. (msp430_branchinstr): Return -1 if msp430dis_opcode_unsigned returns false. (msp430x_calla_instr): Likewise. (print_insn_msp430): Likewise. 2017-01-05 Nick Clifton PR 20946 * frv-desc.c (lookup_mach_via_bfd_name): Return NULL if the name could not be matched. (frv_cgen_cpu_open): Allow for lookup_mach_via_bfd_name returning NULL. 2017-01-04 Szabolcs Nagy * aarch64-tbl.h (RCPC, RCPC_INSN): Define. (aarch64_opcode_table): Use RCPC_INSN. 2017-01-03 Kito Cheng * riscv-opc.c (riscv-opcodes): Add support for the "q" ISA extension. * riscv-opcodes/all-opcodes: Likewise. 2017-01-03 Dilyan Palauzov * riscv-dis.c (print_insn_args): Add fall through comment. 2017-01-03 Nick Clifton * po/sr.po: New Serbian translation. * configure.ac (ALL_LINGUAS): Add sr. * configure: Regenerate. 2017-01-02 Alan Modra * epiphany-desc.h: Regenerate. * epiphany-opc.h: Regenerate. * fr30-desc.h: Regenerate. * fr30-opc.h: Regenerate. * frv-desc.h: Regenerate. * frv-opc.h: Regenerate. * ip2k-desc.h: Regenerate. * ip2k-opc.h: Regenerate. * iq2000-desc.h: Regenerate. * iq2000-opc.h: Regenerate. * lm32-desc.h: Regenerate. * lm32-opc.h: Regenerate. * m32c-desc.h: Regenerate. * m32c-opc.h: Regenerate. * m32r-desc.h: Regenerate. * m32r-opc.h: Regenerate. * mep-desc.h: Regenerate. * mep-opc.h: Regenerate. * mt-desc.h: Regenerate. * mt-opc.h: Regenerate. * or1k-desc.h: Regenerate. * or1k-opc.h: Regenerate. * xc16x-desc.h: Regenerate. * xc16x-opc.h: Regenerate. * xstormy16-desc.h: Regenerate. * xstormy16-opc.h: Regenerate. 2017-01-02 Alan Modra Update year range in copyright notice of all files. For older changes see ChangeLog-2016 Copyright (C) 2017 Free Software Foundation, Inc. Copying and distribution of this file, with or without modification, are permitted in any medium without royalty provided the copyright notice and this notice are preserved. Local Variables: mode: change-log left-margin: 8 fill-column: 74 version-control: never End: