From 187d3d28e20b10b698edf77b54518c27a8c083f2 Mon Sep 17 00:00:00 2001 From: Jerome Guitton Date: Mon, 7 Mar 2005 11:09:05 +0000 Subject: 2005-03-07 Jerome Guitton * sim/erc32/float.c (set_fsr): Do not use deprecated multi-line strings. (clear_accex): Ditto. * sim/erc32/interf.c: Remove the redeclaration of fprintf. * sim/erc32/sis.c: Ditto. * sim/erc32/exec.c: Add missing semicolon. * sim/erc32/func.c: Remove definitions of generic_print_address, generic_symbol_at_address, buffer_read_memory and perror_memory, as they are already defined in opcodes/dis-buf.c. --- sim/erc32/ChangeLog | 12 ++++++ sim/erc32/exec.c | 2 + sim/erc32/float.c | 122 ++++++++++++++++++++++++++-------------------------- sim/erc32/func.c | 43 ------------------ sim/erc32/interf.c | 4 -- sim/erc32/sis.c | 4 -- 6 files changed, 75 insertions(+), 112 deletions(-) (limited to 'sim') diff --git a/sim/erc32/ChangeLog b/sim/erc32/ChangeLog index 02e0d42..586feb6 100644 --- a/sim/erc32/ChangeLog +++ b/sim/erc32/ChangeLog @@ -1,3 +1,15 @@ +2005-03-07 Jerome Guitton + + * sim/erc32/float.c (set_fsr): Do not use deprecated multi-line + strings. + (clear_accex): Ditto. + * sim/erc32/interf.c: Remove the redeclaration of fprintf. + * sim/erc32/sis.c: Ditto. + * sim/erc32/exec.c: Add missing semicolon. + * sim/erc32/func.c: Remove definitions of generic_print_address, + generic_symbol_at_address, buffer_read_memory and perror_memory, as + they are already defined in opcodes/dis-buf.c. + 2005-01-14 Andrew Cagney * configure.ac: Sinclude aclocal.m4 before common.m4. Add diff --git a/sim/erc32/exec.c b/sim/erc32/exec.c index 5f1fc0c..c9765d9 100644 --- a/sim/erc32/exec.c +++ b/sim/erc32/exec.c @@ -1713,6 +1713,7 @@ fpexec(op3, rd, rs1, rs2, sregs) sregs->fdp[rs2 | 1] = sregs->fs[rs2 & ~1]; sregs->fdp[rs2 & ~1] = sregs->fs[rs2 | 1]; default: + ; } #endif @@ -1885,6 +1886,7 @@ fpexec(op3, rd, rs1, rs2, sregs) sregs->fs[rd & ~1] = sregs->fdp[rd | 1]; sregs->fs[rd | 1] = sregs->fdp[rd & ~1]; default: + ; } #endif if (sregs->fpstate == FP_EXC_PE) { diff --git a/sim/erc32/float.c b/sim/erc32/float.c index fe2f41e..6f1e8a2 100644 --- a/sim/erc32/float.c +++ b/sim/erc32/float.c @@ -67,11 +67,11 @@ clear_accex() #ifdef sparc set_fsr((_get_fsr_raw() & ~0x3e0)); #elif i386 - asm(" -.text - fnclex - - "); + asm("\n" +".text\n" +" fnclex\n" +"\n" +" "); #else #warning no fpu trap support for this target #endif @@ -108,65 +108,65 @@ uint32 fsr; #ifdef sparc - asm(" - -.text - .align 4 - .global __set_fsr_raw,_set_fsr_raw -__set_fsr_raw: -_set_fsr_raw: - save %sp,-104,%sp - st %i0,[%fp+68] - ld [%fp+68], %fsr - mov 0,%i0 - ret - restore - - .align 4 - .global __get_fsr_raw - .global _get_fsr_raw -__get_fsr_raw: -_get_fsr_raw: - save %sp,-104,%sp - st %fsr,[%fp+68] - ld [%fp+68], %i0 - ret - restore - - "); + asm("\n" +"\n" +".text\n" +" .align 4\n" +" .global __set_fsr_raw,_set_fsr_raw\n" +"__set_fsr_raw:\n" +"_set_fsr_raw:\n" +" save %sp,-104,%sp\n" +" st %i0,[%fp+68]\n" +" ld [%fp+68], %fsr\n" +" mov 0,%i0\n" +" ret\n" +" restore\n" +"\n" +" .align 4\n" +" .global __get_fsr_raw\n" +" .global _get_fsr_raw\n" +"__get_fsr_raw:\n" +"_get_fsr_raw:\n" +" save %sp,-104,%sp\n" +" st %fsr,[%fp+68]\n" +" ld [%fp+68], %i0\n" +" ret\n" +" restore\n" +"\n" +" "); #elif i386 - asm(" - -.text - .align 8 -.globl _get_sw,__get_sw -__get_sw: -_get_sw: - pushl %ebp - movl %esp,%ebp - movl $0,%eax - fnstsw %ax - movl %ebp,%esp - popl %ebp - ret - - .align 8 -.globl _get_cw,__get_cw -__get_cw: -_get_cw: - pushl %ebp - movl %esp,%ebp - subw $2,%esp - fnstcw -2(%ebp) - movw -2(%ebp),%eax - movl %ebp,%esp - popl %ebp - ret - - - "); + asm("\n" +"\n" +".text\n" +" .align 8\n" +".globl _get_sw,__get_sw\n" +"__get_sw:\n" +"_get_sw:\n" +" pushl %ebp\n" +" movl %esp,%ebp\n" +" movl $0,%eax\n" +" fnstsw %ax\n" +" movl %ebp,%esp\n" +" popl %ebp\n" +" ret\n" +"\n" +" .align 8\n" +".globl _get_cw,__get_cw\n" +"__get_cw:\n" +"_get_cw:\n" +" pushl %ebp\n" +" movl %esp,%ebp\n" +" subw $2,%esp\n" +" fnstcw -2(%ebp)\n" +" movw -2(%ebp),%eax\n" +" movl %ebp,%esp\n" +" popl %ebp\n" +" ret\n" +"\n" +"\n" +" "); #else diff --git a/sim/erc32/func.c b/sim/erc32/func.c index 7691e32..878d4b2 100644 --- a/sim/erc32/func.c +++ b/sim/erc32/func.c @@ -827,49 +827,6 @@ dis_mem(addr, len, info) } } -int -buffer_read_memory(addr, buffer, size, info) - bfd_vma addr; - bfd_byte *buffer; - uint32 size; - struct disassemble_info *info; -{ - if (size == sis_memory_read(addr, buffer, size)) - return (0); - else - return (1); -} - -void -perror_memory(status, addr, info) - int32 status; - bfd_vma addr; - struct disassemble_info *info; -{ - - printf("Could not read address 0x%08x\n", (unsigned int) addr); -} - -void -generic_print_address(addr, info) - bfd_vma addr; - struct disassemble_info *info; -{ - - printf("0x%x", (unsigned int) addr); -} - -/* Just return the given address. */ - -int -generic_symbol_at_address (addr, info) - bfd_vma addr; - struct disassemble_info * info; -{ - return 1; -} - - /* Add event to event queue */ void diff --git a/sim/erc32/interf.c b/sim/erc32/interf.c index ec8ca22..3d53574 100644 --- a/sim/erc32/interf.c +++ b/sim/erc32/interf.c @@ -34,10 +34,6 @@ #include "gdb/remote-sim.h" -#ifndef fprintf -extern fprintf(); -#endif - #define PSR_CWP 0x7 #define VAL(x) strtol(x,(char **)NULL,0) diff --git a/sim/erc32/sis.c b/sim/erc32/sis.c index 7567881..0bed197 100644 --- a/sim/erc32/sis.c +++ b/sim/erc32/sis.c @@ -33,10 +33,6 @@ #include #include "sim-config.h" -#ifndef fprintf -extern fprintf(); -#endif - #define VAL(x) strtol(x,(char **)NULL,0) /* Structures and functions from readline library */ -- cgit v1.1