From 13b6dd6f68d9eb79f9d3dbe730ec1b6aa9bef737 Mon Sep 17 00:00:00 2001 From: Alexandre Oliva Date: Tue, 4 Jul 2000 06:39:39 +0000 Subject: * armemu.c (LoadSMult): Use WriteR15() to discard the least significant bits of PC. --- sim/arm/ChangeLog | 3 +++ sim/arm/armemu.c | 4 ++-- 2 files changed, 5 insertions(+), 2 deletions(-) (limited to 'sim') diff --git a/sim/arm/ChangeLog b/sim/arm/ChangeLog index 526b49d..06345b2 100644 --- a/sim/arm/ChangeLog +++ b/sim/arm/ChangeLog @@ -1,5 +1,8 @@ 2000-07-04 Alexandre Oliva + * armemu.c (LoadSMult): Use WriteR15() to discard the least + significant bits of PC. + * armemu.h (WRITEDESTB): New macro. * armemu.c (ARMul_Emulate26, bl): Use WriteR15Branch() to modify PC. Moved the existing logic... diff --git a/sim/arm/armemu.c b/sim/arm/armemu.c index 2fc0eda..43cd6dc 100644 --- a/sim/arm/armemu.c +++ b/sim/arm/armemu.c @@ -3544,7 +3544,7 @@ LoadSMult (ARMul_State * state, ARMword instr, state->Cpsr = GETSPSR (state->Bank); ARMul_CPSRAltered (state); } - state->Reg[15] = PC; + WriteR15 (state, PC); #else if (state->Mode == USER26MODE || state->Mode == USER32MODE) { /* protect bits in user mode */ @@ -3555,8 +3555,8 @@ LoadSMult (ARMul_State * state, ARMword instr, } else ARMul_R15Altered (state); -#endif FLUSHPIPE; +#endif } if (!BIT (15) && state->Mode != USER26MODE && state->Mode != USER32MODE) -- cgit v1.1