From 66d055c75479e0c51745fc3b40faec6df7a01620 Mon Sep 17 00:00:00 2001 From: Mike Frysinger Date: Fri, 23 Apr 2021 16:24:27 -0400 Subject: sim: enable hardware support by default Force this on for all ports. We have a few common models that can be used, so make them generally available. If the port doesn't use any hardware (the default), then behavior is unchanged. --- sim/riscv/ChangeLog | 4 ++ sim/riscv/aclocal.m4 | 1 + sim/riscv/config.in | 6 +++ sim/riscv/configure | 114 ++++++++++++++++++++++++++++++++++++++++++++++++--- 4 files changed, 120 insertions(+), 5 deletions(-) (limited to 'sim/riscv') diff --git a/sim/riscv/ChangeLog b/sim/riscv/ChangeLog index 90abdf9..0993913 100644 --- a/sim/riscv/ChangeLog +++ b/sim/riscv/ChangeLog @@ -1,3 +1,7 @@ +2021-04-26 Mike Frysinger + + * aclocal.m4, config.in, configure: Regenerate. + 2021-04-22 Tom Tromey * configure, config.in: Rebuild. diff --git a/sim/riscv/aclocal.m4 b/sim/riscv/aclocal.m4 index bc1ef46..9710f3f 100644 --- a/sim/riscv/aclocal.m4 +++ b/sim/riscv/aclocal.m4 @@ -117,6 +117,7 @@ m4_include([../m4/sim_ac_option_bitsize.m4]) m4_include([../m4/sim_ac_option_default_model.m4]) m4_include([../m4/sim_ac_option_endian.m4]) m4_include([../m4/sim_ac_option_environment.m4]) +m4_include([../m4/sim_ac_option_hardware.m4]) m4_include([../m4/sim_ac_option_inline.m4]) m4_include([../m4/sim_ac_option_warnings.m4]) m4_include([../m4/sim_ac_output.m4]) diff --git a/sim/riscv/config.in b/sim/riscv/config.in index 2416b7f..8d37b72 100644 --- a/sim/riscv/config.in +++ b/sim/riscv/config.in @@ -13,6 +13,9 @@ /* Define to 1 if you have the header file. */ #undef HAVE_DLFCN_H +/* Define if dv-sockser is usable. */ +#undef HAVE_DV_SOCKSER + /* Define to 1 if you have the header file. */ #undef HAVE_FCNTL_H @@ -28,6 +31,9 @@ /* Define to 1 if you have the header file. */ #undef HAVE_INTTYPES_H +/* Define to 1 if you have the `m' library (-lm). */ +#undef HAVE_LIBM + /* Define to 1 if you have the `nsl' library (-lnsl). */ #undef HAVE_LIBNSL diff --git a/sim/riscv/configure b/sim/riscv/configure index 29f0c4ca..96f4fff 100755 --- a/sim/riscv/configure +++ b/sim/riscv/configure @@ -634,9 +634,6 @@ ac_func_list= ac_subst_vars='LTLIBOBJS LIBOBJS sim_reserved_bits -sim_hw -sim_hw_objs -sim_hw_cflags sim_scache sim_float cgen_breaks @@ -755,6 +752,9 @@ SHELL WERROR_CFLAGS WARN_CFLAGS sim_inline +sim_hw +sim_hw_objs +sim_hw_cflags sim_endian sim_default_model sim_bitsize @@ -787,6 +787,7 @@ enable_build_warnings enable_sim_build_warnings enable_sim_default_model enable_sim_bitsize +enable_sim_hardware ' ac_precious_vars='build_alias host_alias @@ -1449,6 +1450,8 @@ Optional Features: --enable-sim-default-model=model Specify default model to simulate --enable-sim-bitsize=N Specify target bitsize (32 or 64) + --enable-sim-hardware=LIST + Specify the hardware to be included in the build. Optional Packages: --with-PACKAGE[=ARG] use PACKAGE [ARG=yes] @@ -11188,7 +11191,7 @@ else lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2 lt_status=$lt_dlunknown cat > conftest.$ac_ext <<_LT_EOF -#line 11191 "configure" +#line 11194 "configure" #include "confdefs.h" #if HAVE_DLFCN_H @@ -11294,7 +11297,7 @@ else lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2 lt_status=$lt_dlunknown cat > conftest.$ac_ext <<_LT_EOF -#line 11297 "configure" +#line 11300 "configure" #include "confdefs.h" #if HAVE_DLFCN_H @@ -12146,6 +12149,107 @@ fi +hardware="cfi core pal glue " +sim_hw_cflags="-DWITH_HW=1" +sim_hw="$hardware" +sim_hw_objs="\$(SIM_COMMON_HW_OBJS) `echo $sim_hw | sed -e 's/\([^ ][^ ]*\)/dv-\1.o/g'`" + +# Check whether --enable-sim-hardware was given. +if test "${enable_sim_hardware+set}" = set; then : + enableval=$enable_sim_hardware; +else + enable_sim_hardware="yes" +fi + +case ${enable_sim_hardware} in + yes|no) ;; + ,*) hardware="${hardware} `echo ${enableval} | sed -e 's/,/ /'`";; + *,) hardware="`echo ${enableval} | sed -e 's/,/ /'` ${hardware}";; + *) hardware="`echo ${enableval} | sed -e 's/,/ /'`"'';; +esac + +if test "$enable_sim_hardware" = no; then + sim_hw_objs= + sim_hw_cflags="-DWITH_HW=0" + sim_hw= +else + sim_hw_cflags="-DWITH_HW=1" + # remove duplicates + sim_hw="" + sim_hw_objs="\$(SIM_COMMON_HW_OBJS)" + for i in $hardware ; do + case " $sim_hw " in + *" $i "*) ;; + *) sim_hw="$sim_hw $i" ; sim_hw_objs="$sim_hw_objs dv-$i.o";; + esac + done + # mingw does not support sockser + case ${host} in + *mingw*) ;; + *) # TODO: We don't add dv-sockser to sim_hw as it is not a "real" device + # that you instatiate. Instead, other code will call into it directly. + # At some point, we should convert it over. + sim_hw_objs="$sim_hw_objs dv-sockser.o" + +cat >>confdefs.h <<_ACEOF +#define HAVE_DV_SOCKSER 1 +_ACEOF + + ;; + esac + if test x"$silent" != x"yes"; then + echo "Setting hardware to $sim_hw_cflags, $sim_hw, $sim_hw_objs" + fi + case " $hardware " in + *" cfi "*) { $as_echo "$as_me:${as_lineno-$LINENO}: checking for log2 in -lm" >&5 +$as_echo_n "checking for log2 in -lm... " >&6; } +if ${ac_cv_lib_m_log2+:} false; then : + $as_echo_n "(cached) " >&6 +else + ac_check_lib_save_LIBS=$LIBS +LIBS="-lm $LIBS" +cat confdefs.h - <<_ACEOF >conftest.$ac_ext +/* end confdefs.h. */ + +/* Override any GCC internal prototype to avoid an error. + Use char because int might match the return type of a GCC + builtin and then its argument prototype would still apply. */ +#ifdef __cplusplus +extern "C" +#endif +char log2 (); +int +main () +{ +return log2 (); + ; + return 0; +} +_ACEOF +if ac_fn_c_try_link "$LINENO"; then : + ac_cv_lib_m_log2=yes +else + ac_cv_lib_m_log2=no +fi +rm -f core conftest.err conftest.$ac_objext \ + conftest$ac_exeext conftest.$ac_ext +LIBS=$ac_check_lib_save_LIBS +fi +{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_cv_lib_m_log2" >&5 +$as_echo "$ac_cv_lib_m_log2" >&6; } +if test "x$ac_cv_lib_m_log2" = xyes; then : + cat >>confdefs.h <<_ACEOF +#define HAVE_LIBM 1 +_ACEOF + + LIBS="-lm $LIBS" + +fi +;; + esac +fi + + cgen_breaks="" if grep CGEN_MAINT $srcdir/Makefile.in >/dev/null; then cgen_breaks="break cgen_rtx_error"; -- cgit v1.1