From 95e40d770e95c0d5317c2566a7976bd3421f380a Mon Sep 17 00:00:00 2001
From: Mike Frysinger <vapier@gentoo.org>
Date: Mon, 6 Dec 2021 02:42:00 -0500
Subject: sim: ppc: migrate to standard uintXX_t types

Drop the sim-specific unsignedXX types and move to the standard uintXX_t
types that C11 provides.
---
 sim/ppc/e500_expression.h | 24 ++++++++++++------------
 1 file changed, 12 insertions(+), 12 deletions(-)

(limited to 'sim/ppc/e500_expression.h')

diff --git a/sim/ppc/e500_expression.h b/sim/ppc/e500_expression.h
index 81b834c..1a27bb1 100644
--- a/sim/ppc/e500_expression.h
+++ b/sim/ppc/e500_expression.h
@@ -28,7 +28,7 @@
 #define EV_SET_REG4_ACC(sh, sl, h0, h1, h2, h3) do { \
 	(sh) = (((h0) & 0xffff) << 16) | ((h1) & 0xffff); \
 	(sl) = (((h2) & 0xffff) << 16) | ((h3) & 0xffff); \
-	ACC = ((unsigned64)(sh) << 32) | (sl & 0xffffffff); \
+	ACC = ((uint64_t)(sh) << 32) | (sl & 0xffffffff); \
 } while (0)
 
 #define EV_SET_REG2(sh, sl, dh, dl) do { \
@@ -38,15 +38,15 @@
 #define EV_SET_REG2_ACC(sh, sl, dh, dl) do { \
 	(sh) = (dh) & 0xffffffff; \
 	(sl) = (dl) & 0xffffffff; \
-	ACC = ((unsigned64)(sh) << 32) | ((sl) & 0xffffffff); \
+	ACC = ((uint64_t)(sh) << 32) | ((sl) & 0xffffffff); \
 } while (0)
 
 #define EV_SET_REG1(sh, sl, d) do { \
-	(sh) = ((unsigned64)(d) >> 32) & 0xffffffff; \
+	(sh) = ((uint64_t)(d) >> 32) & 0xffffffff; \
 	(sl) = (d) & 0xffffffff; \
 } while (0)
 #define EV_SET_REG1_ACC(sh, sl, d) do { \
-	(sh) = ((unsigned64)(d) >> 32) & 0xffffffff; \
+	(sh) = ((uint64_t)(d) >> 32) & 0xffffffff; \
 	(sl) = (d) & 0xffffffff; \
 	ACC = (d); \
 } while (0)
@@ -56,12 +56,12 @@
 } while (0)
 
 /* get the low or high half word of a word */
-#define EV_LOHALF(x)	((unsigned32)(x) & 0xffff)
-#define EV_HIHALF(x)	(((unsigned32)(x) >> 16) & 0xffff)
+#define EV_LOHALF(x)	((uint32_t)(x) & 0xffff)
+#define EV_HIHALF(x)	(((uint32_t)(x) >> 16) & 0xffff)
 
 /* partially visible accumulator accessors */
 #define EV_SET_ACC(rh, rl) \
-	ACC = ((unsigned64)(rh) << 32) | ((rl) & 0xffffffff)
+	ACC = ((uint64_t)(rh) << 32) | ((rl) & 0xffffffff)
 
 #define EV_ACCLOW	(ACC & 0xffffffff)
 #define EV_ACCHIGH	((ACC >> 32) & 0xffffffff)
@@ -86,11 +86,11 @@
 		| (((x) & 0x8000) >> 15)
 
 /* saturation helpers */
-#define EV_MUL16_SSF(a,b)	((signed64)((signed32)(signed16)(a) * (signed32)(signed16)(b)) << 1)
+#define EV_MUL16_SSF(a,b)	((int64_t)((int32_t)(int16_t)(a) * (int32_t)(int16_t)(b)) << 1)
 /* this one loses the top sign bit; be careful */
-#define EV_MUL32_SSF(a,b)	(((signed64)(signed32)(a) * (signed64)(signed32)(b)) << 1)
-#define EV_SAT_P_S32(x)		((((signed64)(x)) < -0x80000000LL) || (((signed64)(x)) > 0x7fffffffLL))
-#define EV_SAT_P_U32(x)		((((signed64)(x)) < -0LL) || (((signed64)(x)) > 0xffffffffLL))
+#define EV_MUL32_SSF(a,b)	(((int64_t)(int32_t)(a) * (int64_t)(int32_t)(b)) << 1)
+#define EV_SAT_P_S32(x)		((((int64_t)(x)) < -0x80000000LL) || (((int64_t)(x)) > 0x7fffffffLL))
+#define EV_SAT_P_U32(x)		((((int64_t)(x)) < -0LL) || (((int64_t)(x)) > 0xffffffffLL))
 
 #define EV_SATURATE(flag, sat_val, val) \
 	((flag) ? (sat_val) : (val))
@@ -116,7 +116,7 @@
   EV_SET_SPEFSCR(SPREG(spr_spefscr) | (s))
 
 #define EV_SET_SPEFSCR_OV(l,h) do { \
-	unsigned32 _sPefScR = SPREG(spr_spefscr); \
+	uint32_t _sPefScR = SPREG(spr_spefscr); \
 	if (l) \
 	  _sPefScR |= spefscr_ov | spefscr_sov; \
 	else \
-- 
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