From e1211e55062594679697d2175b7ea77dad173823 Mon Sep 17 00:00:00 2001 From: Mike Frysinger Date: Wed, 30 Dec 2015 03:28:45 -0500 Subject: sim: arm/d10v/h8300/m68hc11/microblaze/mips/mn10300/moxie/sh/v850: convert to common sim_{fetch,store}_register --- sim/mn10300/interp.c | 19 +++++++++---------- 1 file changed, 9 insertions(+), 10 deletions(-) (limited to 'sim/mn10300/interp.c') diff --git a/sim/mn10300/interp.c b/sim/mn10300/interp.c index 4940acc..8550c45 100644 --- a/sim/mn10300/interp.c +++ b/sim/mn10300/interp.c @@ -86,6 +86,9 @@ mn10300_pc_set (sim_cpu *cpu, sim_cia pc) PC = pc; } +static int mn10300_reg_fetch (SIM_CPU *, int, unsigned char *, int); +static int mn10300_reg_store (SIM_CPU *, int, unsigned char *, int); + /* These default values correspond to expected usage for the chip. */ SIM_DESC @@ -308,6 +311,8 @@ sim_open (SIM_OPEN_KIND kind, { SIM_CPU *cpu = STATE_CPU (sd, i); + CPU_REG_FETCH (cpu) = mn10300_reg_fetch; + CPU_REG_STORE (cpu) = mn10300_reg_store; CPU_PC_FETCH (cpu) = mn10300_pc_get; CPU_PC_STORE (cpu) = mn10300_pc_set; } @@ -338,11 +343,8 @@ sim_create_inferior (SIM_DESC sd, /* FIXME These would more efficient to use than load_mem/store_mem, but need to be changed to use the memory map. */ -int -sim_fetch_register (SIM_DESC sd, - int rn, - unsigned char *memory, - int length) +static int +mn10300_reg_fetch (SIM_CPU *cpu, int rn, unsigned char *memory, int length) { reg_t reg = State.regs[rn]; uint8 *a = memory; @@ -353,11 +355,8 @@ sim_fetch_register (SIM_DESC sd, return length; } -int -sim_store_register (SIM_DESC sd, - int rn, - unsigned char *memory, - int length) +static int +mn10300_reg_store (SIM_CPU *cpu, int rn, unsigned char *memory, int length) { uint8 *a = memory; State.regs[rn] = (a[3] << 24) + (a[2] << 16) + (a[1] << 8) + a[0]; -- cgit v1.1