From 82f728dbb8c6170c01f938b09076fb0992accbf1 Mon Sep 17 00:00:00 2001
From: Chris Demetriou <cgd@google.com>
Date: Fri, 8 Mar 2002 00:37:14 +0000
Subject: 2002-03-07  Chris Demetriou  <cgd@broadcom.com>

        * mips.igen (BREAK, LUI, ORI, SYSCALL, XORI): Print
        immediate or code as a hex value with the "%#lx" format.
        (ANDI): Likewise, and fix printed instruction name.
---
 sim/mips/ChangeLog |  6 ++++++
 sim/mips/mips.igen | 12 ++++++------
 2 files changed, 12 insertions(+), 6 deletions(-)

(limited to 'sim/mips')

diff --git a/sim/mips/ChangeLog b/sim/mips/ChangeLog
index 1a37721..26e49b6 100644
--- a/sim/mips/ChangeLog
+++ b/sim/mips/ChangeLog
@@ -1,3 +1,9 @@
+2002-03-07  Chris Demetriou  <cgd@broadcom.com>
+
+	* mips.igen (BREAK, LUI, ORI, SYSCALL, XORI): Print
+	immediate or code as a hex value with the "%#lx" format.
+	(ANDI): Likewise, and fix printed instruction name.
+
 2002-03-05  Chris Demetriou  <cgd@broadcom.com>
 
 	* sim-main.h (UndefinedResult, Unpredictable): New macros
diff --git a/sim/mips/mips.igen b/sim/mips/mips.igen
index d1a3f1a..d8d4dfa 100644
--- a/sim/mips/mips.igen
+++ b/sim/mips/mips.igen
@@ -408,7 +408,7 @@
 
 
 001100,5.RS,5.RT,16.IMMEDIATE:NORMAL:32::ANDI
-"and r<RT>, r<RS>, <IMMEDIATE>"
+"andi r<RT>, r<RS>, %#lx<IMMEDIATE>"
 *mipsI:
 *mipsII:
 *mipsIII:
@@ -800,7 +800,7 @@
 
 
 000000,20.CODE,001101:SPECIAL:32::BREAK
-"break <CODE>"
+"break %#lx<CODE>"
 *mipsI:
 *mipsII:
 *mipsIII:
@@ -1775,7 +1775,7 @@
 
 
 001111,00000,5.RT,16.IMMEDIATE:NORMAL:32::LUI
-"lui r<RT>, <IMMEDIATE>"
+"lui r<RT>, %#lx<IMMEDIATE>"
 *mipsI:
 *mipsII:
 *mipsIII:
@@ -2096,7 +2096,7 @@
 }
 
 001101,5.RS,5.RT,16.IMMEDIATE:NORMAL:32::ORI
-"ori r<RT>, r<RS>, <IMMEDIATE>"
+"ori r<RT>, r<RS>, %#lx<IMMEDIATE>"
 *mipsI:
 *mipsII:
 *mipsIII:
@@ -2736,7 +2736,7 @@
 
 
 000000,20.CODE,001100:SPECIAL:32::SYSCALL
-"syscall <CODE>"
+"syscall %#lx<CODE>"
 *mipsI:
 *mipsII:
 *mipsIII:
@@ -2948,7 +2948,7 @@
 }
 
 001110,5.RS,5.RT,16.IMMEDIATE:NORMAL:32::XORI
-"xori r<RT>, r<RS>, <IMMEDIATE>"
+"xori r<RT>, r<RS>, %#lx<IMMEDIATE>"
 *mipsI:
 *mipsII:
 *mipsIII:
-- 
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