From f23b768a5c29d6a233009281890598ae69e0434b Mon Sep 17 00:00:00 2001 From: Nick Clifton Date: Mon, 29 May 2000 19:26:48 +0000 Subject: replace GPR_SET with GPR_CLEAR --- sim/d30v/ChangeLog | 5 +++++ sim/d30v/cpu.h | 2 +- 2 files changed, 6 insertions(+), 1 deletion(-) (limited to 'sim/d30v') diff --git a/sim/d30v/ChangeLog b/sim/d30v/ChangeLog index 5ad574c..1845a45 100644 --- a/sim/d30v/ChangeLog +++ b/sim/d30v/ChangeLog @@ -2,6 +2,11 @@ Tue May 23 21:39:23 2000 Andrew Cagney * configure: Regenerated to track ../common/aclocal.m4 changes. +2000-04-12 Frank Ch. Eigler + + * cpu.h (GPR_CLEAR): New macro. + (GPR_SET): Removed macro. + Thu Sep 2 18:15:53 1999 Andrew Cagney * configure: Regenerated to track ../common/aclocal.m4 changes. diff --git a/sim/d30v/cpu.h b/sim/d30v/cpu.h index f848b61..56f749c 100644 --- a/sim/d30v/cpu.h +++ b/sim/d30v/cpu.h @@ -137,7 +137,7 @@ struct _sim_cpu { #define IBA (STATE_CPU (sd, 0)->regs.control[instruction_break_address_cr]) #define EIT_VB (STATE_CPU (sd, 0)->regs.control[eit_vector_base_cr]) #define GPR (STATE_CPU (sd, 0)->regs.general_purpose) -#define GPR_SET(N,VAL) (GPR[(N)] = (VAL)) +#define GPR_CLEAR(N) (GPR[(N)] = 0) #define ACC (STATE_CPU (sd, 0)->regs.accumulator) #define CREG (STATE_CPU (sd, 0)->regs.control) #define SP (GPR[STACK_POINTER_GPR]) -- cgit v1.1