From 1f20b1457b31ca6925063318467fec344a236de3 Mon Sep 17 00:00:00 2001 From: Mike Frysinger Date: Sat, 18 Jun 2011 22:03:10 +0000 Subject: sim: bfin: set ASTAT AV/AVS when shifting accumulators overflow The LSHIFT/ASHIFT insns that work with accumulators lacked AV/AVS handling in the ASTAT register, so add it to match the hardware. Signed-off-by: Robin Getz Signed-off-by: Mike Frysinger --- sim/bfin/bfin-sim.c | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'sim/bfin/bfin-sim.c') diff --git a/sim/bfin/bfin-sim.c b/sim/bfin/bfin-sim.c index dbfce6c..fe4dc26 100644 --- a/sim/bfin/bfin-sim.c +++ b/sim/bfin/bfin-sim.c @@ -5223,6 +5223,9 @@ decode_dsp32shift_0 (SIM_CPU *cpu, bu16 iw0, bu16 iw1) STORE (AXREG (HLs), (val >> 32) & 0xff); STORE (AWREG (HLs), (val & 0xffffffff)); + STORE (ASTATREG (av[HLs]), val == 0); + if (val == 0) + STORE (ASTATREG (avs[HLs]), 1); } else if (sop == 1 && sopcde == 3 && (HLs == 0 || HLs == 1)) { @@ -5240,6 +5243,9 @@ decode_dsp32shift_0 (SIM_CPU *cpu, bu16 iw0, bu16 iw1) STORE (AXREG (HLs), (val >> 32) & 0xff); STORE (AWREG (HLs), (val & 0xffffffff)); + STORE (ASTATREG (av[HLs]), val == 0); + if (val == 0) + STORE (ASTATREG (avs[HLs]), 1); } else if ((sop == 0 || sop == 1) && sopcde == 1) { -- cgit v1.1