From f6c1a2d592af15d02c7fc93390af3c803e74c4d9 Mon Sep 17 00:00:00 2001 From: Nick Clifton Date: Thu, 3 May 2012 13:12:08 +0000 Subject: Add support for Motorola XGATE embedded CPU --- opcodes/ChangeLog | 11 ++ opcodes/Makefile.am | 2 + opcodes/Makefile.in | 4 + opcodes/configure | 3 +- opcodes/configure.in | 3 +- opcodes/disassemble.c | 6 + opcodes/xgate-dis.c | 403 ++++++++++++++++++++++++++++++++++++++++++++++++++ opcodes/xgate-opc.c | 203 +++++++++++++++++++++++++ 8 files changed, 633 insertions(+), 2 deletions(-) create mode 100644 opcodes/xgate-dis.c create mode 100644 opcodes/xgate-opc.c (limited to 'opcodes') diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index 371d8f6..a43dd3d 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,3 +1,14 @@ +2012-05-03 Sean Keys + + * Makefile.in, configure: regenerate + * disassemble.c (disassembler): Recognize ARCH_XGATE. + * xgate-dis.c (read_memory, print_insn, print_insn_xgate): + New functions. + * configure.in: Recognize xgate. + * xgate-dis.c, xgate-opc.c: New files for support of xgate + * Makefile.am (CFILES, ALL_MACHINES): New files for disassembly + and opcode generation for xgate. + 2012-04-30 DJ Delorie * rx-decode.opc (MOV): Do not sign-extend immediates which are diff --git a/opcodes/Makefile.am b/opcodes/Makefile.am index b377c4d..a43aa0d 100644 --- a/opcodes/Makefile.am +++ b/opcodes/Makefile.am @@ -234,6 +234,8 @@ TARGET_LIBOPCODES_CFILES = \ xstormy16-ibld.c \ xstormy16-opc.c \ xtensa-dis.c \ + xgate-dis.c \ + xgate-opc.c \ z80-dis.c \ z8k-dis.c diff --git a/opcodes/Makefile.in b/opcodes/Makefile.in index 8ae4b84..f5035ea 100644 --- a/opcodes/Makefile.in +++ b/opcodes/Makefile.in @@ -504,6 +504,8 @@ TARGET_LIBOPCODES_CFILES = \ xstormy16-ibld.c \ xstormy16-opc.c \ xtensa-dis.c \ + xgate-dis.c \ + xgate-opc.c \ z80-dis.c \ z8k-dis.c @@ -884,6 +886,8 @@ distclean-compile: @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/xc16x-dis.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/xc16x-ibld.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/xc16x-opc.Plo@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/xgate-dis.Plo@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/xgate-opc.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/xstormy16-asm.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/xstormy16-desc.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/xstormy16-dis.Plo@am__quote@ diff --git a/opcodes/configure b/opcodes/configure index cc69060..ec74346 100755 --- a/opcodes/configure +++ b/opcodes/configure @@ -12492,7 +12492,8 @@ if test x${all_targets} = xfalse ; then bfd_vax_arch) ta="$ta vax-dis.lo" ;; bfd_w65_arch) ta="$ta w65-dis.lo" ;; bfd_we32k_arch) ;; - bfd_xc16x_arch) ta="$ta xc16x-asm.lo xc16x-desc.lo xc16x-dis.lo xc16x-ibld.lo xc16x-opc.lo" using_cgen=yes ;; + bfd_xc16x_arch) ta="$ta xc16x-asm.lo xc16x-desc.lo xc16x-dis.lo xc16x-ibld.lo xc16x-opc.lo" using_cgen=yes ;; + bfd_xgate_arch) ta="$ta xgate-dis.lo xgate-opc.lo" ;; bfd_xstormy16_arch) ta="$ta xstormy16-asm.lo xstormy16-desc.lo xstormy16-dis.lo xstormy16-ibld.lo xstormy16-opc.lo" using_cgen=yes ;; bfd_xtensa_arch) ta="$ta xtensa-dis.lo" ;; bfd_z80_arch) ta="$ta z80-dis.lo" ;; diff --git a/opcodes/configure.in b/opcodes/configure.in index 6da3ef1..999379a 100644 --- a/opcodes/configure.in +++ b/opcodes/configure.in @@ -306,7 +306,8 @@ if test x${all_targets} = xfalse ; then bfd_vax_arch) ta="$ta vax-dis.lo" ;; bfd_w65_arch) ta="$ta w65-dis.lo" ;; bfd_we32k_arch) ;; - bfd_xc16x_arch) ta="$ta xc16x-asm.lo xc16x-desc.lo xc16x-dis.lo xc16x-ibld.lo xc16x-opc.lo" using_cgen=yes ;; + bfd_xc16x_arch) ta="$ta xc16x-asm.lo xc16x-desc.lo xc16x-dis.lo xc16x-ibld.lo xc16x-opc.lo" using_cgen=yes ;; + bfd_xgate_arch) ta="$ta xgate-dis.lo xgate-opc.lo" ;; bfd_xstormy16_arch) ta="$ta xstormy16-asm.lo xstormy16-desc.lo xstormy16-dis.lo xstormy16-ibld.lo xstormy16-opc.lo" using_cgen=yes ;; bfd_xtensa_arch) ta="$ta xtensa-dis.lo" ;; bfd_z80_arch) ta="$ta z80-dis.lo" ;; diff --git a/opcodes/disassemble.c b/opcodes/disassemble.c index 43e1d53..7ff5f22 100644 --- a/opcodes/disassemble.c +++ b/opcodes/disassemble.c @@ -91,6 +91,7 @@ #define ARCH_w65 #define ARCH_xstormy16 #define ARCH_xc16x +#define ARCH_xgate #define ARCH_xtensa #define ARCH_z80 #define ARCH_z8k @@ -430,6 +431,11 @@ disassembler (abfd) disassemble = print_insn_w65; break; #endif +#ifdef ARCH_xgate + case bfd_arch_xgate: + disassemble = print_insn_xgate; + break; +#endif #ifdef ARCH_xstormy16 case bfd_arch_xstormy16: disassemble = print_insn_xstormy16; diff --git a/opcodes/xgate-dis.c b/opcodes/xgate-dis.c new file mode 100644 index 0000000..f703055 --- /dev/null +++ b/opcodes/xgate-dis.c @@ -0,0 +1,403 @@ +/* xgate-dis.c -- Freescale XGATE disassembly + Copyright 2009, 2010, 2011 + Free Software Foundation, Inc. + Written by Sean Keys (skeys@ipdatasys.com) + + This file is part of the GNU opcodes library. + + This library is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3, or (at your option) + any later version. + + It is distributed in the hope that it will be useful, but WITHOUT + ANY WARRANTY; without even the implied warranty of MERCHANTABILITY + or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public + License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, + MA 02110-1301, USA. +*/ + +#include +#include "sysdep.h" +#include "dis-asm.h" +#include "opintl.h" +#include "libiberty.h" +#include "ansidecl.h" +#include "opcode/xgate.h" + +#define XGATE_TWO_BYTES 0x02 +#define XGATE_NINE_BITS 0x1FF +#define XGATE_TEN_BITS 0x3FF +#define XGATE_NINE_SIGNBIT 0x100 +#define XGATE_TEN_SIGNBIT 0x200 + +/* Structures */ +struct decodeInfo { + unsigned int operMask; + unsigned int operMasksRegisterBits; + struct xgate_opcode *opcodePTR; +}; + +/* Prototypes for local functions. */ +static int +print_insn( bfd_vma, struct disassemble_info *); +static int +read_memory( bfd_vma, bfd_byte*, int, struct disassemble_info *); +static int +ripBits(unsigned int *, int, + struct xgate_opcode *, unsigned int); +int +macro_search(char *, char *); +struct decodeInfo * +find_match(unsigned int raw_code); + +/* statics */ +static struct decodeInfo *decodeTable; +static int initialized; +static char previousOpName[10]; +static unsigned int perviousBin; + +/* Disassemble one instruction at address 'memaddr'. Returns the number + of bytes used by that instruction. */ +static int +print_insn (bfd_vma memaddr, struct disassemble_info* info) +{ + int status; + unsigned int raw_code; + char *s = 0; + long bytesRead = 0; + int i = 0; + struct xgate_opcode *opcodePTR = (struct xgate_opcode*) xgate_opcodes; + struct decodeInfo *decodeTablePTR = 0; + struct decodeInfo *decodePTR = 0; + unsigned int operandRegisterBits = 0; + signed int relAddr = 0; + signed int operandOne = 0; + signed int operandTwo = 0; + bfd_byte buffer[4]; + bfd_vma absAddress; + + unsigned int operMaskReg = 0; + /* initialize our array of opcode masks and check them against our constant + table */ + if (!initialized) + { + decodeTable = xmalloc(sizeof(struct decodeInfo) * xgate_num_opcodes); + for (i = 0, decodeTablePTR = decodeTable; i < xgate_num_opcodes; + i++, decodeTablePTR++, opcodePTR++) + { + unsigned int bin = 0; + unsigned int mask = 0; + for (s = opcodePTR->format; *s; s++) + { + bin <<= 1; + mask <<= 1; + operandRegisterBits <<= 1; + bin |= (*s == '1'); + mask |= (*s == '0' || *s == '1'); + operandRegisterBits |= (*s == 'r'); + } + /* asserting will uncover inconsistencies in our table */ + assert( + (s - opcodePTR->format) == 16 || (s - opcodePTR->format) == 32); + assert(opcodePTR->bin_opcode == bin); + decodeTablePTR->operMask = mask; + decodeTablePTR->operMasksRegisterBits = operandRegisterBits; + decodeTablePTR->opcodePTR = opcodePTR; + } + initialized = 1; + } + /* read 16 bits */ + bytesRead += XGATE_TWO_BYTES; + status = read_memory(memaddr, buffer, XGATE_TWO_BYTES, info); + if (status == 0) + { + raw_code = buffer[0]; + raw_code <<= 8; + raw_code += buffer[1]; + + decodePTR = find_match(raw_code); + if (decodePTR) + { + operMaskReg = decodePTR->operMasksRegisterBits; + (*info->fprintf_func)(info->stream, "%s", decodePTR->opcodePTR->name); + /* First we compare the shorthand format of the constraints. If we + still are unable to pinpoint the operands + we analyze the opcodes constraint string. */ + switch (decodePTR->opcodePTR->sh_format) + { + case XG_R_C: + (*info->fprintf_func)(info->stream, " R%x, CCR", + (raw_code >> 8) & 0x7); + break; + case XG_C_R: + (*info->fprintf_func)(info->stream, " CCR, R%x", + (raw_code >> 8) & 0x7); + break; + case XG_R_P: + (*info->fprintf_func)(info->stream, " R%x, PC", + (raw_code >> 8) & 0x7); + break; + case XG_INH: + break; + case XG_R_R_R: + if (!strcmp(decodePTR->opcodePTR->constraints, XGATE_OP_TRI)) + { + (*info->fprintf_func)(info->stream, " R%x, R%x, R%x", + (raw_code >> 8) & 0x7, (raw_code >> 5) & 0x7, + (raw_code >> 2) & 0x7); + } + else if (!strcmp(decodePTR->opcodePTR->constraints, XGATE_OP_IDR)) + { + if (raw_code & 0x01) + { + (*info->fprintf_func)(info->stream, " R%x, (R%x, R%x+)", + (raw_code >> 8) & 0x7, (raw_code >> 5) & 0x7, + (raw_code >> 2) & 0x7); + } + else if (raw_code & 0x02) + { + (*info->fprintf_func)(info->stream, " R%x, (R%x, -R%x)", + (raw_code >> 8) & 0x7, (raw_code >> 5) & 0x7, + (raw_code >> 2) & 0x7); + } + else + { + (*info->fprintf_func)(info->stream, " R%x, (R%x, R%x)", + (raw_code >> 8) & 0x7, (raw_code >> 5) & 0x7, + (raw_code >> 2) & 0x7); + } + } + else + { + (*info->fprintf_func)(info->stream, " unhandled mode %s", + decodePTR->opcodePTR->constraints); + } + break; + case XG_R_R: + if (!strcmp(decodePTR->opcodePTR->constraints, XGATE_OP_DYA_MON)) + { + operandOne = ripBits(&operMaskReg, 3, decodePTR->opcodePTR, + raw_code); + operandTwo = ripBits(&operMaskReg, 3, decodePTR->opcodePTR, + raw_code); + (*info->fprintf_func)(info->stream, " R%x, R%x", operandOne, + operandTwo); + } + else if (!strcmp(decodePTR->opcodePTR->constraints, XGATE_OP_DYA)) + { + operandOne = ripBits(&operMaskReg, 3, opcodePTR, raw_code); + operandTwo = ripBits(&operMaskReg, 3, opcodePTR, raw_code); + (*info->fprintf_func)(info->stream, " R%x, R%x", operandOne, + operandTwo); + } + else + { + (*info->fprintf_func)(info->stream, " unhandled mode %s", + opcodePTR->constraints); + } + break; + case XG_R_R_I: + (*info->fprintf_func)(info->stream, " R%x, (R%x, #0x%x)", + (raw_code >> 8) & 0x7, (raw_code >> 5) & 0x7, raw_code & 0x1f); + break; + case XG_R: + operandOne = ripBits(&operMaskReg, 3, decodePTR->opcodePTR, + raw_code); + (*info->fprintf_func)(info->stream, " R%x", operandOne); + break; + case XG_I | XG_PCREL: + if (!strcmp(decodePTR->opcodePTR->constraints, XGATE_OP_REL9)) + { + /* if address is negative handle it accordingly */ + if (raw_code & XGATE_NINE_SIGNBIT) + { + relAddr = XGATE_NINE_BITS >> 1; /* clip sign bit */ + relAddr = ~relAddr; /* make signed */ + relAddr |= (raw_code & 0xFF) + 1; /* apply our value */ + relAddr <<= 1; /* multiply by two as per processor docs */ + } + else + { + relAddr = raw_code & 0xff; + relAddr = (relAddr << 1) + 2; + } + (*info->fprintf_func)(info->stream, " *%d", relAddr); + (*info->fprintf_func)(info->stream, " Abs* 0x"); + (*info->print_address_func)(memaddr + relAddr, info); + } + else if (!strcmp(decodePTR->opcodePTR->constraints, XGATE_OP_REL10)) + { + /* if address is negative handle it accordingly */ + if (raw_code & XGATE_TEN_SIGNBIT) + { + relAddr = XGATE_TEN_BITS >> 1; /* clip sign bit */ + relAddr = ~relAddr; /* make signed */ + relAddr |= (raw_code & 0x1FF) + 1; /* apply our value */ + relAddr <<= 1; /* multiply by two as per processor docs */ + } + else + { + relAddr = raw_code & 0x1FF; + relAddr = (relAddr << 1) + 2; + } + (*info->fprintf_func)(info->stream, " *%d", relAddr); + (*info->fprintf_func)(info->stream, " Abs* 0x"); + (*info->print_address_func)(memaddr + relAddr, info); + } + else + { + (*info->fprintf_func)(info->stream, + " Can't disassemble for mode) %s", + decodePTR->opcodePTR->constraints); + } + break; + case XG_R_I: + if (!strcmp(decodePTR->opcodePTR->constraints, XGATE_OP_IMM4)) + { + (*info->fprintf_func)(info->stream, " R%x, #0x%02x", + (raw_code >> 8) & 0x7, (raw_code >> 4) & 0xF); + } + else if (!strcmp(decodePTR->opcodePTR->constraints, XGATE_OP_IMM8)) + { + if (macro_search(decodePTR->opcodePTR->name, previousOpName) && + previousOpName[0]) + { + absAddress = (0xFF & raw_code) << 8; + absAddress |= perviousBin & 0xFF; + (*info->fprintf_func)(info->stream, " R%x, #0x%02x Abs* 0x", + (raw_code >> 8) & 0x7, raw_code & 0xff); + (*info->print_address_func)(absAddress, info); + previousOpName[0] = 0; + } + else + { + strcpy(previousOpName, decodePTR->opcodePTR->name); + (*info->fprintf_func)(info->stream, " R%x, #0x%02x", + (raw_code >> 8) & 0x7, raw_code & 0xff); + } + } + else + { + (*info->fprintf_func)(info->stream, + " Can't disassemble for mode %s", + decodePTR->opcodePTR->constraints); + } + break; + case XG_I: + (*info->fprintf_func)(info->stream, " #0x%x", + (raw_code >> 8) & 0x7); + break; + default: + (*info->fprintf_func)(info->stream, "address mode not found\t %x", + opcodePTR->bin_opcode); + break; + } + perviousBin = raw_code; + } + else + { + (*info->fprintf_func)(info->stream, + " unable to find opcode match #0%x", raw_code); + } + } + return bytesRead; +} + +int +print_insn_xgate (bfd_vma memaddr, struct disassemble_info* info) +{ + return print_insn (memaddr, info); +} + +static int +read_memory (bfd_vma memaddr, bfd_byte* buffer, int size, + struct disassemble_info* info) +{ + int status; + status = (*info->read_memory_func) (memaddr, buffer, size, info); + if (status != 0) + { + (*info->memory_error_func) (status, memaddr, info); + return -1; + } + return 0; +} + +static int +ripBits(unsigned int *operandBitsRemaining, int numBitsRequested, + struct xgate_opcode *opcodePTR, unsigned int memory) +{ + unsigned int currentBit; + int operand; + int numBitsFound; + for (operand = 0, numBitsFound = 0, currentBit = 1 + << ((opcodePTR->size * 8) - 1); + (numBitsFound < numBitsRequested) && currentBit; currentBit >>= 1) + { + if(currentBit & *operandBitsRemaining) { + *operandBitsRemaining &= ~(currentBit); /* consume the current bit */ + operand <<= 1; /* make room for our next bit */ + numBitsFound++; + operand |= (currentBit & memory) > 0; + } + } + return operand; +} + +int +macro_search(char *currentName, char *lastName) +{ + int i; + int length = 0; + char *where; + for (i = 0; i < xgate_num_opcodes; i++) + { + where = strstr(xgate_opcodes[i].constraints, lastName); + if (where) + { + length = strlen(where); + } + if (length) + { + where = strstr(xgate_opcodes[i].constraints, currentName); + if (where) + { + length = strlen(where); + return 1; + } + } + } + return 0; +} + +struct decodeInfo* +find_match(unsigned int raw_code) +{ + struct decodeInfo *decodeTablePTR = 0; + int i; + + for (i = 0, decodeTablePTR = decodeTable; i < xgate_num_opcodes; + i++, decodeTablePTR++) + { + if ((raw_code & decodeTablePTR->operMask) + == decodeTablePTR->opcodePTR->bin_opcode) + { + /* make sure we didn't run into a macro or alias */ + if (decodeTablePTR->opcodePTR->cycles_min != 0) + { + return decodeTablePTR; + break; + } + else + { + continue; + } + } + } + return 0; +} diff --git a/opcodes/xgate-opc.c b/opcodes/xgate-opc.c new file mode 100644 index 0000000..9b5fe07 --- /dev/null +++ b/opcodes/xgate-opc.c @@ -0,0 +1,203 @@ +/* mc9xgate-opc.c -- Freescale XGATE opcode list + Copyright 1999, 2000, 2002, 2005, 2007 Free Software Foundation, Inc. + Written by Sean Keys (skeys@ipdatasys.com) + + This file is part of the GNU opcodes library. + + This library is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3, or (at your option) + any later version. + + It is distributed in the hope that it will be useful, but WITHOUT + ANY WARRANTY; without even the implied warranty of MERCHANTABILITY + or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public + License for more details. + + You should have received a copy of the GNU General Public License + along with this file; see the file COPYING. If not, write to the + Free Software Foundation, 51 Franklin Street - Fifth Floor, Boston, + MA 02110-1301, USA. +*/ + +#include +#include "ansidecl.h" +#include "opcode/xgate.h" + +#define TABLE_SIZE(X) (sizeof(X) / sizeof(X[0])) + +/* Combination of CCR flags. */ +/* ORDER HI TO LOW NZVC */ +#define XGATE_NZ_BIT XGATE_N_BIT|XGATE_Z_BIT +#define XGATE_NV_BIT XGATE_N_BIT|XGATE_V_BIT +#define XGATE_NC_BIT XGATE_N_BIT|XGATE_C_BIT +#define XGATE_ZV_BIT XGATE_Z_BIT|XGATE_V_BIT +#define XGATE_ZC_BIT XGATE_Z_BIT|XGATE_C_BIT +#define XGATE_VC_BIT XGATE_V_BIT|XGATE_C_BIT +#define XGATE_NVC_BIT XGATE_NV_BIT|XGATE_C_BIT +#define XGATE_NZC_BIT XGATE_NZ_BIT|XGATE_C_BIT +#define XGATE_NZV_BIT XGATE_N_BIT|XGATE_Z_BIT|XGATE_V_BIT +#define XGATE_ZVC_BIT XGATE_VC_BIT|XGATE_Z_BIT +#define XGATE_NZVC_BIT XGATE_NZV_BIT|XGATE_C_BIT + +/* Flags when the insn only changes some CCR flags. */ +#define CHG_NONE 0,0,0 +#define CHG_Z 0,0,XGATE_Z_BIT +#define CHG_C 0,0,XGATE_C_BIT +#define CHG_ZVC 0,0,XGATE_ZVC_BIT +#define CHG_NZC 0,0,XGATE_NZC_BIT +#define CHG_NZV 0,0,XGATE_NZV_BIT +#define CHG_NZVC 0,0,(XGATE_NZVC_BIT) +#define CHG_HNZVC 0,0,XGATE_HNZVC_BIT // TODO DELETE +#define CHG_ALL 0,0,0xff + +/* The insn clears and changes some flags. */ +#define CLR_I 0,XG_I_BIT,0 +#define CLR_C 0,XGATE_C_BIT,0 +#define CLR_V 0,XGATE_V_BIT,0 +#define CLR_V_CHG_ZC 0,XGATE_V_BIT,XGATE_ZC_BIT +#define CLR_V_CHG_NZ 0,XGATE_V_BIT,XGATE_NZ_BIT +#define CLR_V_CHG_ZVC 0,XGATE_V_BIT,XGATE_ZVC_BIT +#define CLR_N_CHG_ZVC 0,XGATE_N_BIT,XGATE_ZVC_BIT /* Used by lsr */ +#define CLR_VC_CHG_NZ 0,XGATE_VC_BIT,XGATE_NZ_BIT + +/* The insn sets some flags. */ +#define SET_I XGATE_I_BIT,0,0 +#define SET_C XGATE_C_BIT,0,0 +#define SET_V XGATE_V_BIT,0,0 +#define SET_Z_CLR_NVC XGATE_Z_BIT,XGATE_NVC_BIT,0 +#define SET_C_CLR_V_CHG_NZ XGATE_C_BIT,XGATE_V_BIT,XGATE_NZ_BIT +#define SET_Z_CHG_HNVC XGATE_Z_BIT,0,XGATE_HNVC_BIT + +/* operand modes */ +#define OP_NONE XGATE_OP_NONE +#define OP_INH XGATE_OP_INH +#define OP_TRI XGATE_OP_TRI +#define OP_DYA XGATE_OP_DYA +#define OP_DM XGATE_OP_DYA_MON +#define OP_IMM3 XGATE_OP_IMM3 +#define OP_IMM4 XGATE_OP_IMM4 +#define OP_IMM8 XGATE_OP_IMM8 +#define OP_IMM16 XGATE_OP_IMM16 +#define OP_MON XGATE_OP_MON +#define OP_MON_R_C XGATE_OP_MON_R_C +#define OP_MON_C_R XGATE_OP_MON_C_R +#define OP_MON_R_P XGATE_OP_MON_R_P +#define OP_IDR XGATE_OP_IDR +#define OP_IDO5 XGATE_OP_IDO5 +#define OP_REL9 XGATE_OP_REL9 +#define OP_REL10 XGATE_OP_REL10 +/* macro operand modes */ +#define OP_mADD XGATE_OP_IMM16mADD +#define OP_mAND XGATE_OP_IMM16mAND +#define OP_mCPC XGATE_OP_IMM16mCPC +#define OP_mLDW XGATE_OP_IMM16mLDW +#define OP_mSUB XGATE_OP_IMM16mSUB + +#define ALL XGATE_V1|XGATE_V2|XGATE_V3 +#define XG_IP XG_I|XG_PCREL + +const struct xgate_opcode xgate_opcodes[] = { +/* Name -+ +-- CPU + Constraints --+ +------------ CCR changes + Format ----------------+ +---------------- Max # cycles + Short Hand Format-------------------------+ +------------------- Min # cycles + Size -----------------------------------------------+ +-------------------------- Opcode */ + { "adc", OP_TRI, "00011rrrrrrrrr11", XG_R_R_R, 2, 0x1803, 1, 1, CHG_NZVC, ALL}, + { "add", OP_TRI, "00011rrrrrrrrr10", XG_R_R_R, 2, 0x1802, 1, 1, CHG_NZVC, ALL}, + { "addh", OP_IMM8, "11101rrriiiiiiii", XG_R_I, 2, 0xE800, 1, 1, CHG_NZVC, ALL}, + { "addl", OP_IMM8, "11100rrriiiiiiii", XG_R_I, 2, 0xE000, 1, 1, CHG_NZVC, ALL}, + { "and", OP_TRI, "00010rrrrrrrrr00", XG_R_R_R, 2, 0x1000, 1, 1, CHG_NZV, ALL}, + { "andh", OP_IMM8, "10001rrriiiiiiii", XG_R_I, 2, 0x8800, 1, 1, CHG_NZV, ALL}, + { "andl", OP_IMM8, "10000rrriiiiiiii", XG_R_I, 2, 0x8000, 1, 1, CHG_NZV, ALL}, + { "asr", OP_IMM4, "00001rrriiii1001", XG_R_I, 2, 0x0809, 1, 1, CHG_NZVC, ALL}, + { "asr", OP_DYA, "00001rrrrrr10001", XG_R_R, 2, 0x0811, 1, 1, CHG_NZVC, ALL}, + { "bcc", OP_REL9, "0010000iiiiiiiii", XG_IP, 2, 0x2000, 1, 2, CHG_NONE, ALL}, + { "bcs", OP_REL9, "0010001iiiiiiiii", XG_IP, 2, 0x2200, 1, 2, CHG_NONE, ALL}, + { "beq", OP_REL9, "0010011iiiiiiiii", XG_IP, 2, 0x2600, 1, 2, CHG_NONE, ALL}, + { "bfext", OP_TRI, "01100rrrrrrrrr11", XG_R_R_R, 2, 0x6003, 1, 1, CHG_NZV, ALL}, + { "bffo", OP_DYA, "00001rrrrrr10000", XG_R_R, 2, 0x0810, 1, 1, CHG_NZVC, ALL}, + { "bfins", OP_TRI, "01101rrrrrrrrr11", XG_R_R_R, 2, 0x6803, 1, 1, CHG_NZV, ALL}, + {"bfinsi", OP_TRI, "01110rrrrrrrrr11", XG_R_R_R, 2, 0x7003, 1, 1, CHG_NZV, ALL}, + {"bfinsx", OP_TRI, "01111rrrrrrrrr11", XG_R_R_R, 2, 0x7803, 1, 1, CHG_NZV, ALL}, + { "bge", OP_REL9, "0011010iiiiiiiii", XG_IP, 2, 0x3400, 1, 2, CHG_NONE, ALL}, + { "bgt", OP_REL9, "0011100iiiiiiiii", XG_IP, 2, 0x3800, 1, 2, CHG_NONE, ALL}, + { "bhi", OP_REL9, "0011000iiiiiiiii", XG_IP, 2, 0x3000, 1, 2, CHG_NONE, ALL}, + { "bith", OP_IMM8, "10011rrriiiiiiii", XG_R_I, 2, 0x9800, 1, 1, CHG_NZV, ALL}, + { "bitl", OP_IMM8, "10010rrriiiiiiii", XG_R_I, 2, 0x9000, 1, 1, CHG_NZV, ALL}, + { "ble", OP_REL9, "0011101iiiiiiiii", XG_IP, 2, 0x3A00, 1, 2, CHG_NONE, ALL}, + { "bls", OP_REL9, "0011001iiiiiiiii", XG_IP, 2, 0x3200, 1, 2, CHG_NONE, ALL}, + { "blt", OP_REL9, "0011011iiiiiiiii", XG_IP, 2, 0x3600, 1, 2, CHG_NONE, ALL}, + { "bmi", OP_REL9, "0010101iiiiiiiii", XG_IP, 2, 0x2A00, 1, 2, CHG_NONE, ALL}, + { "bne", OP_REL9, "0010010iiiiiiiii", XG_IP, 2, 0x2400, 1, 2, CHG_NONE, ALL}, + { "bpl", OP_REL9, "0010100iiiiiiiii", XG_IP, 2, 0x2800, 1, 2, CHG_NONE, ALL}, + { "bra", OP_REL10, "001111iiiiiiiiii", XG_IP, 2, 0x3C00, 2, 2, CHG_NONE, ALL}, + { "brk", OP_INH, "0000000000000000", XG_INH, 2, 0x0000, 1, 1, CHG_NONE, ALL}, + { "bvc", OP_REL9, "0010110iiiiiiiii", XG_IP, 2, 0x2C00, 1, 2, CHG_NONE, ALL}, + { "bvs", OP_REL9, "0010111iiiiiiiii", XG_IP, 2, 0x2E00, 1, 2, CHG_NONE, ALL}, + { "cmpl", OP_IMM8, "11010rrriiiiiiii", XG_R_I, 2, 0xD000, 1, 1, CHG_NZVC, ALL}, + { "cpch", OP_IMM8, "11011rrriiiiiiii", XG_R_I, 2, 0xD800, 1, 1, CHG_NZVC, ALL}, + { "csem", OP_IMM3, "00000iii11110000", XG_I , 2, 0x00F0, 1, 1, CHG_NONE, ALL}, + { "csem", OP_MON, "00000rrr11110001", XG_R, 2, 0x00F1, 1, 1, CHG_NONE, ALL}, + { "csl", OP_IMM4, "00001rrriiii1010", XG_R_I, 2, 0x080A, 1, 1, CHG_NZVC, ALL}, + { "csl", OP_DYA, "00001rrrrrr10010", XG_R_R, 2, 0x0812, 1, 1, CHG_NZVC, ALL}, + { "csr", OP_IMM4, "00001rrriiii1011", XG_R_I, 2, 0x080B, 1, 1, CHG_NZVC, ALL}, + { "csr", OP_DYA, "00001rrrrrr10011", XG_R_R, 2, 0x0813, 1, 1, CHG_NZVC, ALL}, + { "jal", OP_MON, "00000rrr11110110", XG_R, 2, 0x00F6, 2, 2, CHG_NONE, ALL}, + { "ldb", OP_IDO5, "01000rrrrrriiiii", XG_R_R_I, 2, 0x4000, 2, 2, CHG_NONE, ALL}, + { "ldb", OP_IDR, "01100rrrrrrrrrrr", XG_R_R_R, 2, 0x6000, 2, 2, CHG_NONE, ALL}, + { "ldh", OP_IMM8, "11111rrriiiiiiii", XG_R_I, 2, 0xF800, 1, 1, CHG_NONE, ALL}, + { "ldl", OP_IMM8, "11110rrriiiiiiii", XG_R_I, 2, 0xF000, 1, 1, CHG_NONE, ALL}, + { "ldw", OP_IDO5, "01001rrrrrriiiii", XG_R_R_I, 2, 0x4800, 2, 2, CHG_NONE, ALL}, + { "ldw", OP_IDR, "01101rrrrrrrrrrr", XG_R_R_R, 2, 0x6800, 2, 2, CHG_NONE, ALL}, + { "lsl", OP_IMM4, "00001rrriiii1100", XG_R_I, 2, 0x080C, 1, 1, CHG_NZVC, ALL}, + { "lsl", OP_DYA, "00001rrrrrr10100", XG_R_R, 2, 0x0814, 1, 1, CHG_NZVC, ALL}, + { "lsr", OP_IMM4, "00001rrriiii1101", XG_R_I, 2, 0x080D, 1, 1, CHG_NZVC, ALL}, + { "lsr", OP_DYA, "00001rrrrrr10101", XG_R_R, 2, 0x0815, 1, 1, CHG_NZVC, ALL}, + { "nop", OP_INH, "0000000100000000", XG_INH, 2, 0x0100, 1, 1, CHG_NONE, ALL}, + { "or", OP_TRI, "00010rrrrrrrrr10", XG_R_R_R, 2, 0x1002, 1, 1, CHG_NZV, ALL}, + { "orh", OP_IMM8, "10101rrriiiiiiii", XG_R_I, 2, 0xA800, 1, 1, CHG_NZV, ALL}, + { "orl", OP_IMM8, "10100rrriiiiiiii", XG_R_I, 2, 0xA000, 1, 1, CHG_NZV, ALL}, + { "par", OP_MON, "00000rrr11110101", XG_R, 2, 0x00F5, 1, 1, CHG_NZV, ALL}, + { "rol", OP_IMM4, "00001rrriiii1110", XG_R_I, 2, 0x080E, 1, 1, CHG_NZV, ALL}, + { "rol", OP_DYA, "00001rrrrrr10110", XG_R_R, 2, 0x0816, 1, 1, CHG_NZV, ALL}, + { "ror", OP_IMM4, "00001rrriiii1111", XG_R_I, 2, 0x080F, 1, 1, CHG_NZV, ALL}, + { "ror", OP_DYA, "00001rrrrrr10111", XG_R_R, 2, 0x0817, 1, 1, CHG_NZV, ALL}, + { "rts", OP_INH, "0000001000000000", XG_INH, 2, 0x0200, 2, 2, CHG_NONE, ALL}, + { "sbc", OP_TRI, "00011rrrrrrrrr01", XG_R_R_R, 2, 0x1801, 1, 1, CHG_NZV, ALL}, + { "ssem", OP_IMM3, "00000iii11110010", XG_I , 2, 0x00F2, 2, 2, CHG_C, ALL}, + { "ssem", OP_MON, "00000rrr11110011", XG_R, 2, 0x00F3, 2, 2, CHG_C, ALL}, + { "sex", OP_MON, "00000rrr11110100", XG_R, 2, 0x00F4, 1, 1, CHG_NZV, ALL}, + { "sif", OP_INH, "0000001100000000", XG_INH, 2, 0x0300, 2, 2, CHG_NONE, ALL}, + { "sif", OP_MON, "00000rrr11110111", XG_R, 2, 0x00F7, 2, 2, CHG_NONE, ALL}, + { "stb", OP_IDO5, "01010rrrrrriiiii", XG_R_R_I, 2, 0x5000, 2, 2, CHG_NONE, ALL}, + { "stb", OP_IDR, "01110rrrrrrrrrrr", XG_R_R_R, 2, 0x7000, 2, 2, CHG_NONE, ALL}, + { "stw", OP_IDO5, "01011rrrrrriiiii", XG_R_R_I, 2, 0x5800, 2, 2, CHG_NONE, ALL}, + { "stw", OP_IDR, "01111rrrrrrrrrrr", XG_R_R_R, 2, 0x7800, 2, 2, CHG_NONE, ALL}, + { "sub", OP_TRI, "00011rrrrrrrrr00", XG_R_R_R, 2, 0x1800, 1, 1, CHG_NZVC, ALL}, + { "subh", OP_IMM8, "11001rrriiiiiiii", XG_R_I, 2, 0xC800, 1, 1, CHG_NZVC, ALL}, + { "subl", OP_IMM8, "11000rrriiiiiiii", XG_R_I, 2, 0xC000, 1, 1, CHG_NZVC, ALL}, + { "tfr", OP_MON_R_C, "00000rrr11111000",XG_R_C, 2, 0x00F8, 1, 1, CHG_NONE, ALL}, + { "tfr", OP_MON_C_R, "00000rrr11111001",XG_C_R, 2, 0x00F9, 1, 1, CHG_NONE, ALL}, + { "tfr", OP_MON_R_P, "00000rrr11111010",XG_R_P, 2, 0x00FA, 1, 1, CHG_NONE, ALL}, + { "xnor", OP_TRI, "00010rrrrrrrrr11", XG_R_R_R, 2, 0x1003, 1, 1, CHG_NZV, ALL}, + { "xnorh", OP_IMM8, "10111rrriiiiiiii", XG_R_I, 2, 0xB800, 1, 1, CHG_NZV, ALL}, + { "xnorl", OP_IMM8, "10110rrriiiiiiii", XG_R_I, 2, 0xB000, 1, 1, CHG_NZV, ALL}, + /* macro and alias codes */ + { "add", OP_mADD, "----------------", XG_R_I, 4, 0, 0, 0, CHG_NONE, ALL}, + { "and", OP_mAND, "----------------", XG_R_I, 4, 0, 0, 0, CHG_NONE, ALL}, + { "bhs", OP_REL9, "0010000iiiiiiiii", XG_IP, 2, 0x2000, 0, 0, CHG_NONE, ALL}, + { "blo", OP_REL9, "0010001iiiiiiiii", XG_IP, 2, 0x2200, 0, 0, CHG_NONE, ALL}, + { "cmp", OP_mCPC, "----------------", XG_R_I, 4, 0, 0, 0, CHG_NONE, ALL}, + { "cmp", OP_DYA, "00011sssrrrrrr00", XG_R_R, 2, 0x1800, 0, 0, CHG_NZVC, ALL}, + { "com", OP_DM, "00010rrrsssrrr11", XG_R_R, 2, 0x1003, 0, 0, CHG_NZV, ALL}, + { "cpc", OP_DYA, "00011sssrrrrrr01", XG_R_R, 2, 0x1801, 0, 0, CHG_NZVC, ALL}, + { "ldd", OP_mLDW, "----------------", XG_R_I, 4, 0, 0, 0, CHG_NONE, ALL}, + { "ldw", OP_mLDW, "----------------", XG_R_I, 4, 0, 0, 0, CHG_NONE, ALL}, + { "mov", OP_DYA, "00010rrrsssrrr10", XG_R_R, 2, 0x1002, 0, 0, CHG_NZVC, ALL}, + { "neg", OP_DYA, "00011rrrsssrrr00", XG_R_R, 2, 0x1800, 0, 0, CHG_NZVC, ALL}, + { "sub", OP_mSUB, "----------------", XG_R_I, 4, 0, 0, 0, CHG_NONE, ALL}, + { "tst", OP_MON, "00011sssrrrsss00", XG_R, 2, 0x1800, 0, 0, CHG_NZV, ALL} +}; + +const int xgate_num_opcodes = TABLE_SIZE (xgate_opcodes); -- cgit v1.1