From e8b5d5f9713b7c74f95c4ff573ddeb7ebdb3fbc3 Mon Sep 17 00:00:00 2001
From: Jan Beulich <jbeulich@suse.com>
Date: Tue, 14 Jul 2020 10:23:36 +0200
Subject: x86: drop dead code from OP_IMREG()

There's only a very limited set of modes that this function gets invoked
with - avoid it being more generic than it needs to be. This may, down
the road, allow actually doing away with the function altogether.

This eliminates a first improperly used "USED_REX (0)".
---
 opcodes/ChangeLog  |  8 ++++++++
 opcodes/i386-dis.c | 46 ++++++----------------------------------------
 2 files changed, 14 insertions(+), 40 deletions(-)

(limited to 'opcodes')

diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index 83dfd2e..26b56ba 100644
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,11 @@
+2020-07-14  Jan Beulich  <jbeulich@suse.com>
+
+	* i386-dis.c (eBX, eCX, eDX, eSP, eBP, eSI, eDI, DL, BL, AH,
+	CH, DH, BH, AX, DX): Delete.
+	(OP_IMREG): Drop handling of eBX_reg, eCX_reg, eDX_reg, eSP_reg,
+	eBP_reg, eSI_reg, eDI_reg, dl_reg, bl_reg, ah_reg, ch_reg,
+	dh_reg, bh_reg, ax_reg, and dx_reg. Simplify what's left.
+
 2020-07-10  Lili Cui  <lili.cui@intel.com>
 
 	* i386-dis.c (TMM): New.
diff --git a/opcodes/i386-dis.c b/opcodes/i386-dis.c
index 6a14f9e..b635a04 100644
--- a/opcodes/i386-dis.c
+++ b/opcodes/i386-dis.c
@@ -326,23 +326,8 @@ fetch_data (struct disassemble_info *info, bfd_byte *addr)
 #define RMDX { OP_REG, dx_reg }
 
 #define eAX { OP_IMREG, eAX_reg }
-#define eBX { OP_IMREG, eBX_reg }
-#define eCX { OP_IMREG, eCX_reg }
-#define eDX { OP_IMREG, eDX_reg }
-#define eSP { OP_IMREG, eSP_reg }
-#define eBP { OP_IMREG, eBP_reg }
-#define eSI { OP_IMREG, eSI_reg }
-#define eDI { OP_IMREG, eDI_reg }
 #define AL { OP_IMREG, al_reg }
 #define CL { OP_IMREG, cl_reg }
-#define DL { OP_IMREG, dl_reg }
-#define BL { OP_IMREG, bl_reg }
-#define AH { OP_IMREG, ah_reg }
-#define CH { OP_IMREG, ch_reg }
-#define DH { OP_IMREG, dh_reg }
-#define BH { OP_IMREG, bh_reg }
-#define AX { OP_IMREG, ax_reg }
-#define DX { OP_IMREG, dx_reg }
 #define zAX { OP_IMREG, z_mode_ax_reg }
 #define indirDX { OP_IMREG, indir_dx_reg }
 
@@ -15285,36 +15270,17 @@ OP_IMREG (int code, int sizeflag)
       else
 	s = "(%dx)";
       break;
-    case ax_reg: case cx_reg: case dx_reg: case bx_reg:
-    case sp_reg: case bp_reg: case si_reg: case di_reg:
-      s = names16[code - ax_reg];
-      break;
-    case es_reg: case ss_reg: case cs_reg:
-    case ds_reg: case fs_reg: case gs_reg:
-      s = names_seg[code - es_reg];
-      break;
-    case al_reg: case ah_reg: case cl_reg: case ch_reg:
-    case dl_reg: case dh_reg: case bl_reg: case bh_reg:
-      USED_REX (0);
-      if (rex)
-	s = names8rex[code - al_reg];
-      else
-	s = names8[code - al_reg];
+    case al_reg: case cl_reg:
+      s = names8[code - al_reg];
       break;
-    case eAX_reg: case eCX_reg: case eDX_reg: case eBX_reg:
-    case eSP_reg: case eBP_reg: case eSI_reg: case eDI_reg:
+    case eAX_reg:
       USED_REX (REX_W);
       if (rex & REX_W)
-	s = names64[code - eAX_reg];
-      else
 	{
-	  if (sizeflag & DFLAG)
-	    s = names32[code - eAX_reg];
-	  else
-	    s = names16[code - eAX_reg];
-	  used_prefixes |= (prefixes & PREFIX_DATA);
+	  s = *names64;
+	  break;
 	}
-      break;
+      /* Fall through.  */
     case z_mode_ax_reg:
       if ((rex & REX_W) || (sizeflag & DFLAG))
 	s = *names32;
-- 
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