From 92708ceca544456c26b4b82e2e7fc8afcf1641c8 Mon Sep 17 00:00:00 2001 From: "Maciej W. Rozycki" Date: Mon, 11 Apr 2016 17:56:01 +0100 Subject: MIPS/opcodes: Fix undecoded MIPS16 extended instruction bit disassembly Correct the disassembly of hardware don't cares in MIPS16 extended instructions. Rather than e.g.: 0: f008 0231 addiu v0,sp,16433 4: f520 3260 sll v0,v1,-12 print: 0: f008 0231 addiu v0,sp,16401 4: f520 3260 sll v0,v1,20 respectively instead. opcodes/ * mips-dis.c (print_mips16_insn_arg): Mask unused extended instruction bits out. binutils/ * testsuite/binutils-all/mips/mips16-undecoded.d: New test. * testsuite/binutils-all/mips/mips16-undecoded.s: New test source. * testsuite/binutils-all/mips/mips.exp: Run the new test. --- opcodes/ChangeLog | 5 +++++ opcodes/mips-dis.c | 6 ++++-- 2 files changed, 9 insertions(+), 2 deletions(-) (limited to 'opcodes') diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index a91544e..4d23c24 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,3 +1,8 @@ +2016-04-11 Maciej W. Rozycki + + * mips-dis.c (print_mips16_insn_arg): Mask unused extended + instruction bits out. + 2016-04-07 Andrew Burgess * arc-nps400-tbl.h: Add schd, sync, and hwschd instructions. diff --git a/opcodes/mips-dis.c b/opcodes/mips-dis.c index e152876..7822295 100644 --- a/opcodes/mips-dis.c +++ b/opcodes/mips-dis.c @@ -1894,11 +1894,13 @@ print_mips16_insn_arg (struct disassemble_info *info, { operand = ext_operand; if (operand->size == 16) - uval |= ((extend & 0x1f) << 11) | (extend & 0x7e0); + uval = (((extend & 0x1f) << 11) | (extend & 0x7e0) + | (uval & 0x1f)); else if (operand->size == 15) uval |= ((extend & 0xf) << 11) | (extend & 0x7f0); else - uval = ((extend >> 6) & 0x1f) | (extend & 0x20); + uval = ((((extend >> 6) & 0x1f) | (extend & 0x20)) + & ((1U << operand->size) - 1)); } } } -- cgit v1.1