From 7fadb25d6faf2665305016ceb4aeaeeb86015569 Mon Sep 17 00:00:00 2001 From: Sudakshina Das Date: Fri, 5 Oct 2018 10:49:53 +0100 Subject: [Arm, 2/3] Add instruction SB for AArch32 This patch is part of the patch series to add support for ARMv8.5-A extensions. (https://developer.arm.com/products/architecture/cpu-architecture/a-profile/exploration-tools) This patch adds the instruction SB. This instruction is retrospectively made optional for all versions of the architecture from ARMv8.0 to ARMv8.4 and is mandatory from ARMv8.5. Hence adding a new "+sb" for older archtectures. *** include/ChangeLog *** 2018-10-05 Sudakshina Das * opcode/arm.h (ARM_EXT2_SB): New. (ARM_ARCH_V8_5A): Add ARM_EXT2_SB by default. *** opcodes/ChangeLog *** 2018-10-05 Sudakshina Das * arm-dis.c (arm_opcodes): Add sb. (thumb32_opcodes): Likewise. *** gas/ChangeLog *** 2018-10-05 Sudakshina Das * config/tc-arm.c (arm_ext_sb): New. (insns): Add new sb instruction. (arm_extensions): Add "sb". * doc/c-arm.texi: Document the above. * testsuite/gas/arm/sb-bad.d: New test. * testsuite/gas/arm/sb-bad.l: New test. * testsuite/gas/arm/sb-thumb1.d: New test. * testsuite/gas/arm/sb-thumb2.d: New test. * testsuite/gas/arm/sb.s: New test. * testsuite/gas/arm/sb1.d: New test. * testsuite/gas/arm/sb2.d: New test. --- opcodes/ChangeLog | 5 +++++ opcodes/arm-dis.c | 6 ++++++ 2 files changed, 11 insertions(+) (limited to 'opcodes') diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index 0eda28d..b66a46e 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,3 +1,8 @@ +2018-10-05 Sudakshina Das + + * arm-dis.c (arm_opcodes): Add sb. + (thumb32_opcodes): Likewise. + 2018-10-05 Richard Henderson Stafford Horne diff --git a/opcodes/arm-dis.c b/opcodes/arm-dis.c index cb2de1b..f22a78f 100644 --- a/opcodes/arm-dis.c +++ b/opcodes/arm-dis.c @@ -1906,6 +1906,9 @@ static const struct opcode32 arm_opcodes[] = {ARM_FEATURE_CORE_LOW (ARM_EXT_V6K), 0x01e00f90, 0x0ff00ff0, "strexh%c\t%12-15R, %0-3R, [%16-19R]"}, + /* ARMv8.5-A instructions. */ + {ARM_FEATURE_CORE_HIGH (ARM_EXT2_SB), 0xf57ff070, 0xffffffff, "sb"}, + /* ARM V6K NOP hints. */ {ARM_FEATURE_CORE_LOW (ARM_EXT_V6K), 0x0320f001, 0x0fffffff, "yield%c"}, @@ -2829,6 +2832,9 @@ static const struct opcode32 thumb32_opcodes[] = /* Security extension instructions. */ {ARM_FEATURE_CORE_LOW (ARM_EXT_SEC), 0xf7f08000, 0xfff0f000, "smc%c\t%K"}, + /* ARMv8.5-A instructions. */ + {ARM_FEATURE_CORE_HIGH (ARM_EXT2_SB), 0xf3bf8f70, 0xffffffff, "sb"}, + /* Instructions defined in the basic V6T2 set. */ {ARM_FEATURE_CORE_LOW (ARM_EXT_V6T2), 0xf3af8000, 0xffffffff, "nop%c.w"}, {ARM_FEATURE_CORE_LOW (ARM_EXT_V6T2), 0xf3af8001, 0xffffffff, "yield%c.w"}, -- cgit v1.1