From 594ab6a333bf85639e6839a924534fa264616c39 Mon Sep 17 00:00:00 2001 From: "H.J. Lu" Date: Fri, 4 Apr 2008 16:34:23 +0000 Subject: gas/ 2008-04-04 H.J. Lu * NEWS: Mention XSAVE. Change CLMUL to PCLMUL. * config/tc-i386.c (cpu_arch): Add .pclmul. (md_show_usage): Replace clmul with pclmul. * doc/c-i386.texi: Likewise. gas/testsuite/ 2008-04-04 H.J. Lu * gas/i386/arch-10-1.l: Replace CLMUL with PCLMUL. * gas/i386/arch-10-2.l: Likewise. * gas/i386/arch-10-3.l: Likewise. * gas/i386/arch-10-4.l: Likewise. * gas/i386/arch-10.s: Likewise. * gas/i386/clmul-intel.d: Likewise. * gas/i386/clmul.d: Likewise. * gas/i386/clmul.s: Likewise. * gas/i386/x86-64-arch-2.s: Likewise. * gas/i386/x86-64-clmul-intel.d: Likewise. * gas/i386/x86-64-clmul.d: Likewise. * gas/i386/x86-64-clmul.s: Likewise. * gas/i386/arch-10.d: Replace clmul with pclmul. * gas/i386/x86-64-arch-2.d: Likewise. opcodes/ 2008-04-04 H.J. Lu * i386-gen.c (cpu_flag_init): Replace CPU_CLMUL_FLAGS/CpuCLMUL with CPU_PCLMUL_FLAGS/CpuPCLMUL. (cpu_flags): Replace CpuCLMUL with CpuPCLMUL. * i386-opc.tbl: Likewise. * i386-opc.h (CpuCLMUL): Renamed to ... (CpuPCLMUL): This. (CpuFMA): Updated. (i386_cpu_flags): Replace cpuclmul with cpupclmul. * i386-init.h: Regenerated. --- opcodes/ChangeLog | 14 ++++++++++++++ opcodes/i386-gen.c | 6 +++--- opcodes/i386-init.h | 2 +- opcodes/i386-opc.h | 8 ++++---- opcodes/i386-opc.tbl | 12 ++++++------ 5 files changed, 28 insertions(+), 14 deletions(-) (limited to 'opcodes') diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index 0c1be77..9e89ebc 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,3 +1,17 @@ +2008-04-04 H.J. Lu + + * i386-gen.c (cpu_flag_init): Replace CPU_CLMUL_FLAGS/CpuCLMUL + with CPU_PCLMUL_FLAGS/CpuPCLMUL. + (cpu_flags): Replace CpuCLMUL with CpuPCLMUL. + * i386-opc.tbl: Likewise. + + * i386-opc.h (CpuCLMUL): Renamed to ... + (CpuPCLMUL): This. + (CpuFMA): Updated. + (i386_cpu_flags): Replace cpuclmul with cpupclmul. + + * i386-init.h: Regenerated. + 2008-04-03 H.J. Lu * i386-dis.c (OP_E_register): New. diff --git a/opcodes/i386-gen.c b/opcodes/i386-gen.c index b225e06..12c8bb9 100644 --- a/opcodes/i386-gen.c +++ b/opcodes/i386-gen.c @@ -104,8 +104,8 @@ static initializer cpu_flag_init [] = "CpuXsave" }, { "CPU_AES_FLAGS", "CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSSE3|CpuSSE4_1|CpuSSE4_2|CpuAES" }, - { "CPU_CLMUL_FLAGS", - "CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSSE3|CpuSSE4_1|CpuSSE4_2|CpuCLMUL" }, + { "CPU_PCLMUL_FLAGS", + "CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSSE3|CpuSSE4_1|CpuSSE4_2|CpuPCLMUL" }, { "CPU_FMA_FLAGS", "CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSSE3|CpuSSE4_1|CpuSSE4_2|CpuAVX|CpuFMA" }, { "CPU_3DNOW_FLAGS", @@ -263,7 +263,7 @@ static bitfield cpu_flags[] = BITFIELD (CpuABM), BITFIELD (CpuXsave), BITFIELD (CpuAES), - BITFIELD (CpuCLMUL), + BITFIELD (CpuPCLMUL), BITFIELD (CpuFMA), BITFIELD (CpuLM), BITFIELD (Cpu64), diff --git a/opcodes/i386-init.h b/opcodes/i386-init.h index 11a88aa..b6e7cfa 100644 --- a/opcodes/i386-init.h +++ b/opcodes/i386-init.h @@ -146,7 +146,7 @@ { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 1, 0, 0, 0, 0, 1, \ 0, 0, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0 } } -#define CPU_CLMUL_FLAGS \ +#define CPU_PCLMUL_FLAGS \ { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 1, 0, 0, 0, 0, 1, \ 0, 0, 1, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 } } diff --git a/opcodes/i386-opc.h b/opcodes/i386-opc.h index 4ea2ec4..a3dd863 100644 --- a/opcodes/i386-opc.h +++ b/opcodes/i386-opc.h @@ -86,10 +86,10 @@ #define CpuXsave (CpuAVX + 1) /* AES support required */ #define CpuAES (CpuXsave + 1) -/* CLMUL support required */ -#define CpuCLMUL (CpuAES + 1) +/* PCLMUL support required */ +#define CpuPCLMUL (CpuAES + 1) /* FMA support required */ -#define CpuFMA (CpuCLMUL + 1) +#define CpuFMA (CpuPCLMUL + 1) /* 64bit support available, used by -march= in assembler. */ #define CpuLM (CpuFMA + 1) /* 64bit support required */ @@ -142,7 +142,7 @@ typedef union i386_cpu_flags unsigned int cpuavx:1; unsigned int cpuxsave:1; unsigned int cpuaes:1; - unsigned int cpuclmul:1; + unsigned int cpupclmul:1; unsigned int cpufma:1; unsigned int cpulm:1; unsigned int cpu64:1; diff --git a/opcodes/i386-opc.tbl b/opcodes/i386-opc.tbl index dc71cf3..411db32 100644 --- a/opcodes/i386-opc.tbl +++ b/opcodes/i386-opc.tbl @@ -1722,13 +1722,13 @@ aesenclast, 2, 0x660f38dd, None, 3, CpuAES, Modrm|IgnoreSize|No_bSuf|No_wSuf|No_ aesimc, 2, 0x660f38db, None, 3, CpuAES, Modrm|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Xmmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegXMM } aeskeygenassist, 3, 0x660f3adf, None, 3, CpuAES, Modrm|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Imm8, Xmmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegXMM } -// CLMUL +// PCLMUL -pclmulqdq, 3, 0x660f3a44, None, 3, CpuCLMUL, Modrm|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Imm8, Xmmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegXMM } -pclmullqlqdq, 2, 0x660f3a44, 0x0, 3, CpuCLMUL, Modrm|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ImmExt, { Xmmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegXMM } -pclmulhqlqdq, 2, 0x660f3a44, 0x1, 3, CpuCLMUL, Modrm|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ImmExt, { Xmmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegXMM } -pclmullqhqdq, 2, 0x660f3a44, 0x10, 3, CpuCLMUL, Modrm|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ImmExt, { Xmmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegXMM } -pclmulhqhqdq, 2, 0x660f3a44, 0x11, 3, CpuCLMUL, Modrm|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ImmExt, { Xmmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegXMM } +pclmulqdq, 3, 0x660f3a44, None, 3, CpuPCLMUL, Modrm|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Imm8, Xmmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegXMM } +pclmullqlqdq, 2, 0x660f3a44, 0x0, 3, CpuPCLMUL, Modrm|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ImmExt, { Xmmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegXMM } +pclmulhqlqdq, 2, 0x660f3a44, 0x1, 3, CpuPCLMUL, Modrm|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ImmExt, { Xmmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegXMM } +pclmullqhqdq, 2, 0x660f3a44, 0x10, 3, CpuPCLMUL, Modrm|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ImmExt, { Xmmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegXMM } +pclmulhqhqdq, 2, 0x660f3a44, 0x11, 3, CpuPCLMUL, Modrm|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ImmExt, { Xmmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegXMM } // AVX instructions. -- cgit v1.1