From 3b16e843f2a75ccf8e7ecc5102e1217a122a05ad Mon Sep 17 00:00:00 2001 From: Nick Clifton Date: Thu, 31 Jan 2002 17:33:08 +0000 Subject: Add support for OpenRISC 32-bit embedded processor --- opcodes/ChangeLog | 12 + opcodes/Makefile.am | 4 + opcodes/Makefile.in | 12 +- opcodes/configure | 116 +++--- opcodes/configure.in | 1 + opcodes/disassemble.c | 11 +- opcodes/or32-dis.c | 345 ++++++++++++++++ opcodes/or32-opc.c | 1049 ++++++++++++++++++++++++++++++++++++++++++++++++ opcodes/po/POTFILES.in | 2 + opcodes/po/fr.po | 97 +++-- opcodes/po/opcodes.pot | 83 ++-- opcodes/po/sv.po | 86 ++-- opcodes/po/tr.po | 86 ++-- 13 files changed, 1745 insertions(+), 159 deletions(-) create mode 100644 opcodes/or32-dis.c create mode 100644 opcodes/or32-opc.c (limited to 'opcodes') diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index f8f68fc..fc35558 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,3 +1,15 @@ +2002-01-31 Ivan Guzvinec + + * or32-dis.c: New file. + * or32-opc.c: New file. + * configure.in: Add support for or32. + * configure: Regenerate. + * Makefile.am: Add support for or32. + * Makefile.in: Regenerate. + * disassemble.c: Add support for or32. + * po/POTFILES.in: Regenerate. + * po/opcodes.pot: Regenerate. + 2002-01-27 Daniel Jacobowitz * configure: Regenerated. diff --git a/opcodes/Makefile.am b/opcodes/Makefile.am index 7c9da2e..adde93d 100644 --- a/opcodes/Makefile.am +++ b/opcodes/Makefile.am @@ -106,6 +106,8 @@ CFILES = \ openrisc-dis.c \ openrisc-ibld.c \ openrisc-opc.c \ + or32-dis.c \ + or32-opc.c \ pdp11-dis.c \ pdp11-opc.c \ pj-dis.c \ @@ -195,6 +197,8 @@ ALL_MACHINES = \ openrisc-dis.lo \ openrisc-ibld.lo \ openrisc-opc.lo \ + or32-dis.lo \ + or32-opc.lo \ pdp11-dis.lo \ pdp11-opc.lo \ pj-dis.lo \ diff --git a/opcodes/Makefile.in b/opcodes/Makefile.in index 8cc2744..b1c1cec 100644 --- a/opcodes/Makefile.in +++ b/opcodes/Makefile.in @@ -1,6 +1,6 @@ -# Makefile.in generated automatically by automake 1.4 from Makefile.am +# Makefile.in generated automatically by automake 1.4-p5 from Makefile.am -# Copyright (C) 1994, 1995-8, 1999 Free Software Foundation, Inc. +# Copyright (C) 1994, 1995-8, 1999, 2001 Free Software Foundation, Inc. # This Makefile.in is free software; the Free Software Foundation # gives unlimited permission to copy and/or distribute it, # with or without modifications, as long as this notice is preserved. @@ -217,6 +217,8 @@ CFILES = \ openrisc-dis.c \ openrisc-ibld.c \ openrisc-opc.c \ + or32-dis.c \ + or32-opc.c \ pdp11-dis.c \ pdp11-opc.c \ pj-dis.c \ @@ -307,6 +309,8 @@ ALL_MACHINES = \ openrisc-dis.lo \ openrisc-ibld.lo \ openrisc-opc.lo \ + or32-dis.lo \ + or32-opc.lo \ pdp11-dis.lo \ pdp11-opc.lo \ pj-dis.lo \ @@ -407,7 +411,7 @@ acinclude.m4 aclocal.m4 config.in configure configure.in DISTFILES = $(DIST_COMMON) $(SOURCES) $(HEADERS) $(TEXINFOS) $(EXTRA_DIST) -TAR = tar +TAR = gtar GZIP_ENV = --best SOURCES = libopcodes.a.c $(libopcodes_la_SOURCES) OBJECTS = libopcodes.a.$(OBJEXT) $(libopcodes_la_OBJECTS) @@ -572,7 +576,7 @@ maintainer-clean-recursive: dot_seen=no; \ rev=''; list='$(SUBDIRS)'; for subdir in $$list; do \ rev="$$subdir $$rev"; \ - test "$$subdir" = "." && dot_seen=yes; \ + test "$$subdir" != "." || dot_seen=yes; \ done; \ test "$$dot_seen" = "no" && rev=". $$rev"; \ target=`echo $@ | sed s/-recursive//`; \ diff --git a/opcodes/configure b/opcodes/configure index 69837fd..d4ac705 100755 --- a/opcodes/configure +++ b/opcodes/configure @@ -3240,7 +3240,7 @@ EOF fi -for ac_hdr in unistd.h +for ac_hdr in stdlib.h unistd.h sys/stat.h sys/types.h do ac_safe=`echo "$ac_hdr" | sed 'y%./+-%__p_%'` echo $ac_n "checking for $ac_hdr""... $ac_c" 1>&6 @@ -3372,11 +3372,24 @@ else #include #include +#if HAVE_SYS_TYPES_H +# include +#endif + +#if HAVE_STDLIB_H +# include +#endif + +#if HAVE_SYS_STAT_H +# include +#endif + +#if HAVE_UNISTD_H +# include +#endif + /* This mess was copied from the GNU getpagesize.h. */ #ifndef HAVE_GETPAGESIZE -# ifdef HAVE_UNISTD_H -# include -# endif /* Assume that all systems that can run configure have sys/param.h. */ # ifndef HAVE_SYS_PARAM_H @@ -3484,7 +3497,7 @@ main() } EOF -if { (eval echo configure:3488: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext} && (./conftest; exit) 2>/dev/null +if { (eval echo configure:3501: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext} && (./conftest; exit) 2>/dev/null then ac_cv_func_mmap_fixed_mapped=yes else @@ -3512,17 +3525,17 @@ unistd.h values.h sys/param.h do ac_safe=`echo "$ac_hdr" | sed 'y%./+-%__p_%'` echo $ac_n "checking for $ac_hdr""... $ac_c" 1>&6 -echo "configure:3516: checking for $ac_hdr" >&5 +echo "configure:3529: checking for $ac_hdr" >&5 if eval "test \"`echo '$''{'ac_cv_header_$ac_safe'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext < EOF ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out" -{ (eval echo configure:3526: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; } +{ (eval echo configure:3539: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; } ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"` if test -z "$ac_err"; then rm -rf conftest* @@ -3552,12 +3565,12 @@ done __argz_count __argz_stringify __argz_next do echo $ac_n "checking for $ac_func""... $ac_c" 1>&6 -echo "configure:3556: checking for $ac_func" >&5 +echo "configure:3569: checking for $ac_func" >&5 if eval "test \"`echo '$''{'ac_cv_func_$ac_func'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext <&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then +if { (eval echo configure:3597: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then rm -rf conftest* eval "ac_cv_func_$ac_func=yes" else @@ -3609,12 +3622,12 @@ done for ac_func in stpcpy do echo $ac_n "checking for $ac_func""... $ac_c" 1>&6 -echo "configure:3613: checking for $ac_func" >&5 +echo "configure:3626: checking for $ac_func" >&5 if eval "test \"`echo '$''{'ac_cv_func_$ac_func'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext <&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then +if { (eval echo configure:3654: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then rm -rf conftest* eval "ac_cv_func_$ac_func=yes" else @@ -3671,19 +3684,19 @@ EOF if test $ac_cv_header_locale_h = yes; then echo $ac_n "checking for LC_MESSAGES""... $ac_c" 1>&6 -echo "configure:3675: checking for LC_MESSAGES" >&5 +echo "configure:3688: checking for LC_MESSAGES" >&5 if eval "test \"`echo '$''{'am_cv_val_LC_MESSAGES'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext < int main() { return LC_MESSAGES ; return 0; } EOF -if { (eval echo configure:3687: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then +if { (eval echo configure:3700: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then rm -rf conftest* am_cv_val_LC_MESSAGES=yes else @@ -3704,7 +3717,7 @@ EOF fi fi echo $ac_n "checking whether NLS is requested""... $ac_c" 1>&6 -echo "configure:3708: checking whether NLS is requested" >&5 +echo "configure:3721: checking whether NLS is requested" >&5 # Check whether --enable-nls or --disable-nls was given. if test "${enable_nls+set}" = set; then enableval="$enable_nls" @@ -3724,7 +3737,7 @@ fi EOF echo $ac_n "checking whether included gettext is requested""... $ac_c" 1>&6 -echo "configure:3728: checking whether included gettext is requested" >&5 +echo "configure:3741: checking whether included gettext is requested" >&5 # Check whether --with-included-gettext or --without-included-gettext was given. if test "${with_included_gettext+set}" = set; then withval="$with_included_gettext" @@ -3743,17 +3756,17 @@ fi ac_safe=`echo "libintl.h" | sed 'y%./+-%__p_%'` echo $ac_n "checking for libintl.h""... $ac_c" 1>&6 -echo "configure:3747: checking for libintl.h" >&5 +echo "configure:3760: checking for libintl.h" >&5 if eval "test \"`echo '$''{'ac_cv_header_$ac_safe'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext < EOF ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out" -{ (eval echo configure:3757: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; } +{ (eval echo configure:3770: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; } ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"` if test -z "$ac_err"; then rm -rf conftest* @@ -3770,19 +3783,19 @@ fi if eval "test \"`echo '$ac_cv_header_'$ac_safe`\" = yes"; then echo "$ac_t""yes" 1>&6 echo $ac_n "checking for gettext in libc""... $ac_c" 1>&6 -echo "configure:3774: checking for gettext in libc" >&5 +echo "configure:3787: checking for gettext in libc" >&5 if eval "test \"`echo '$''{'gt_cv_func_gettext_libc'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext < int main() { return (int) gettext ("") ; return 0; } EOF -if { (eval echo configure:3786: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then +if { (eval echo configure:3799: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then rm -rf conftest* gt_cv_func_gettext_libc=yes else @@ -3798,7 +3811,7 @@ echo "$ac_t""$gt_cv_func_gettext_libc" 1>&6 if test "$gt_cv_func_gettext_libc" != "yes"; then echo $ac_n "checking for bindtextdomain in -lintl""... $ac_c" 1>&6 -echo "configure:3802: checking for bindtextdomain in -lintl" >&5 +echo "configure:3815: checking for bindtextdomain in -lintl" >&5 ac_lib_var=`echo intl'_'bindtextdomain | sed 'y%./+-%__p_%'` if eval "test \"`echo '$''{'ac_cv_lib_$ac_lib_var'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 @@ -3806,7 +3819,7 @@ else ac_save_LIBS="$LIBS" LIBS="-lintl $LIBS" cat > conftest.$ac_ext <&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then +if { (eval echo configure:3834: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then rm -rf conftest* eval "ac_cv_lib_$ac_lib_var=yes" else @@ -3833,19 +3846,19 @@ fi if eval "test \"`echo '$ac_cv_lib_'$ac_lib_var`\" = yes"; then echo "$ac_t""yes" 1>&6 echo $ac_n "checking for gettext in libintl""... $ac_c" 1>&6 -echo "configure:3837: checking for gettext in libintl" >&5 +echo "configure:3850: checking for gettext in libintl" >&5 if eval "test \"`echo '$''{'gt_cv_func_gettext_libintl'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext <&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then +if { (eval echo configure:3862: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then rm -rf conftest* gt_cv_func_gettext_libintl=yes else @@ -3873,7 +3886,7 @@ EOF # Extract the first word of "msgfmt", so it can be a program name with args. set dummy msgfmt; ac_word=$2 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6 -echo "configure:3877: checking for $ac_word" >&5 +echo "configure:3890: checking for $ac_word" >&5 if eval "test \"`echo '$''{'ac_cv_path_MSGFMT'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else @@ -3907,12 +3920,12 @@ fi for ac_func in dcgettext do echo $ac_n "checking for $ac_func""... $ac_c" 1>&6 -echo "configure:3911: checking for $ac_func" >&5 +echo "configure:3924: checking for $ac_func" >&5 if eval "test \"`echo '$''{'ac_cv_func_$ac_func'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext <&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then +if { (eval echo configure:3952: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then rm -rf conftest* eval "ac_cv_func_$ac_func=yes" else @@ -3962,7 +3975,7 @@ done # Extract the first word of "gmsgfmt", so it can be a program name with args. set dummy gmsgfmt; ac_word=$2 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6 -echo "configure:3966: checking for $ac_word" >&5 +echo "configure:3979: checking for $ac_word" >&5 if eval "test \"`echo '$''{'ac_cv_path_GMSGFMT'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else @@ -3998,7 +4011,7 @@ fi # Extract the first word of "xgettext", so it can be a program name with args. set dummy xgettext; ac_word=$2 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6 -echo "configure:4002: checking for $ac_word" >&5 +echo "configure:4015: checking for $ac_word" >&5 if eval "test \"`echo '$''{'ac_cv_path_XGETTEXT'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else @@ -4030,7 +4043,7 @@ else fi cat > conftest.$ac_ext <&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then +if { (eval echo configure:4055: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then rm -rf conftest* CATOBJEXT=.gmo DATADIRNAME=share @@ -4070,7 +4083,7 @@ fi # Extract the first word of "msgfmt", so it can be a program name with args. set dummy msgfmt; ac_word=$2 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6 -echo "configure:4074: checking for $ac_word" >&5 +echo "configure:4087: checking for $ac_word" >&5 if eval "test \"`echo '$''{'ac_cv_path_MSGFMT'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else @@ -4104,7 +4117,7 @@ fi # Extract the first word of "gmsgfmt", so it can be a program name with args. set dummy gmsgfmt; ac_word=$2 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6 -echo "configure:4108: checking for $ac_word" >&5 +echo "configure:4121: checking for $ac_word" >&5 if eval "test \"`echo '$''{'ac_cv_path_GMSGFMT'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else @@ -4140,7 +4153,7 @@ fi # Extract the first word of "xgettext", so it can be a program name with args. set dummy xgettext; ac_word=$2 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6 -echo "configure:4144: checking for $ac_word" >&5 +echo "configure:4157: checking for $ac_word" >&5 if eval "test \"`echo '$''{'ac_cv_path_XGETTEXT'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else @@ -4230,7 +4243,7 @@ fi LINGUAS= else echo $ac_n "checking for catalogs to be installed""... $ac_c" 1>&6 -echo "configure:4234: checking for catalogs to be installed" >&5 +echo "configure:4247: checking for catalogs to be installed" >&5 NEW_LINGUAS= for lang in ${LINGUAS=$ALL_LINGUAS}; do case "$ALL_LINGUAS" in @@ -4258,17 +4271,17 @@ echo "configure:4234: checking for catalogs to be installed" >&5 if test "$CATOBJEXT" = ".cat"; then ac_safe=`echo "linux/version.h" | sed 'y%./+-%__p_%'` echo $ac_n "checking for linux/version.h""... $ac_c" 1>&6 -echo "configure:4262: checking for linux/version.h" >&5 +echo "configure:4275: checking for linux/version.h" >&5 if eval "test \"`echo '$''{'ac_cv_header_$ac_safe'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext < EOF ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out" -{ (eval echo configure:4272: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; } +{ (eval echo configure:4285: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; } ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"` if test -z "$ac_err"; then rm -rf conftest* @@ -4346,7 +4359,7 @@ if test "x$cross_compiling" = "xno"; then EXEEXT_FOR_BUILD='$(EXEEXT)' else echo $ac_n "checking for build system executable suffix""... $ac_c" 1>&6 -echo "configure:4350: checking for build system executable suffix" >&5 +echo "configure:4363: checking for build system executable suffix" >&5 if eval "test \"`echo '$''{'bfd_cv_build_exeext'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else @@ -4383,7 +4396,7 @@ fi # SVR4 /usr/ucb/install, which tries to use the nonexistent group "staff" # ./install, which can be erroneously created by make from ./install.sh. echo $ac_n "checking for a BSD compatible install""... $ac_c" 1>&6 -echo "configure:4387: checking for a BSD compatible install" >&5 +echo "configure:4400: checking for a BSD compatible install" >&5 if test -z "$INSTALL"; then if eval "test \"`echo '$''{'ac_cv_path_install'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 @@ -4440,17 +4453,17 @@ for ac_hdr in string.h strings.h stdlib.h do ac_safe=`echo "$ac_hdr" | sed 'y%./+-%__p_%'` echo $ac_n "checking for $ac_hdr""... $ac_c" 1>&6 -echo "configure:4444: checking for $ac_hdr" >&5 +echo "configure:4457: checking for $ac_hdr" >&5 if eval "test \"`echo '$''{'ac_cv_header_$ac_safe'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext < EOF ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out" -{ (eval echo configure:4454: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; } +{ (eval echo configure:4467: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; } ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"` if test -z "$ac_err"; then rm -rf conftest* @@ -4597,6 +4610,7 @@ if test x${all_targets} = xfalse ; then bfd_mn10300_arch) ta="$ta m10300-dis.lo m10300-opc.lo" ;; bfd_ns32k_arch) ta="$ta ns32k-dis.lo" ;; bfd_openrisc_arch) ta="$ta openrisc-asm.lo openrisc-desc.lo openrisc-dis.lo openrisc-ibld.lo openrisc-opc.lo" using_cgen=yes ;; + bfd_or32_arch) ta="$ta or32-dis.lo or32-opc.lo" using_cgen=yes ;; bfd_pdp11_arch) ta="$ta pdp11-dis.lo pdp11-opc.lo" ;; bfd_pj_arch) ta="$ta pj-dis.lo pj-opc.lo" ;; bfd_powerpc_arch) ta="$ta ppc-dis.lo ppc-opc.lo" ;; diff --git a/opcodes/configure.in b/opcodes/configure.in index 302cd53..5b0e8b1 100644 --- a/opcodes/configure.in +++ b/opcodes/configure.in @@ -199,6 +199,7 @@ if test x${all_targets} = xfalse ; then bfd_mn10300_arch) ta="$ta m10300-dis.lo m10300-opc.lo" ;; bfd_ns32k_arch) ta="$ta ns32k-dis.lo" ;; bfd_openrisc_arch) ta="$ta openrisc-asm.lo openrisc-desc.lo openrisc-dis.lo openrisc-ibld.lo openrisc-opc.lo" using_cgen=yes ;; + bfd_or32_arch) ta="$ta or32-dis.lo or32-opc.lo" using_cgen=yes ;; bfd_pdp11_arch) ta="$ta pdp11-dis.lo pdp11-opc.lo" ;; bfd_pj_arch) ta="$ta pj-dis.lo pj-opc.lo" ;; bfd_powerpc_arch) ta="$ta ppc-dis.lo ppc-opc.lo" ;; diff --git a/opcodes/disassemble.c b/opcodes/disassemble.c index ab23635..c8690ed 100644 --- a/opcodes/disassemble.c +++ b/opcodes/disassemble.c @@ -1,5 +1,5 @@ /* Select disassembly routine for specified architecture. - Copyright 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001 + Copyright 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002 Free Software Foundation, Inc. This program is free software; you can redistribute it and/or modify @@ -49,6 +49,7 @@ Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ #define ARCH_mn10300 #define ARCH_ns32k #define ARCH_openrisc +#define ARCH_or32 #define ARCH_pdp11 #define ARCH_pj #define ARCH_powerpc @@ -235,6 +236,14 @@ disassembler (abfd) disassemble = print_insn_openrisc; break; #endif +#ifdef ARCH_or32 + case bfd_arch_or32: + if (bfd_big_endian (abfd)) + disassemble = print_insn_big_or32; + else + disassemble = print_insn_little_or32; + break; +#endif #ifdef ARCH_pdp11 case bfd_arch_pdp11: disassemble = print_insn_pdp11; diff --git a/opcodes/or32-dis.c b/opcodes/or32-dis.c new file mode 100644 index 0000000..cbfddcf --- /dev/null +++ b/opcodes/or32-dis.c @@ -0,0 +1,345 @@ +/* Instruction printing code for the OpenRISC 1000 + Copyright (C) 2002 Free Software Foundation, Inc. + Contributed by Damjan Lampret . + Modified from a29k port. + + This file is part of Binutils. + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ + +#define DEBUG 0 + +#include "dis-asm.h" +#include "opcode/or32.h" +#include "safe-ctype.h" +#include + +#define EXTEND29(x) ((x) & 0x10000000 ? ((x) | 0xf0000000) : ((x))) + +static void find_bytes_big PARAMS ((unsigned char *, unsigned long *)); +static void find_bytes_little PARAMS ((unsigned char *, unsigned long *)); +static unsigned long or32_extract PARAMS ((char, char *, unsigned long)); +static int or32_opcode_match PARAMS ((unsigned long, char *)); +static void or32_print_register PARAMS ((char, char *, unsigned long, struct disassemble_info *)); +static void or32_print_immediate PARAMS ((char, char *, unsigned long, struct disassemble_info *)); +static int print_insn PARAMS ((bfd_vma, struct disassemble_info *)); + +/* Now find the four bytes of INSN_CH and put them in *INSN. */ + +static void +find_bytes_big (insn_ch, insn) + unsigned char *insn_ch; + unsigned long *insn; +{ + *insn = + ((unsigned long) insn_ch[0] << 24) + + ((unsigned long) insn_ch[1] << 16) + + ((unsigned long) insn_ch[2] << 8) + + ((unsigned long) insn_ch[3]); +#if DEBUG + printf ("find_bytes_big3: %x\n", *insn); +#endif +} + +static void +find_bytes_little (insn_ch, insn) + unsigned char *insn_ch; + unsigned long *insn; +{ + *insn = + ((unsigned long) insn_ch[3] << 24) + + ((unsigned long) insn_ch[2] << 16) + + ((unsigned long) insn_ch[1] << 8) + + ((unsigned long) insn_ch[0]); +} + +typedef void (*find_byte_func_type) + PARAMS ((unsigned char *, unsigned long *)); + +static unsigned long +or32_extract (param_ch, enc_initial, insn) + char param_ch; + char *enc_initial; + unsigned long insn; +{ + char *enc; + unsigned long ret = 0; + int opc_pos = 0; + int param_pos = 0; + + for (enc = enc_initial; *enc != '\0'; enc++) + if (*enc == param_ch) + if (enc - 2 >= enc_initial && (*(enc - 2) == '0') && (*(enc - 1) == 'x')) + continue; + else + param_pos++; + +#if DEBUG + printf ("or32_extract: %c %x ", param_ch, param_pos); +#endif + opc_pos = 32; + + for (enc = enc_initial; *enc != '\0'; ) + if ((*enc == '0') && (*(enc + 1) == 'x')) + { + opc_pos -= 4; + + if ((param_ch == '0') || (param_ch == '1')) + { + unsigned long tmp = strtol (enc, NULL, 16); +#if DEBUG + printf (" enc=%s, tmp=%x ", enc, tmp); +#endif + if (param_ch == '0') + tmp = 15 - tmp; + ret |= tmp << opc_pos; + } + enc += 3; + } + else if ((*enc == '0') || (*enc == '1')) + { + opc_pos--; + if (param_ch == *enc) + ret |= 1 << opc_pos; + enc++; + } + else if (*enc == param_ch) + { + opc_pos--; + param_pos--; +#if DEBUG + printf ("\n ret=%x opc_pos=%x, param_pos=%x\n", ret, opc_pos, param_pos); +#endif + ret += ((insn >> opc_pos) & 0x1) << param_pos; + + if (!param_pos + && letter_signed (param_ch) + && ret >> letter_range (param_ch) - 1) + { +#if DEBUG + printf ("\n ret=%x opc_pos=%x, param_pos=%x\n", + ret, opc_pos, param_pos); +#endif + ret |= 0xffffffff << letter_range(param_ch); +#if DEBUG + printf ("\n after conversion to signed: ret=%x\n", ret); +#endif + } + enc++; + } + else if (ISALPHA (*enc)) + { + opc_pos--; + enc++; + } + else if (*enc == '-') + { + opc_pos--; + enc++; + } + else + enc++; + +#if DEBUG + printf ("ret=%x\n", ret); +#endif + return ret; +} + +static int +or32_opcode_match (insn, encoding) + unsigned long insn; + char *encoding; +{ + unsigned long ones, zeros; + +#if DEBUG + printf ("or32_opcode_match: %.8lx\n", insn); +#endif + ones = or32_extract ('1', encoding, insn); + zeros = or32_extract ('0', encoding, insn); + +#if DEBUG + printf ("ones: %x \n", ones); + printf ("zeros: %x \n", zeros); +#endif + if ((insn & ones) != ones) + { +#if DEBUG + printf ("ret1\n"); +#endif + return 0; + } + + if ((~insn & zeros) != zeros) + { +#if DEBUG + printf ("ret2\n"); +#endif + return 0; + } + +#if DEBUG + printf ("ret3\n"); +#endif + return 1; +} + +/* Print register to INFO->STREAM. Used only by print_insn. */ + +static void +or32_print_register (param_ch, encoding, insn, info) + char param_ch; + char *encoding; + unsigned long insn; + struct disassemble_info *info; +{ + int regnum = or32_extract (param_ch, encoding, insn); + +#if DEBUG + printf ("or32_print_register: %c, %s, %x\n", param_ch, encoding, insn); +#endif + if (param_ch == 'A') + (*info->fprintf_func) (info->stream, "r%d", regnum); + else if (param_ch == 'B') + (*info->fprintf_func) (info->stream, "r%d", regnum); + else if (param_ch == 'D') + (*info->fprintf_func) (info->stream, "r%d", regnum); + else if (regnum < 16) + (*info->fprintf_func) (info->stream, "r%d", regnum); + else if (regnum < 32) + (*info->fprintf_func) (info->stream, "r%d", regnum-16); + else + (*info->fprintf_func) (info->stream, "X%d", regnum); +} + +/* Print immediate to INFO->STREAM. Used only by print_insn. */ + +static void +or32_print_immediate (param_ch, encoding, insn, info) + char param_ch; + char *encoding; + unsigned long insn; + struct disassemble_info *info; +{ + int imm = or32_extract(param_ch, encoding, insn); + + if (letter_signed(param_ch)) + (*info->fprintf_func) (info->stream, "0x%x", imm); +/* (*info->fprintf_func) (info->stream, "%d", imm); */ + else + (*info->fprintf_func) (info->stream, "0x%x", imm); +} + +/* Print one instruction from MEMADDR on INFO->STREAM. + Return the size of the instruction (always 4 on or32). */ + +static int +print_insn (memaddr, info) + bfd_vma memaddr; + struct disassemble_info *info; +{ + /* The raw instruction. */ + unsigned char insn_ch[4]; + /* Address. Will be sign extened 27-bit. */ + int addr; + /* The four bytes of the instruction. */ + unsigned long insn; + find_byte_func_type find_byte_func = (find_byte_func_type)info->private_data; + struct or32_opcode CONST * opcode; + + { + int status = + (*info->read_memory_func) (memaddr, (bfd_byte *) &insn_ch[0], 4, info); + + if (status != 0) + { + (*info->memory_error_func) (status, memaddr, info); + return -1; + } + } + + (*find_byte_func) (&insn_ch[0], &insn); + + for (opcode = &or32_opcodes[0]; + opcode < &or32_opcodes[or32_num_opcodes]; + ++opcode) + { + if (or32_opcode_match (insn, opcode->encoding)) + { + char *s; + + (*info->fprintf_func) (info->stream, "%s ", opcode->name); + + for (s = opcode->args; *s != '\0'; ++s) + { + switch (*s) + { + case '\0': + return 4; + + case 'r': + or32_print_register (*++s, opcode->encoding, insn, info); + break; + + case 'X': + addr = or32_extract ('X', opcode->encoding, insn) << 2; + + /* Calulate the correct address. XXX is this really correct ?? */ + addr = memaddr + EXTEND29 (addr); + + (*info->print_address_func) + (addr, info); + break; + + default: + if (strchr (opcode->encoding, *s)) + or32_print_immediate (*s, opcode->encoding, insn, info); + else + (*info->fprintf_func) (info->stream, "%c", *s); + } + } + + return 4; + } + } + + /* This used to be %8x for binutils. */ + (*info->fprintf_func) + (info->stream, ".word 0x%08x", insn); + return 4; +} + +/* Disassemble a big-endian or32 instruction. */ + +int +print_insn_big_or32 (memaddr, info) + bfd_vma memaddr; + struct disassemble_info *info; +{ + info->private_data = (PTR) find_bytes_big; + return print_insn (memaddr, info); +} + +/* Disassemble a little-endian or32 instruction. */ + +int +print_insn_little_or32 (memaddr, info) + bfd_vma memaddr; + struct disassemble_info *info; +{ + info->private_data = (PTR) find_bytes_little; + return print_insn (memaddr, info); +} diff --git a/opcodes/or32-opc.c b/opcodes/or32-opc.c new file mode 100644 index 0000000..841c72f --- /dev/null +++ b/opcodes/or32-opc.c @@ -0,0 +1,1049 @@ +/* Table of opcodes for the OpenRISC 1000 ISA. + Copyright 2002 Free Software Foundation, Inc. + Contributed by Damjan Lampret (lampret@opencores.org). + + This file is part of gen_or1k_isa, or1k, GDB and GAS. + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ + +/* We treat all letters the same in encode/decode routines so + we need to assign some characteristics to them like signess etc. */ +#include +#include +#include +#include "safe-ctype.h" +#include "ansidecl.h" +#ifdef HAVE_CONFIG_H +# include "config.h" +#endif +#include "opcode/or32.h" + +static unsigned long insn_extract PARAMS ((char, char *)); +static unsigned long * cover_insn PARAMS ((unsigned long *, int, unsigned int)); +static int num_ones PARAMS ((unsigned long)); +static struct insn_op_struct * parse_params PARAMS ((const struct or32_opcode *, struct insn_op_struct *)); +static unsigned long or32_extract PARAMS ((char, char *, unsigned long)); +static void or32_print_register PARAMS ((char, char *, unsigned long)); +static void or32_print_immediate PARAMS ((char, char *, unsigned long)); +static unsigned long extend_imm PARAMS ((unsigned long, char)); + +const struct or32_letter or32_letters[] = + { + { 'A', NUM_UNSIGNED }, + { 'B', NUM_UNSIGNED }, + { 'D', NUM_UNSIGNED }, + { 'I', NUM_SIGNED }, + { 'K', NUM_UNSIGNED }, + { 'L', NUM_UNSIGNED }, + { 'N', NUM_SIGNED }, + { '0', NUM_UNSIGNED }, + { '\0', 0 } /* Dummy entry. */ + }; + +/* Opcode encoding: + machine[31:30]: first two bits of opcode + 00 - neither of source operands is GPR + 01 - second source operand is GPR (rB) + 10 - first source operand is GPR (rA) + 11 - both source operands are GPRs (rA and rB) + machine[29:26]: next four bits of opcode + machine[25:00]: instruction operands (specific to individual instruction) + + Recommendation: irrelevant instruction bits should be set with a value of + bits in same positions of instruction preceding current instruction in the + code (when assembling). */ + +#define EFN &l_none + +#ifdef HAS_EXECUTION +#define EF(func) &(func) +#define EFI &l_invalid +#else /* HAS_EXECUTION */ +#define EF(func) EFN +#define EFI EFN +#endif /* HAS_EXECUTION */ + +const struct or32_opcode or32_opcodes[] = + { + { "l.j", "N", "00 0x0 NNNNN NNNNN NNNN NNNN NNNN NNNN", EF(l_j), OR32_IF_DELAY }, + { "l.jal", "N", "00 0x1 NNNNN NNNNN NNNN NNNN NNNN NNNN", EF(l_jal), OR32_IF_DELAY }, + { "l.bnf", "N", "00 0x3 NNNNN NNNNN NNNN NNNN NNNN NNNN", EF(l_bnf), OR32_IF_DELAY | OR32_R_FLAG}, + { "l.bf", "N", "00 0x4 NNNNN NNNNN NNNN NNNN NNNN NNNN", EF(l_bf), OR32_IF_DELAY | OR32_R_FLAG }, + { "l.nop", "K", "00 0x5 01--- ----- KKKK KKKK KKKK KKKK", EF(l_nop), 0 }, + { "l.movhi", "rD,K", "00 0x6 DDDDD ----0 KKKK KKKK KKKK KKKK", EF(l_movhi), 0 }, /*MM*/ + { "l.macrc", "rD", "00 0x6 DDDDD ----1 0000 0000 0000 0000", EF(l_macrc), 0 }, /*MM*/ + + { "l.sys", "K", "00 0x8 00000 00000 KKKK KKKK KKKK KKKK", EF(l_sys), 0 }, + { "l.trap", "K", "00 0x8 01000 00000 KKKK KKKK KKKK KKKK", EF(l_trap), 0 }, /* CZ 21/06/01 */ + { "l.msync", "", "00 0x8 10000 00000 0000 0000 0000 0000", EFN, 0 }, + { "l.psync", "", "00 0x8 10100 00000 0000 0000 0000 0000", EFN, 0 }, + { "l.csync", "", "00 0x8 11000 00000 0000 0000 0000 0000", EFN, 0 }, + { "l.rfe", "", "00 0x9 ----- ----- ---- ---- ---- ----", EF(l_rfe), OR32_IF_DELAY }, + + { "lv.all_eq.b","rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x1 0x0", EFI, 0 }, + { "lv.all_eq.h","rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x1 0x1", EFI, 0 }, + { "lv.all_ge.b","rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x1 0x2", EFI, 0 }, + { "lv.all_ge.h","rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x1 0x3", EFI, 0 }, + { "lv.all_gt.b","rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x1 0x4", EFI, 0 }, + { "lv.all_gt.h","rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x1 0x5", EFI, 0 }, + { "lv.all_le.b","rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x1 0x6", EFI, 0 }, + { "lv.all_le.h","rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x1 0x7", EFI, 0 }, + { "lv.all_lt.b","rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x1 0x8", EFI, 0 }, + { "lv.all_lt.h","rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x1 0x9", EFI, 0 }, + { "lv.all_ne.b","rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x1 0xA", EFI, 0 }, + { "lv.all_ne.h","rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x1 0xB", EFI, 0 }, + { "lv.any_eq.b","rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x2 0x0", EFI, 0 }, + { "lv.any_eq.h","rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x2 0x1", EFI, 0 }, + { "lv.any_ge.b","rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x2 0x2", EFI, 0 }, + { "lv.any_ge.h","rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x2 0x3", EFI, 0 }, + { "lv.any_gt.b","rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x2 0x4", EFI, 0 }, + { "lv.any_gt.h","rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x2 0x5", EFI, 0 }, + { "lv.any_le.b","rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x2 0x6", EFI, 0 }, + { "lv.any_le.h","rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x2 0x7", EFI, 0 }, + { "lv.any_lt.b","rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x2 0x8", EFI, 0 }, + { "lv.any_lt.h","rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x2 0x9", EFI, 0 }, + { "lv.any_ne.b","rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x2 0xA", EFI, 0 }, + { "lv.any_ne.h","rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x2 0xB", EFI, 0 }, + { "lv.add.b", "rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x3 0x0", EFI, 0 }, + { "lv.add.h", "rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x3 0x1", EFI, 0 }, + { "lv.adds.b", "rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x3 0x2", EFI, 0 }, + { "lv.adds.h", "rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x3 0x3", EFI, 0 }, + { "lv.addu.b", "rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x3 0x4", EFI, 0 }, + { "lv.addu.h", "rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x3 0x5", EFI, 0 }, + { "lv.addus.b","rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x3 0x6", EFI, 0 }, + { "lv.addus.h","rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x3 0x7", EFI, 0 }, + { "lv.and", "rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x3 0x8", EFI, 0 }, + { "lv.avg.b", "rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x3 0x9", EFI, 0 }, + { "lv.avg.h", "rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x3 0xA", EFI, 0 }, + { "lv.cmp_eq.b","rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x4 0x0", EFI, 0 }, + { "lv.cmp_eq.h","rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x4 0x1", EFI, 0 }, + { "lv.cmp_ge.b","rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x4 0x2", EFI, 0 }, + { "lv.cmp_ge.h","rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x4 0x3", EFI, 0 }, + { "lv.cmp_gt.b","rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x4 0x4", EFI, 0 }, + { "lv.cmp_gt.h","rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x4 0x5", EFI, 0 }, + { "lv.cmp_le.b","rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x4 0x6", EFI, 0 }, + { "lv.cmp_le.h","rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x4 0x7", EFI, 0 }, + { "lv.cmp_lt.b","rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x4 0x8", EFI, 0 }, + { "lv.cmp_lt.h","rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x4 0x9", EFI, 0 }, + { "lv.cmp_ne.b","rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x4 0xA", EFI, 0 }, + { "lv.cmp_ne.h","rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x4 0xB", EFI, 0 }, + { "lv.madds.h","rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x5 0x4", EFI, 0 }, + { "lv.max.b", "rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x5 0x5", EFI, 0 }, + { "lv.max.h", "rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x5 0x6", EFI, 0 }, + { "lv.merge.b","rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x5 0x7", EFI, 0 }, + { "lv.merge.h","rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x5 0x8", EFI, 0 }, + { "lv.min.b", "rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x5 0x9", EFI, 0 }, + { "lv.min.h", "rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x5 0xA", EFI, 0 }, + { "lv.msubs.h","rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x5 0xB", EFI, 0 }, + { "lv.muls.h", "rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x5 0xC", EFI, 0 }, + { "lv.nand", "rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x5 0xD", EFI, 0 }, + { "lv.nor", "rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x5 0xE", EFI, 0 }, + { "lv.or", "rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x5 0xF", EFI, 0 }, + { "lv.pack.b", "rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x6 0x0", EFI, 0 }, + { "lv.pack.h", "rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x6 0x1", EFI, 0 }, + { "lv.packs.b","rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x6 0x2", EFI, 0 }, + { "lv.packs.h","rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x6 0x3", EFI, 0 }, + { "lv.packus.b","rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x6 0x4", EFI, 0 }, + { "lv.packus.h","rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x6 0x5", EFI, 0 }, + { "lv.perm.n", "rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x6 0x6", EFI, 0 }, + { "lv.rl.b", "rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x6 0x7", EFI, 0 }, + { "lv.rl.h", "rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x6 0x8", EFI, 0 }, + { "lv.sll.b", "rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x6 0x9", EFI, 0 }, + { "lv.sll.h", "rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x6 0xA", EFI, 0 }, + { "lv.sll", "rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x6 0xB", EFI, 0 }, + { "lv.srl.b", "rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x6 0xC", EFI, 0 }, + { "lv.srl.h", "rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x6 0xD", EFI, 0 }, + { "lv.sra.b", "rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x6 0xE", EFI, 0 }, + { "lv.sra.h", "rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x6 0xF", EFI, 0 }, + { "lv.srl", "rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x7 0x0", EFI, 0 }, + { "lv.sub.b", "rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x7 0x1", EFI, 0 }, + { "lv.sub.h", "rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x7 0x2", EFI, 0 }, + { "lv.subs.b", "rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x7 0x3", EFI, 0 }, + { "lv.subs.h", "rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x7 0x4", EFI, 0 }, + { "lv.subu.b", "rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x7 0x5", EFI, 0 }, + { "lv.subu.h", "rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x7 0x6", EFI, 0 }, + { "lv.subus.b","rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x7 0x7", EFI, 0 }, + { "lv.subus.h","rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x7 0x8", EFI, 0 }, + { "lv.unpack.b","rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x7 0x9", EFI, 0 }, + { "lv.unpack.h","rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x7 0xA", EFI, 0 }, + { "lv.xor", "rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x7 0xB", EFI, 0 }, + { "lv.cust1", "", "00 0xA ----- ----- ---- ---- 0xC ----", EFI, 0 }, + { "lv.cust2", "", "00 0xA ----- ----- ---- ---- 0xD ----", EFI, 0 }, + { "lv.cust3", "", "00 0xA ----- ----- ---- ---- 0xE ----", EFI, 0 }, + { "lv.cust4", "", "00 0xA ----- ----- ---- ---- 0xF ----", EFI, 0 }, + + { "lf.add.s", "rD,rA,rB", "00 0xB DDDDD AAAAA BBBB B--- 0x1 0x0", EFI, 0 }, + { "lf.sub.s", "rD,rA,rB", "00 0xB DDDDD AAAAA BBBB B--- 0x1 0x1", EFI, 0 }, + { "lf.mul.s", "rD,rA,rB", "00 0xB DDDDD AAAAA BBBB B--- 0x1 0x2", EFI, 0 }, + { "lf.div.s", "rD,rA,rB", "00 0xB DDDDD AAAAA BBBB B--- 0x1 0x3", EFI, 0 }, + { "lf.itof.s", "rD,rA", "00 0xB DDDDD AAAAA BBBB B--- 0x1 0x4", EFI, 0 }, + { "lf.ftoi.s", "rD,rA", "00 0xB DDDDD AAAAA BBBB B--- 0x1 0x5", EFI, 0 }, + { "lf.rem.s", "rD,rA,rB", "00 0xB DDDDD AAAAA BBBB B--- 0x1 0x6", EFI, 0 }, + { "lf.madd.s", "rD,rA,rB", "00 0xB DDDDD AAAAA BBBB B--- 0x1 0x7", EFI, 0 }, + { "lf.sfeq.s", "rA,rB", "00 0xB ----- AAAAA BBBB B--- 0x1 0x8", EFI, 0 }, + { "lf.sfne.s", "rA,rB", "00 0xB ----- AAAAA BBBB B--- 0x1 0x9", EFI, 0 }, + { "lf.sfgt.s", "rA,rB", "00 0xB ----- AAAAA BBBB B--- 0x1 0xA", EFI, 0 }, + { "lf.sfge.s", "rA,rB", "00 0xB ----- AAAAA BBBB B--- 0x1 0xB", EFI, 0 }, + { "lf.sflt.s", "rA,rB", "00 0xB ----- AAAAA BBBB B--- 0x1 0xC", EFI, 0 }, + { "lf.sfle.s", "rA,rB", "00 0xB ----- AAAAA BBBB B--- 0x1 0xD", EFI, 0 }, + { "lf.cust1.s", "", "00 0xB ----- ----- ---- ---- 0xE ----", EFI, 0 }, + + { "lf.add.d", "rD,rA,rB", "00 0xC DDDDD AAAAA BBBB B--- 0x1 0x0", EFI, 0 }, + { "lf.sub.d", "rD,rA,rB", "00 0xC DDDDD AAAAA BBBB B--- 0x1 0x1", EFI, 0 }, + { "lf.mul.d", "rD,rA,rB", "00 0xC DDDDD AAAAA BBBB B--- 0x1 0x2", EFI, 0 }, + { "lf.div.d", "rD,rA,rB", "00 0xC DDDDD AAAAA BBBB B--- 0x1 0x3", EFI, 0 }, + { "lf.itof.d", "rD,rA", "00 0xC DDDDD AAAAA BBBB B--- 0x1 0x4", EFI, 0 }, + { "lf.ftoi.d", "rD,rA", "00 0xC DDDDD AAAAA BBBB B--- 0x1 0x5", EFI, 0 }, + { "lf.rem.d", "rD,rA,rB", "00 0xC DDDDD AAAAA BBBB B--- 0x1 0x6", EFI, 0 }, + { "lf.madd.d", "rD,rA,rB", "00 0xC DDDDD AAAAA BBBB B--- 0x1 0x7", EFI, 0 }, + { "lf.sfeq.d", "rA,rB", "00 0xC ----- AAAAA BBBB B--- 0x1 0x8", EFI, 0 }, + { "lf.sfne.d", "rA,rB", "00 0xC ----- AAAAA BBBB B--- 0x1 0x9", EFI, 0 }, + { "lf.sfgt.d", "rA,rB", "00 0xC ----- AAAAA BBBB B--- 0x1 0xA", EFI, 0 }, + { "lf.sfge.d", "rA,rB", "00 0xC ----- AAAAA BBBB B--- 0x1 0xB", EFI, 0 }, + { "lf.sflt.d", "rA,rB", "00 0xC ----- AAAAA BBBB B--- 0x1 0xC", EFI, 0 }, + { "lf.sfle.d", "rA,rB", "00 0xC ----- AAAAA BBBB B--- 0x1 0xD", EFI, 0 }, + { "lf.cust1.d", "", "00 0xC ----- ----- ---- ---- 0xE ----", EFI, 0 }, + + { "lvf.ld", "rD,0(rA)", "00 0xD DDDDD AAAAA ---- ---- 0x0 0x0", EFI, 0 }, + { "lvf.lw", "rD,0(rA)", "00 0xD DDDDD AAAAA ---- ---- 0x0 0x1", EFI, 0 }, + { "lvf.sd", "0(rA),rB", "00 0xD ----- AAAAA BBBB B--- 0x1 0x0", EFI, 0 }, + { "lvf.sw", "0(rA),rB", "00 0xD ----- AAAAA BBBB B--- 0x1 0x1", EFI, 0 }, + + { "l.jr", "rB", "01 0x1 ----- ----- BBBB B--- ---- ----", EF(l_jr), OR32_IF_DELAY }, + { "l.jalr", "rB", "01 0x2 ----- ----- BBBB B--- ---- ----", EF(l_jalr), OR32_IF_DELAY }, + { "l.maci", "rB,I", "01 0x3 IIIII ----- BBBB BIII IIII IIII", EF(l_mac), 0 }, + { "l.cust1", "", "01 0xC ----- ----- ---- ---- ---- ----", EF(l_cust1), 0 }, + { "l.cust2", "", "01 0xD ----- ----- ---- ---- ---- ----", EF(l_cust2), 0 }, + { "l.cust3", "", "01 0xE ----- ----- ---- ---- ---- ----", EF(l_cust3), 0 }, + { "l.cust4", "", "01 0xF ----- ----- ---- ---- ---- ----", EF(l_cust4), 0 }, + + { "l.ld", "rD,I(rA)", "10 0x0 DDDDD AAAAA IIII IIII IIII IIII", EFI, 0 }, + { "l.lwz", "rD,I(rA)", "10 0x1 DDDDD AAAAA IIII IIII IIII IIII", EF(l_lwz), 0 }, + { "l.lws", "rD,I(rA)", "10 0x2 DDDDD AAAAA IIII IIII IIII IIII", EFI, 0 }, + { "l.lbz", "rD,I(rA)", "10 0x3 DDDDD AAAAA IIII IIII IIII IIII", EF(l_lbz), 0 }, + { "l.lbs", "rD,I(rA)", "10 0x4 DDDDD AAAAA IIII IIII IIII IIII", EF(l_lbs), 0 }, + { "l.lhz", "rD,I(rA)", "10 0x5 DDDDD AAAAA IIII IIII IIII IIII", EF(l_lhz), 0 }, + { "l.lhs", "rD,I(rA)", "10 0x6 DDDDD AAAAA IIII IIII IIII IIII", EF(l_lhs), 0 }, + + { "l.addi", "rD,rA,I", "10 0x7 DDDDD AAAAA IIII IIII IIII IIII", EF(l_add), 0 }, + { "l.addic", "rD,rA,I", "10 0x8 DDDDD AAAAA IIII IIII IIII IIII", EFI, 0 }, + { "l.andi", "rD,rA,K", "10 0x9 DDDDD AAAAA KKKK KKKK KKKK KKKK", EF(l_and), 0 }, + { "l.ori", "rD,rA,K", "10 0xA DDDDD AAAAA KKKK KKKK KKKK KKKK", EF(l_or), 0 }, + { "l.xori", "rD,rA,I", "10 0xB DDDDD AAAAA IIII IIII IIII IIII", EF(l_xor), 0 }, + { "l.muli", "rD,rA,I", "10 0xC DDDDD AAAAA IIII IIII IIII IIII", EFI, 0 }, + { "l.mfspr", "rD,rA,K", "10 0xD DDDDD AAAAA KKKK KKKK KKKK KKKK", EF(l_mfspr), 0 }, + { "l.slli", "rD,rA,L", "10 0xE DDDDD AAAAA ---- ---- 00LL LLLL", EF(l_sll), 0 }, + { "l.srli", "rD,rA,L", "10 0xE DDDDD AAAAA ---- ---- 01LL LLLL", EF(l_srl), 0 }, + { "l.srai", "rD,rA,L", "10 0xE DDDDD AAAAA ---- ---- 10LL LLLL", EF(l_sra), 0 }, + { "l.rori", "rD,rA,L", "10 0xE DDDDD AAAAA ---- ---- 11LL LLLL", EFI, 0 }, + + { "l.sfeqi", "rA,I", "10 0xF 00000 AAAAA IIII IIII IIII IIII", EF(l_sfeq), OR32_W_FLAG }, + { "l.sfnei", "rA,I", "10 0xF 00001 AAAAA IIII IIII IIII IIII", EF(l_sfne), OR32_W_FLAG }, + { "l.sfgtui", "rA,I", "10 0xF 00010 AAAAA IIII IIII IIII IIII", EF(l_sfgtu), OR32_W_FLAG }, + { "l.sfgeui", "rA,I", "10 0xF 00011 AAAAA IIII IIII IIII IIII", EF(l_sfgeu), OR32_W_FLAG }, + { "l.sfltui", "rA,I", "10 0xF 00100 AAAAA IIII IIII IIII IIII", EF(l_sfltu), OR32_W_FLAG }, + { "l.sfleui", "rA,I", "10 0xF 00101 AAAAA IIII IIII IIII IIII", EF(l_sfleu), OR32_W_FLAG }, + { "l.sfgtsi", "rA,I", "10 0xF 01010 AAAAA IIII IIII IIII IIII", EF(l_sfgts), OR32_W_FLAG }, + { "l.sfgesi", "rA,I", "10 0xF 01011 AAAAA IIII IIII IIII IIII", EF(l_sfges), OR32_W_FLAG }, + { "l.sfltsi", "rA,I", "10 0xF 01100 AAAAA IIII IIII IIII IIII", EF(l_sflts), OR32_W_FLAG }, + { "l.sflesi", "rA,I", "10 0xF 01101 AAAAA IIII IIII IIII IIII", EF(l_sfles), OR32_W_FLAG }, + + { "l.mtspr", "rA,rB,K", "11 0x0 KKKKK AAAAA BBBB BKKK KKKK KKKK", EF(l_mtspr), 0 }, + { "l.mac", "rA,rB", "11 0x1 ----- AAAAA BBBB B--- ---- 0x1", EF(l_mac), 0 }, /*MM*/ + { "l.msb", "rA,rB", "11 0x1 ----- AAAAA BBBB B--- ---- 0x2", EF(l_msb), 0 }, /*MM*/ + + { "l.sd", "I(rA),rB", "11 0x4 IIIII AAAAA BBBB BIII IIII IIII", EFI, 0 }, + { "l.sw", "I(rA),rB", "11 0x5 IIIII AAAAA BBBB BIII IIII IIII", EF(l_sw), 0 }, + { "l.sb", "I(rA),rB", "11 0x6 IIIII AAAAA BBBB BIII IIII IIII", EF(l_sb), 0 }, + { "l.sh", "I(rA),rB", "11 0x7 IIIII AAAAA BBBB BIII IIII IIII", EF(l_sh), 0 }, + + { "l.add", "rD,rA,rB", "11 0x8 DDDDD AAAAA BBBB B-00 ---- 0x0", EF(l_add), 0 }, + { "l.addc", "rD,rA,rB", "11 0x8 DDDDD AAAAA BBBB B-00 ---- 0x1", EFI, 0 }, + { "l.sub", "rD,rA,rB", "11 0x8 DDDDD AAAAA BBBB B-00 ---- 0x2", EF(l_sub), 0 }, + { "l.and", "rD,rA,rB", "11 0x8 DDDDD AAAAA BBBB B-00 ---- 0x3", EF(l_and), 0 }, + { "l.or", "rD,rA,rB", "11 0x8 DDDDD AAAAA BBBB B-00 ---- 0x4", EF(l_or), 0 }, + { "l.xor", "rD,rA,rB", "11 0x8 DDDDD AAAAA BBBB B-00 ---- 0x5", EF(l_xor), 0 }, + { "l.mul", "rD,rA,rB", "11 0x8 DDDDD AAAAA BBBB B-11 ---- 0x6", EF(l_mul), 0 }, + + { "l.sll", "rD,rA,rB", "11 0x8 DDDDD AAAAA BBBB B-00 00-- 0x8", EF(l_sll), 0 }, + { "l.srl", "rD,rA,rB", "11 0x8 DDDDD AAAAA BBBB B-00 01-- 0x8", EF(l_srl), 0 }, + { "l.sra", "rD,rA,rB", "11 0x8 DDDDD AAAAA BBBB B-00 10-- 0x8", EF(l_sra), 0 }, + { "l.ror", "rD,rA,rB", "11 0x8 DDDDD AAAAA BBBB B-00 11-- 0x8", EFI, 0 }, + { "l.div", "rD,rA,rB", "11 0x8 DDDDD AAAAA BBBB B-00 ---- 0x9", EF(l_div), 0 }, + { "l.divu", "rD,rA,rB", "11 0x8 DDDDD AAAAA BBBB B-00 ---- 0xA", EF(l_divu), 0 }, + { "l.mulu", "rD,rA,rB", "11 0x8 DDDDD AAAAA BBBB B-11 ---- 0xB", EFI, 0 }, + { "l.exths", "rD,rA,rB", "11 0x8 DDDDD AAAAA BBBB B-00 00-- 0xC", EFI, 0 }, + { "l.extbs", "rD,rA,rB", "11 0x8 DDDDD AAAAA BBBB B-00 01-- 0xC", EFI, 0 }, + { "l.exthz", "rD,rA,rB", "11 0x8 DDDDD AAAAA BBBB B-00 10-- 0xC", EFI, 0 }, + { "l.extbz", "rD,rA,rB", "11 0x8 DDDDD AAAAA BBBB B-00 11-- 0xC", EFI, 0 }, + { "l.extws", "rD,rA,rB", "11 0x8 DDDDD AAAAA BBBB B-00 00-- 0xD", EFI, 0 }, + { "l.extwz", "rD,rA,rB", "11 0x8 DDDDD AAAAA BBBB B-00 01-- 0xD", EFI, 0 }, + { "l.cmov", "rD,rA,rB", "11 0x8 DDDDD AAAAA BBBB B-00 ---- 0xE", EFI, 0 }, + { "l.ff1", "rD,rA,rB", "11 0x8 DDDDD AAAAA BBBB B-00 ---- 0xF", EFI, 0 }, + + { "l.sfeq", "rA,rB", "11 0x9 00000 AAAAA BBBB B--- ---- ----", EF(l_sfeq), OR32_W_FLAG }, + { "l.sfne", "rA,rB", "11 0x9 00001 AAAAA BBBB B--- ---- ----", EF(l_sfne), OR32_W_FLAG }, + { "l.sfgtu", "rA,rB", "11 0x9 00010 AAAAA BBBB B--- ---- ----", EF(l_sfgtu), OR32_W_FLAG }, + { "l.sfgeu", "rA,rB", "11 0x9 00011 AAAAA BBBB B--- ---- ----", EF(l_sfgeu), OR32_W_FLAG }, + { "l.sfltu", "rA,rB", "11 0x9 00100 AAAAA BBBB B--- ---- ----", EF(l_sfltu), OR32_W_FLAG }, + { "l.sfleu", "rA,rB", "11 0x9 00101 AAAAA BBBB B--- ---- ----", EF(l_sfleu), OR32_W_FLAG }, + { "l.sfgts", "rA,rB", "11 0x9 01010 AAAAA BBBB B--- ---- ----", EF(l_sfgts), OR32_W_FLAG }, + { "l.sfges", "rA,rB", "11 0x9 01011 AAAAA BBBB B--- ---- ----", EF(l_sfges), OR32_W_FLAG }, + { "l.sflts", "rA,rB", "11 0x9 01100 AAAAA BBBB B--- ---- ----", EF(l_sflts), OR32_W_FLAG }, + { "l.sfles", "rA,rB", "11 0x9 01101 AAAAA BBBB B--- ---- ----", EF(l_sfles), OR32_W_FLAG }, + + { "l.cust5", "", "11 0xC ----- ----- ---- ---- ---- ----", EFI, 0 }, + { "l.cust6", "", "11 0xD ----- ----- ---- ---- ---- ----", EFI, 0 }, + { "l.cust7", "", "11 0xE ----- ----- ---- ---- ---- ----", EFI, 0 }, + { "l.cust8", "", "11 0xF ----- ----- ---- ---- ---- ----", EFI, 0 }, + + /* This section should not be defined in or1ksim, since it contains duplicates, + which would cause machine builder to complain. */ +#ifdef HAS_CUST + { "l.cust5_1", "rD", "11 0xC DDDDD ----- ---- ---- ---- ----", EFI, 0 }, + { "l.cust5_2", "rD,rA" , "11 0xC DDDDD AAAAA ---- ---- ---- ----", EFI, 0 }, + { "l.cust5_3", "rD,rA,rB", "11 0xC DDDDD AAAAA BBBB B--- ---- ----", EFI, 0 }, + + { "l.cust6_1", "rD", "11 0xD DDDDD ----- ---- ---- ---- ----", EFI, 0 }, + { "l.cust6_2", "rD,rA" , "11 0xD DDDDD AAAAA ---- ---- ---- ----", EFI, 0 }, + { "l.cust6_3", "rD,rA,rB", "11 0xD DDDDD AAAAA BBBB B--- ---- ----", EFI, 0 }, + + { "l.cust7_1", "rD", "11 0xE DDDDD ----- ---- ---- ---- ----", EFI, 0 }, + { "l.cust7_2", "rD,rA" , "11 0xE DDDDD AAAAA ---- ---- ---- ----", EFI, 0 }, + { "l.cust7_3", "rD,rA,rB", "11 0xE DDDDD AAAAA BBBB B--- ---- ----", EFI, 0 }, + + { "l.cust8_1", "rD", "11 0xF DDDDD ----- ---- ---- ---- ----", EFI, 0 }, + { "l.cust8_2", "rD,rA" , "11 0xF DDDDD AAAAA ---- ---- ---- ----", EFI, 0 }, + { "l.cust8_3", "rD,rA,rB", "11 0xF DDDDD AAAAA BBBB B--- ---- ----", EFI, 0 }, +#endif + + /* Dummy entry, not included in num_opcodes. This + lets code examine entry i+1 without checking + if we've run off the end of the table. */ + { "", "", "", EFI, 0 } +}; + +#undef EFI +#undef EFN +#undef EF + +/* Define dummy, if debug is not defined. */ + +#if !defined HAS_DEBUG +static void debug PARAMS ((int, const char *, ...)); + +static void +debug (int level, const char *format, ...) +{ + /* Just to get rid of warnings. */ + format = level = 0; +} +#endif + +const unsigned int or32_num_opcodes = ((sizeof(or32_opcodes)) / (sizeof(struct or32_opcode))) - 1; + +/* Calculates instruction length in bytes. Always 4 for OR32. */ + +int +insn_len (insn_index) + int insn_index ATTRIBUTE_UNUSED; +{ + return 4; +} + +/* Is individual insn's operand signed or unsigned? */ + +int +letter_signed (l) + char l; +{ + const struct or32_letter *pletter; + + for (pletter = or32_letters; pletter->letter != '\0'; pletter++) + if (pletter->letter == l) + return pletter->sign; + + printf ("letter_signed(%c): Unknown letter.\n", l); + return 0; +} + +/* Number of letters in the individual lettered operand. */ + +int +letter_range (l) + char l; +{ + const struct or32_opcode *pinsn; + char *enc; + int range = 0; + + for (pinsn = or32_opcodes; strlen(pinsn->name); pinsn++) + { + if (strchr (pinsn->encoding,l)) + { + for (enc = pinsn->encoding; *enc != '\0'; enc++) + if ((*enc == '0') && (*(enc+1) == 'x')) + enc += 2; + else if (*enc == l) + range++; + return range; + } + } + + printf ("\nABORT: letter_range(%c): Never used letter.\n", l); + exit (1); +} + +/* MM: Returns index of given instruction name. */ + +int +insn_index (char *insn) +{ + int i, found = -1; + + for (i = 0; i < or32_num_opcodes; i++) + if (!strcmp (or32_opcodes[i].name, insn)) + { + found = i; + break; + } + return found; +} + +const char * +insn_name (index) + int index; +{ + if (index >= 0 && index < or32_num_opcodes) + return or32_opcodes[index].name; + else + return "???"; +} + +void +l_none () +{ +} + +/* Finite automata for instruction decoding building code. */ + +/* Find simbols in encoding. */ +static unsigned long +insn_extract (param_ch, enc_initial) + char param_ch; + char *enc_initial; +{ + char *enc; + unsigned long ret = 0; + unsigned opc_pos = 32; + + for (enc = enc_initial; *enc != '\0'; ) + if ((*enc == '0') && (*(enc + 1) == 'x')) + { + unsigned long tmp = strtol (enc+2, NULL, 16); + + opc_pos -= 4; + if (param_ch == '0' || param_ch == '1') + { + if (param_ch == '0') + tmp = 15 - tmp; + ret |= tmp << opc_pos; + } + enc += 3; + } + else + { + if (*enc == '0' || *enc == '1' || *enc == '-' || ISALPHA (*enc)) + { + opc_pos--; + if (param_ch == *enc) + ret |= 1 << opc_pos; + } + enc++; + } + return ret; +} + +#define MAX_AUTOMATA_SIZE (1200) +#define MAX_OP_TABLE_SIZE (1200) +#define LEAF_FLAG (0x80000000) +#define MAX_LEN (8) + +#ifndef MIN +# define MIN(x,y) ((x) < (y) ? (x) : (y)) +#endif + +unsigned long *automata; +int nuncovered; +int curpass = 0; + +/* MM: Struct that hold runtime build information about instructions. */ +struct temp_insn_struct +{ + unsigned long insn; + unsigned long insn_mask; + int in_pass; +} *ti; + +struct insn_op_struct *op_data, **op_start; + +/* Recursive utility function used to find best match and to build automata. */ + +static unsigned long * +cover_insn (cur, pass, mask) + unsigned long * cur; + int pass; + unsigned int mask; +{ + int best_first = 0, best_len = 0, i, last_match = -1, ninstr = 0; + unsigned long cur_mask = mask; + unsigned long *next; + + for (i = 0; i < or32_num_opcodes; i++) + if (ti[i].in_pass == pass) + { + cur_mask &= ti[i].insn_mask; + ninstr++; + last_match = i; + } + + debug (8, "%08X %08X\n", mask, cur_mask); + + if (ninstr == 0) + return 0; + + if (ninstr == 1) + { + /* Leaf holds instruction index. */ + debug (8, "%i>I%i %s\n", + cur - automata, last_match, or32_opcodes[last_match].name); + + *cur = LEAF_FLAG | last_match; + cur++; + nuncovered--; + } + else + { + /* Find longest match. */ + for (i = 0; i < 32; i++) + { + int len; + + for (len = best_len + 1; len < MIN (MAX_LEN, 33 - i); len++) + { + unsigned long m = (1UL << ((unsigned long)len)) - 1; + + debug (9, " (%i(%08X & %08X>>%i = %08X, %08X)", + len,m, cur_mask, i, (cur_mask >> (unsigned)i), + (cur_mask >> (unsigned)i) & m); + + if ((m & (cur_mask >> (unsigned)i)) == m) + { + best_len = len; + best_first = i; + debug (9, "!"); + } + else + break; + } + } + + debug (9, "\n"); + + if (!best_len) + { + fprintf (stderr, "%i instructions match mask 0x%08X:\n", ninstr, mask); + + for (i = 0; i < or32_num_opcodes; i++) + if (ti[i].in_pass == pass) + fprintf (stderr, "%s ", or32_opcodes[i].name); + + fprintf (stderr, "\n"); + exit (1); + } + + debug (8, "%i> #### %i << %i (%i) ####\n", + cur - automata, best_len, best_first, ninstr); + + *cur = best_first; + cur++; + *cur = (1 << best_len) - 1; + cur++; + next = cur; + + /* Allocate space for pointers. */ + cur += 1 << best_len; + cur_mask = (1 << (unsigned long)best_len) - 1; + + for (i = 0; i < (1 << (unsigned long)best_len); i++) + { + int j; + unsigned long *c; + + curpass++; + for (j = 0; j < or32_num_opcodes; j++) + if (ti[j].in_pass == pass + && ((ti[j].insn >> best_first) & cur_mask) == (unsigned long) i + && ((ti[j].insn_mask >> best_first) & cur_mask) == cur_mask) + ti[j].in_pass = curpass; + + debug (9, "%08X %08X %i\n", mask, cur_mask, best_first); + c = cover_insn (cur, curpass, mask & (~(cur_mask << best_first))); + if (c) + { + debug (8, "%i> #%X -> %u\n", next - automata, i, cur - automata); + *next = cur - automata; + cur = c; + } + else + { + debug (8, "%i> N/A\n", next - automata); + *next = 0; + } + next++; + } + } + return cur; +} + +/* Returns number of nonzero bits. */ + +static int +num_ones (value) + unsigned long value; +{ + int c = 0; + + while (value) + { + if (value & 1) + c++; + value >>= 1; + } + return c; +} + +/* Utility function, which converts parameters from or32_opcode format to more binary form. + Parameters are stored in ti struct. */ + +static struct insn_op_struct * +parse_params (opcode, cur) + const struct or32_opcode * opcode; + struct insn_op_struct * cur; +{ + char *args = opcode->args; + int i, type; + + i = 0; + type = 0; + /* In case we don't have any parameters, we add dummy read from r0. */ + + if (!(*args)) + { + cur->type = OPTYPE_REG | OPTYPE_OP | OPTYPE_LAST; + cur->data = 0; + debug (9, "#%08X %08X\n", cur->type, cur->data); + cur++; + return cur; + } + + while (*args != '\0') + { + if (*args == 'r') + { + args++; + type |= OPTYPE_REG; + } + else if (ISALPHA (*args)) + { + unsigned long arg; + + arg = insn_extract (*args, opcode->encoding); + debug (9, "%s : %08X ------\n", opcode->name, arg); + if (letter_signed (*args)) + { + type |= OPTYPE_SIG; + type |= ((num_ones (arg) - 1) << OPTYPE_SBIT_SHR) & OPTYPE_SBIT; + } + + /* Split argument to sequences of consecutive ones. */ + while (arg) + { + int shr = 0; + unsigned long tmp = arg, mask = 0; + + while ((tmp & 1) == 0) + { + shr++; + tmp >>= 1; + } + while (tmp & 1) + { + mask++; + tmp >>= 1; + } + cur->type = type | shr; + cur->data = mask; + arg &= ~(((1 << mask) - 1) << shr); + debug (6, "|%08X %08X\n", cur->type, cur->data); + cur++; + } + args++; + } + else if (*args == '(') + { + /* Next param is displacement. Later we will treat them as one operand. */ + cur--; + cur->type = type | cur->type | OPTYPE_DIS | OPTYPE_OP; + debug (9, ">%08X %08X\n", cur->type, cur->data); + cur++; + type = 0; + i++; + args++; + } + else if (*args == OPERAND_DELIM) + { + cur--; + cur->type = type | cur->type | OPTYPE_OP; + debug (9, ">%08X %08X\n", cur->type, cur->data); + cur++; + type = 0; + i++; + args++; + } + else if (*args == '0') + { + cur->type = type; + cur->data = 0; + debug (9, ">%08X %08X\n", cur->type, cur->data); + cur++; + type = 0; + i++; + args++; + } + else if (*args == ')') + args++; + else + { + fprintf (stderr, "%s : parse error in args.\n", opcode->name); + exit (1); + } + } + + cur--; + cur->type = type | cur->type | OPTYPE_OP | OPTYPE_LAST; + debug (9, "#%08X %08X\n", cur->type, cur->data); + cur++; + + return cur; +} + +/* Constructs new automata based on or32_opcodes array. */ + +void +build_automata () +{ + int i; + unsigned long *end; + struct insn_op_struct *cur; + + automata = (unsigned long *) malloc (MAX_AUTOMATA_SIZE * sizeof (unsigned long)); + ti = (struct temp_insn_struct *) malloc (sizeof (struct temp_insn_struct) * or32_num_opcodes); + + nuncovered = or32_num_opcodes; + printf ("Building automata... "); + /* Build temporary information about instructions. */ + for (i = 0; i < or32_num_opcodes; i++) + { + unsigned long ones, zeros; + char *encoding = or32_opcodes[i].encoding; + + ones = insn_extract('1', encoding); + zeros = insn_extract('0', encoding); + + ti[i].insn_mask = ones | zeros; + ti[i].insn = ones; + ti[i].in_pass = curpass = 0; + + /*debug(9, "%s: %s %08X %08X\n", or32_opcodes[i].name, + or32_opcodes[i].encoding, ti[i].insn_mask, ti[i].insn);*/ + } + + /* Until all are covered search for best criteria to separate them. */ + end = cover_insn (automata, curpass, 0xFFFFFFFF); + + if (end - automata > MAX_AUTOMATA_SIZE) + { + fprintf (stderr, "Automata too large. Increase MAX_AUTOMATA_SIZE."); + exit (1); + } + + printf ("done, num uncovered: %i/%i.\n", nuncovered, or32_num_opcodes); + printf ("Parsing operands data... "); + + op_data = (struct insn_op_struct *) malloc (MAX_OP_TABLE_SIZE * sizeof (struct insn_op_struct)); + op_start = (struct insn_op_struct **) malloc (or32_num_opcodes * sizeof (struct insn_op_struct *)); + cur = op_data; + + for (i = 0; i < or32_num_opcodes; i++) + { + op_start[i] = cur; + cur = parse_params (&or32_opcodes[i], cur); + + if (cur - op_data > MAX_OP_TABLE_SIZE) + { + fprintf (stderr, "Operands table too small, increase MAX_OP_TABLE_SIZE.\n"); + exit (1); + } + } + printf ("done.\n"); +} + +void +destruct_automata () +{ + free (ti); + free (automata); + free (op_data); + free (op_start); +} + +/* Decodes instruction and returns instruction index. */ + +int +insn_decode (insn) + unsigned int insn; +{ + unsigned long *a = automata; + int i; + + while (!(*a & LEAF_FLAG)) + { + unsigned int first = *a; + + debug (9, "%i ", a - automata); + + a++; + i = (insn >> first) & *a; + a++; + if (!*(a + i)) + { + /* Invalid instruction found? */ + debug (9, "XXX\n", i); + return -1; + } + a = automata + *(a + i); + } + + i = *a & ~LEAF_FLAG; + + debug (9, "%i\n", i); + + /* Final check - do we have direct match? + (based on or32_opcodes this should be the only possibility, + but in case of invalid/missing instruction we must perform a check) */ + if ((ti[i].insn_mask & insn) == ti[i].insn) + return i; + else + return -1; +} + +static char disassembled_str[50]; +char *disassembled = &disassembled_str[0]; + +/* Automagically does zero- or sign- extension and also finds correct + sign bit position if sign extension is correct extension. Which extension + is proper is figured out from letter description. */ + +static unsigned long +extend_imm (imm, l) + unsigned long imm; + char l; +{ + unsigned long mask; + int letter_bits; + + /* First truncate all bits above valid range for this letter + in case it is zero extend. */ + letter_bits = letter_range (l); + mask = (1 << letter_bits) - 1; + imm &= mask; + + /* Do sign extend if this is the right one. */ + if (letter_signed(l) && (imm >> (letter_bits - 1))) + imm |= (~mask); + + return imm; +} + +static unsigned long +or32_extract (param_ch, enc_initial, insn) + char param_ch; + char *enc_initial; + unsigned long insn; +{ + char *enc; + unsigned long ret = 0; + int opc_pos = 0; + int param_pos = 0; + + for (enc = enc_initial; *enc != '\0'; enc++) + if (*enc == param_ch) + { + if (enc - 2 >= enc_initial && (*(enc - 2) == '0') && (*(enc - 1) == 'x')) + continue; + else + param_pos++; + } + +#if DEBUG + printf ("or32_extract: %x ", param_pos); +#endif + opc_pos = 32; + + for (enc = enc_initial; *enc != '\0'; ) + if ((*enc == '0') && (*(enc + 1) == 'x')) + { + opc_pos -= 4; + if ((param_ch == '0') || (param_ch == '1')) + { + unsigned long tmp = strtol (enc, NULL, 16); +#if DEBUG + printf (" enc=%s, tmp=%x ", enc, tmp); +#endif + if (param_ch == '0') + tmp = 15 - tmp; + ret |= tmp << opc_pos; + } + enc += 3; + } + else if ((*enc == '0') || (*enc == '1')) + { + opc_pos--; + if (param_ch == *enc) + ret |= 1 << opc_pos; + enc++; + } + else if (*enc == param_ch) + { + opc_pos--; + param_pos--; +#if DEBUG + printf ("\n ret=%x opc_pos=%x, param_pos=%x\n", ret, opc_pos, param_pos); +#endif + if (ISLOWER (param_ch)) + ret -= ((insn >> opc_pos) & 0x1) << param_pos; + else + ret += ((insn >> opc_pos) & 0x1) << param_pos; + enc++; + } + else if (ISALPHA (*enc)) + { + opc_pos--; + enc++; + } + else if (*enc == '-') + { + opc_pos--; + enc++; + } + else + enc++; + +#if DEBUG + printf ("ret=%x\n", ret); +#endif + return ret; +} + +/* Print register. Used only by print_insn. */ + +static void +or32_print_register (param_ch, encoding, insn) + char param_ch; + char *encoding; + unsigned long insn; +{ + int regnum = or32_extract(param_ch, encoding, insn); + + sprintf (disassembled, "%sr%d", disassembled, regnum); +} + +/* Print immediate. Used only by print_insn. */ + +static void +or32_print_immediate (param_ch, encoding, insn) + char param_ch; + char *encoding; + unsigned long insn; +{ + int imm = or32_extract (param_ch, encoding, insn); + + imm = extend_imm (imm, param_ch); + + if (letter_signed (param_ch)) + { + if (imm < 0) + sprintf (disassembled, "%s%d", disassembled, imm); + else + sprintf (disassembled, "%s0x%x", disassembled, imm); + } + else + sprintf (disassembled, "%s%#x", disassembled, imm); +} + +/* Disassemble one instruction from insn to disassemble. + Return the size of the instruction. */ + +int +disassemble_insn (insn) + unsigned long insn; +{ + int index; + index = insn_decode (insn); + + if (index >= 0) + { + struct or32_opcode const *opcode = &or32_opcodes[index]; + char *s; + + sprintf (disassembled, "%s ", opcode->name); + for (s = opcode->args; *s != '\0'; ++s) + { + switch (*s) + { + case '\0': + return 4; + + case 'r': + or32_print_register (*++s, opcode->encoding, insn); + break; + + default: + if (strchr (opcode->encoding, *s)) + or32_print_immediate (*s, opcode->encoding, insn); + else + sprintf (disassembled, "%s%c", disassembled, *s); + } + } + } + else + { + /* This used to be %8x for binutils. */ + sprintf (disassembled, "%s.word 0x%08lx", disassembled, insn); + } + + return insn_len (insn); +} diff --git a/opcodes/po/POTFILES.in b/opcodes/po/POTFILES.in index e8d2ba8..43e34cd 100644 --- a/opcodes/po/POTFILES.in +++ b/opcodes/po/POTFILES.in @@ -78,6 +78,8 @@ openrisc-dis.c openrisc-ibld.c openrisc-opc.c openrisc-opc.h +or32-dis.c +or32-opc.c pdp11-dis.c pdp11-opc.c pj-dis.c diff --git a/opcodes/po/fr.po b/opcodes/po/fr.po index 15f77f8..3853414 100644 --- a/opcodes/po/fr.po +++ b/opcodes/po/fr.po @@ -5,7 +5,7 @@ msgid "" msgstr "" "Project-Id-Version: opcodes 2.12-pre020121\n" -"POT-Creation-Date: 2002-01-17 13:58+0000\n" +"POT-Creation-Date: 2002-01-31 17:10+0000\n" "PO-Revision-Date: 2002-01-25 08:00-0500\n" "Last-Translator: Michel Robitaille \n" "Language-Team: French \n" @@ -25,21 +25,21 @@ msgstr "saut indic msgid "Illegal limm reference in last instruction!\n" msgstr "Référence limite illégale dans la dernière instruction!\n" -#: arm-dis.c:509 +#: arm-dis.c:502 msgid "" msgstr "" -#: arm-dis.c:1019 +#: arm-dis.c:1012 #, c-format msgid "Unrecognised register name set: %s\n" msgstr "Nom de jeu de registres inconnu: %s\n" -#: arm-dis.c:1026 +#: arm-dis.c:1019 #, c-format msgid "Unrecognised disassembler option: %s\n" msgstr "Option du désassembleur non reconnue: %s\n" -#: arm-dis.c:1198 +#: arm-dis.c:1191 msgid "" "\n" "The following ARM specific disassembler options are supported for use with\n" @@ -63,6 +63,7 @@ msgid "unknown constraint `%c'" msgstr "contrainte inconnue `%c'" #: cgen-asm.c:346 fr30-ibld.c:195 m32r-ibld.c:195 openrisc-ibld.c:195 +#: xstormy16-ibld.c:195 #, c-format msgid "operand out of range (%ld not between %ld and %ld)" msgstr "opérande hors gamme (%ld n'est pas entre %ld et %ld)" @@ -88,96 +89,101 @@ msgstr "Erreur inconnue %d\n" msgid "Address 0x%x is out of bounds.\n" msgstr "Adresse 0x%x est hors gamme.\n" -#: fr30-asm.c:324 m32r-asm.c:326 openrisc-asm.c:245 +#: fr30-asm.c:323 m32r-asm.c:325 openrisc-asm.c:244 xstormy16-asm.c:231 #, c-format msgid "Unrecognized field %d while parsing.\n" msgstr "Champ non reconnu %d lors de l'analyse.\n" -#: fr30-asm.c:374 m32r-asm.c:376 openrisc-asm.c:295 +#: fr30-asm.c:373 m32r-asm.c:375 openrisc-asm.c:294 xstormy16-asm.c:281 msgid "missing mnemonic in syntax string" msgstr "mnémonique manquante dans la syntaxe de la chaîne" #. We couldn't parse it. -#: fr30-asm.c:510 fr30-asm.c:514 fr30-asm.c:601 fr30-asm.c:703 m32r-asm.c:512 -#: m32r-asm.c:516 m32r-asm.c:603 m32r-asm.c:705 openrisc-asm.c:431 -#: openrisc-asm.c:435 openrisc-asm.c:522 openrisc-asm.c:624 +#: fr30-asm.c:509 fr30-asm.c:513 fr30-asm.c:600 fr30-asm.c:702 m32r-asm.c:511 +#: m32r-asm.c:515 m32r-asm.c:602 m32r-asm.c:704 openrisc-asm.c:430 +#: openrisc-asm.c:434 openrisc-asm.c:521 openrisc-asm.c:623 +#: xstormy16-asm.c:417 xstormy16-asm.c:421 xstormy16-asm.c:508 +#: xstormy16-asm.c:610 msgid "unrecognized instruction" msgstr "instruction non reconnue" -#: fr30-asm.c:557 m32r-asm.c:559 openrisc-asm.c:478 +#: fr30-asm.c:556 m32r-asm.c:558 openrisc-asm.c:477 xstormy16-asm.c:464 #, c-format msgid "syntax error (expected char `%c', found `%c')" msgstr "erreur de syntaxe (caractère `%c' attendu, `%c' obtenu)" -#: fr30-asm.c:567 m32r-asm.c:569 openrisc-asm.c:488 +#: fr30-asm.c:566 m32r-asm.c:568 openrisc-asm.c:487 xstormy16-asm.c:474 #, c-format msgid "syntax error (expected char `%c', found end of instruction)" -msgstr "erreur de syntaxe (caractère `%c' attendu, fin de l'instruction obtenue)" +msgstr "" +"erreur de syntaxe (caractère `%c' attendu, fin de l'instruction obtenue)" -#: fr30-asm.c:595 m32r-asm.c:597 openrisc-asm.c:516 +#: fr30-asm.c:594 m32r-asm.c:596 openrisc-asm.c:515 xstormy16-asm.c:502 msgid "junk at end of line" msgstr "rebut à la fin de la ligne" -#: fr30-asm.c:702 m32r-asm.c:704 openrisc-asm.c:623 +#: fr30-asm.c:701 m32r-asm.c:703 openrisc-asm.c:622 xstormy16-asm.c:609 msgid "unrecognized form of instruction" msgstr "forme d'instruction non reconnue" -#: fr30-asm.c:714 m32r-asm.c:716 openrisc-asm.c:635 +#: fr30-asm.c:713 m32r-asm.c:715 openrisc-asm.c:634 xstormy16-asm.c:621 #, c-format msgid "bad instruction `%.50s...'" msgstr "instruction erronée `%.50s...'" -#: fr30-asm.c:717 m32r-asm.c:719 openrisc-asm.c:638 +#: fr30-asm.c:716 m32r-asm.c:718 openrisc-asm.c:637 xstormy16-asm.c:624 #, c-format msgid "bad instruction `%.50s'" msgstr "instruction erronée `%.50s'" #. Default text to print if an instruction isn't recognized. #: fr30-dis.c:39 m32r-dis.c:39 mmix-dis.c:282 openrisc-dis.c:39 +#: xstormy16-dis.c:39 msgid "*unknown*" msgstr "*inconnu*" -#: fr30-dis.c:319 m32r-dis.c:250 openrisc-dis.c:137 +#: fr30-dis.c:318 m32r-dis.c:249 openrisc-dis.c:136 xstormy16-dis.c:169 #, c-format msgid "Unrecognized field %d while printing insn.\n" msgstr "Champ non reconnu %d lors de l'impression insn.\n" -#: fr30-ibld.c:166 m32r-ibld.c:166 openrisc-ibld.c:166 +#: fr30-ibld.c:166 m32r-ibld.c:166 openrisc-ibld.c:166 xstormy16-ibld.c:166 #, c-format msgid "operand out of range (%ld not between %ld and %lu)" msgstr "opérande hors gamme (%ld n'est pas entre %ld et %lu)" -#: fr30-ibld.c:179 m32r-ibld.c:179 openrisc-ibld.c:179 +#: fr30-ibld.c:179 m32r-ibld.c:179 openrisc-ibld.c:179 xstormy16-ibld.c:179 #, c-format msgid "operand out of range (%lu not between 0 and %lu)" msgstr "opérande hors gamme (%lu n'est pas entre 0 et %lu)" -#: fr30-ibld.c:731 m32r-ibld.c:660 openrisc-ibld.c:634 +#: fr30-ibld.c:730 m32r-ibld.c:659 openrisc-ibld.c:633 xstormy16-ibld.c:678 #, c-format msgid "Unrecognized field %d while building insn.\n" msgstr "Champ non reconnu %d lors de la construction de insn.\n" -#: fr30-ibld.c:939 m32r-ibld.c:794 openrisc-ibld.c:737 +#: fr30-ibld.c:937 m32r-ibld.c:792 openrisc-ibld.c:735 xstormy16-ibld.c:826 #, c-format msgid "Unrecognized field %d while decoding insn.\n" msgstr "Champ non reconnu %d lors du décodage de insn.\n" -#: fr30-ibld.c:1088 m32r-ibld.c:904 openrisc-ibld.c:817 +#: fr30-ibld.c:1086 m32r-ibld.c:902 openrisc-ibld.c:815 xstormy16-ibld.c:939 #, c-format msgid "Unrecognized field %d while getting int operand.\n" msgstr "Champ non reconnu %d lors de la prise d'une opérande int.\n" -#: fr30-ibld.c:1217 m32r-ibld.c:994 openrisc-ibld.c:877 +#: fr30-ibld.c:1215 m32r-ibld.c:992 openrisc-ibld.c:875 xstormy16-ibld.c:1032 #, c-format msgid "Unrecognized field %d while getting vma operand.\n" msgstr "Champ non reconnu %d lors de la prise d'une opérande vma.\n" -#: fr30-ibld.c:1351 m32r-ibld.c:1092 openrisc-ibld.c:946 +#: fr30-ibld.c:1349 m32r-ibld.c:1090 openrisc-ibld.c:944 xstormy16-ibld.c:1134 #, c-format msgid "Unrecognized field %d while setting int operand.\n" msgstr "Champ non reconnu %d lors de l'initialisation d'une opérande int.\n" -#: fr30-ibld.c:1473 m32r-ibld.c:1178 openrisc-ibld.c:1003 +#: fr30-ibld.c:1471 m32r-ibld.c:1176 openrisc-ibld.c:1001 +#: xstormy16-ibld.c:1224 #, c-format msgid "Unrecognized field %d while setting vma operand.\n" msgstr "Champ non reconnu %d lors de l'initialisation d'une opérande vma.\n" @@ -283,7 +289,9 @@ msgstr "option conditionnelle invalide" #: ppc-opc.c:800 msgid "attempt to set y bit when using + or - modifier" -msgstr "tentative d'initialisation du bit y lorsque le modificateur + ou - a été utilisé" +msgstr "" +"tentative d'initialisation du bit y lorsque le modificateur + ou - a été " +"utilisé" #: ppc-opc.c:832 ppc-opc.c:884 msgid "offset not a multiple of 4" @@ -299,7 +307,9 @@ msgstr "d #: ppc-opc.c:910 msgid "ignoring least significant bits in branch offset" -msgstr "Les derniers bits les moins significatifs sont ignorés dans le décalage de branchement" +msgstr "" +"Les derniers bits les moins significatifs sont ignorés dans le décalage de " +"branchement" #: ppc-opc.c:944 ppc-opc.c:981 msgid "illegal bitmask" @@ -396,5 +406,36 @@ msgstr "La valeur imm msgid "immediate value must be even" msgstr "La valeur immédiate doit être paire." +#: xstormy16-asm.c:74 +#, fuzzy +msgid "Bad register in preincrement" +msgstr "registre index n'est pas dans la plage de chargement" + +#: xstormy16-asm.c:79 +#, fuzzy +msgid "Bad register in postincrement" +msgstr "registre invalide pour un ajustement de la pile" + +#: xstormy16-asm.c:81 +#, fuzzy +msgid "Bad register name" +msgstr "registre index n'est pas dans la plage de chargement" + +#: xstormy16-asm.c:85 +msgid "Label conflicts with register name" +msgstr "" + +#: xstormy16-asm.c:89 +msgid "Label conflicts with `Rx'" +msgstr "" + +#: xstormy16-asm.c:91 +msgid "Bad immediate expression" +msgstr "" + +#: xstormy16-asm.c:120 +msgid "Small operand was not an immediate number" +msgstr "" + #~ msgid "unrecognized keyword/register name" #~ msgstr "nom de mot clé ou de registre non reconnu" diff --git a/opcodes/po/opcodes.pot b/opcodes/po/opcodes.pot index 4e079cd..aed28c2 100644 --- a/opcodes/po/opcodes.pot +++ b/opcodes/po/opcodes.pot @@ -6,7 +6,7 @@ msgid "" msgstr "" "Project-Id-Version: PACKAGE VERSION\n" -"POT-Creation-Date: 2002-01-17 13:58+0000\n" +"POT-Creation-Date: 2002-01-31 17:10+0000\n" "PO-Revision-Date: YEAR-MO-DA HO:MI+ZONE\n" "Last-Translator: FULL NAME \n" "Language-Team: LANGUAGE \n" @@ -26,21 +26,21 @@ msgstr "" msgid "Illegal limm reference in last instruction!\n" msgstr "" -#: arm-dis.c:509 +#: arm-dis.c:502 msgid "" msgstr "" -#: arm-dis.c:1019 +#: arm-dis.c:1012 #, c-format msgid "Unrecognised register name set: %s\n" msgstr "" -#: arm-dis.c:1026 +#: arm-dis.c:1019 #, c-format msgid "Unrecognised disassembler option: %s\n" msgstr "" -#: arm-dis.c:1198 +#: arm-dis.c:1191 msgid "" "\n" "The following ARM specific disassembler options are supported for use with\n" @@ -61,6 +61,7 @@ msgid "unknown constraint `%c'" msgstr "" #: cgen-asm.c:346 fr30-ibld.c:195 m32r-ibld.c:195 openrisc-ibld.c:195 +#: xstormy16-ibld.c:195 #, c-format msgid "operand out of range (%ld not between %ld and %ld)" msgstr "" @@ -86,96 +87,100 @@ msgstr "" msgid "Address 0x%x is out of bounds.\n" msgstr "" -#: fr30-asm.c:324 m32r-asm.c:326 openrisc-asm.c:245 +#: fr30-asm.c:323 m32r-asm.c:325 openrisc-asm.c:244 xstormy16-asm.c:231 #, c-format msgid "Unrecognized field %d while parsing.\n" msgstr "" -#: fr30-asm.c:374 m32r-asm.c:376 openrisc-asm.c:295 +#: fr30-asm.c:373 m32r-asm.c:375 openrisc-asm.c:294 xstormy16-asm.c:281 msgid "missing mnemonic in syntax string" msgstr "" #. We couldn't parse it. -#: fr30-asm.c:510 fr30-asm.c:514 fr30-asm.c:601 fr30-asm.c:703 m32r-asm.c:512 -#: m32r-asm.c:516 m32r-asm.c:603 m32r-asm.c:705 openrisc-asm.c:431 -#: openrisc-asm.c:435 openrisc-asm.c:522 openrisc-asm.c:624 +#: fr30-asm.c:509 fr30-asm.c:513 fr30-asm.c:600 fr30-asm.c:702 m32r-asm.c:511 +#: m32r-asm.c:515 m32r-asm.c:602 m32r-asm.c:704 openrisc-asm.c:430 +#: openrisc-asm.c:434 openrisc-asm.c:521 openrisc-asm.c:623 +#: xstormy16-asm.c:417 xstormy16-asm.c:421 xstormy16-asm.c:508 +#: xstormy16-asm.c:610 msgid "unrecognized instruction" msgstr "" -#: fr30-asm.c:557 m32r-asm.c:559 openrisc-asm.c:478 +#: fr30-asm.c:556 m32r-asm.c:558 openrisc-asm.c:477 xstormy16-asm.c:464 #, c-format msgid "syntax error (expected char `%c', found `%c')" msgstr "" -#: fr30-asm.c:567 m32r-asm.c:569 openrisc-asm.c:488 +#: fr30-asm.c:566 m32r-asm.c:568 openrisc-asm.c:487 xstormy16-asm.c:474 #, c-format msgid "syntax error (expected char `%c', found end of instruction)" msgstr "" -#: fr30-asm.c:595 m32r-asm.c:597 openrisc-asm.c:516 +#: fr30-asm.c:594 m32r-asm.c:596 openrisc-asm.c:515 xstormy16-asm.c:502 msgid "junk at end of line" msgstr "" -#: fr30-asm.c:702 m32r-asm.c:704 openrisc-asm.c:623 +#: fr30-asm.c:701 m32r-asm.c:703 openrisc-asm.c:622 xstormy16-asm.c:609 msgid "unrecognized form of instruction" msgstr "" -#: fr30-asm.c:714 m32r-asm.c:716 openrisc-asm.c:635 +#: fr30-asm.c:713 m32r-asm.c:715 openrisc-asm.c:634 xstormy16-asm.c:621 #, c-format msgid "bad instruction `%.50s...'" msgstr "" -#: fr30-asm.c:717 m32r-asm.c:719 openrisc-asm.c:638 +#: fr30-asm.c:716 m32r-asm.c:718 openrisc-asm.c:637 xstormy16-asm.c:624 #, c-format msgid "bad instruction `%.50s'" msgstr "" #. Default text to print if an instruction isn't recognized. #: fr30-dis.c:39 m32r-dis.c:39 mmix-dis.c:282 openrisc-dis.c:39 +#: xstormy16-dis.c:39 msgid "*unknown*" msgstr "" -#: fr30-dis.c:319 m32r-dis.c:250 openrisc-dis.c:137 +#: fr30-dis.c:318 m32r-dis.c:249 openrisc-dis.c:136 xstormy16-dis.c:169 #, c-format msgid "Unrecognized field %d while printing insn.\n" msgstr "" -#: fr30-ibld.c:166 m32r-ibld.c:166 openrisc-ibld.c:166 +#: fr30-ibld.c:166 m32r-ibld.c:166 openrisc-ibld.c:166 xstormy16-ibld.c:166 #, c-format msgid "operand out of range (%ld not between %ld and %lu)" msgstr "" -#: fr30-ibld.c:179 m32r-ibld.c:179 openrisc-ibld.c:179 +#: fr30-ibld.c:179 m32r-ibld.c:179 openrisc-ibld.c:179 xstormy16-ibld.c:179 #, c-format msgid "operand out of range (%lu not between 0 and %lu)" msgstr "" -#: fr30-ibld.c:731 m32r-ibld.c:660 openrisc-ibld.c:634 +#: fr30-ibld.c:730 m32r-ibld.c:659 openrisc-ibld.c:633 xstormy16-ibld.c:678 #, c-format msgid "Unrecognized field %d while building insn.\n" msgstr "" -#: fr30-ibld.c:939 m32r-ibld.c:794 openrisc-ibld.c:737 +#: fr30-ibld.c:937 m32r-ibld.c:792 openrisc-ibld.c:735 xstormy16-ibld.c:826 #, c-format msgid "Unrecognized field %d while decoding insn.\n" msgstr "" -#: fr30-ibld.c:1088 m32r-ibld.c:904 openrisc-ibld.c:817 +#: fr30-ibld.c:1086 m32r-ibld.c:902 openrisc-ibld.c:815 xstormy16-ibld.c:939 #, c-format msgid "Unrecognized field %d while getting int operand.\n" msgstr "" -#: fr30-ibld.c:1217 m32r-ibld.c:994 openrisc-ibld.c:877 +#: fr30-ibld.c:1215 m32r-ibld.c:992 openrisc-ibld.c:875 xstormy16-ibld.c:1032 #, c-format msgid "Unrecognized field %d while getting vma operand.\n" msgstr "" -#: fr30-ibld.c:1351 m32r-ibld.c:1092 openrisc-ibld.c:946 +#: fr30-ibld.c:1349 m32r-ibld.c:1090 openrisc-ibld.c:944 xstormy16-ibld.c:1134 #, c-format msgid "Unrecognized field %d while setting int operand.\n" msgstr "" -#: fr30-ibld.c:1473 m32r-ibld.c:1178 openrisc-ibld.c:1003 +#: fr30-ibld.c:1471 m32r-ibld.c:1176 openrisc-ibld.c:1001 +#: xstormy16-ibld.c:1224 #, c-format msgid "Unrecognized field %d while setting vma operand.\n" msgstr "" @@ -392,3 +397,31 @@ msgstr "" #: v850-opc.c:375 msgid "immediate value must be even" msgstr "" + +#: xstormy16-asm.c:74 +msgid "Bad register in preincrement" +msgstr "" + +#: xstormy16-asm.c:79 +msgid "Bad register in postincrement" +msgstr "" + +#: xstormy16-asm.c:81 +msgid "Bad register name" +msgstr "" + +#: xstormy16-asm.c:85 +msgid "Label conflicts with register name" +msgstr "" + +#: xstormy16-asm.c:89 +msgid "Label conflicts with `Rx'" +msgstr "" + +#: xstormy16-asm.c:91 +msgid "Bad immediate expression" +msgstr "" + +#: xstormy16-asm.c:120 +msgid "Small operand was not an immediate number" +msgstr "" diff --git a/opcodes/po/sv.po b/opcodes/po/sv.po index 6fddbd8..a6eda07 100644 --- a/opcodes/po/sv.po +++ b/opcodes/po/sv.po @@ -5,7 +5,7 @@ msgid "" msgstr "" "Project-Id-Version: opcodes 2.11\n" -"POT-Creation-Date: 2002-01-17 13:58+0000\n" +"POT-Creation-Date: 2002-01-31 17:10+0000\n" "PO-Revision-Date: 2001-10-23 15:35+0200\n" "Last-Translator: Christian Rose \n" "Language-Team: Swedish \n" @@ -25,21 +25,21 @@ msgstr "hopptipset ligger inte p msgid "Illegal limm reference in last instruction!\n" msgstr "Otillåten limm-referens i sista instruktionen!\n" -#: arm-dis.c:509 +#: arm-dis.c:502 msgid "" msgstr "" -#: arm-dis.c:1019 +#: arm-dis.c:1012 #, c-format msgid "Unrecognised register name set: %s\n" msgstr "Okänt registernamn är angivet: %s\n" -#: arm-dis.c:1026 +#: arm-dis.c:1019 #, c-format msgid "Unrecognised disassembler option: %s\n" msgstr "Okänt disassembleralternativ: %s\n" -#: arm-dis.c:1198 +#: arm-dis.c:1191 msgid "" "\n" "The following ARM specific disassembler options are supported for use with\n" @@ -63,6 +63,7 @@ msgid "unknown constraint `%c'" msgstr "okänd begränsning \"%c\"" #: cgen-asm.c:346 fr30-ibld.c:195 m32r-ibld.c:195 openrisc-ibld.c:195 +#: xstormy16-ibld.c:195 #, c-format msgid "operand out of range (%ld not between %ld and %ld)" msgstr "operanden är utanför intervallet (%ld är inte mellan %ld och %ld)" @@ -88,97 +89,101 @@ msgstr "Ok msgid "Address 0x%x is out of bounds.\n" msgstr "Adressen 0x%x ligger utanför tillåtna gränser.\n" -#: fr30-asm.c:324 m32r-asm.c:326 openrisc-asm.c:245 +#: fr30-asm.c:323 m32r-asm.c:325 openrisc-asm.c:244 xstormy16-asm.c:231 #, c-format msgid "Unrecognized field %d while parsing.\n" msgstr "Okänt fält %d vid tolkning.\n" -#: fr30-asm.c:374 m32r-asm.c:376 openrisc-asm.c:295 +#: fr30-asm.c:373 m32r-asm.c:375 openrisc-asm.c:294 xstormy16-asm.c:281 msgid "missing mnemonic in syntax string" msgstr "" #. We couldn't parse it. -#: fr30-asm.c:510 fr30-asm.c:514 fr30-asm.c:601 fr30-asm.c:703 m32r-asm.c:512 -#: m32r-asm.c:516 m32r-asm.c:603 m32r-asm.c:705 openrisc-asm.c:431 -#: openrisc-asm.c:435 openrisc-asm.c:522 openrisc-asm.c:624 +#: fr30-asm.c:509 fr30-asm.c:513 fr30-asm.c:600 fr30-asm.c:702 m32r-asm.c:511 +#: m32r-asm.c:515 m32r-asm.c:602 m32r-asm.c:704 openrisc-asm.c:430 +#: openrisc-asm.c:434 openrisc-asm.c:521 openrisc-asm.c:623 +#: xstormy16-asm.c:417 xstormy16-asm.c:421 xstormy16-asm.c:508 +#: xstormy16-asm.c:610 msgid "unrecognized instruction" msgstr "okänd instruktion" -#: fr30-asm.c:557 m32r-asm.c:559 openrisc-asm.c:478 +#: fr30-asm.c:556 m32r-asm.c:558 openrisc-asm.c:477 xstormy16-asm.c:464 #, c-format msgid "syntax error (expected char `%c', found `%c')" msgstr "syntaxfel (tecknet \"%c\" förväntades, hittade \"%c\")" -#: fr30-asm.c:567 m32r-asm.c:569 openrisc-asm.c:488 +#: fr30-asm.c:566 m32r-asm.c:568 openrisc-asm.c:487 xstormy16-asm.c:474 #, fuzzy, c-format msgid "syntax error (expected char `%c', found end of instruction)" msgstr "syntaxfel (tecknet \"%c\" förväntades, hittade \"%c\")" -#: fr30-asm.c:595 m32r-asm.c:597 openrisc-asm.c:516 +#: fr30-asm.c:594 m32r-asm.c:596 openrisc-asm.c:515 xstormy16-asm.c:502 msgid "junk at end of line" msgstr "skräp vid slutet på raden" -#: fr30-asm.c:702 m32r-asm.c:704 openrisc-asm.c:623 +#: fr30-asm.c:701 m32r-asm.c:703 openrisc-asm.c:622 xstormy16-asm.c:609 #, fuzzy msgid "unrecognized form of instruction" msgstr "okänd instruktion" -#: fr30-asm.c:714 m32r-asm.c:716 openrisc-asm.c:635 +#: fr30-asm.c:713 m32r-asm.c:715 openrisc-asm.c:634 xstormy16-asm.c:621 #, c-format msgid "bad instruction `%.50s...'" msgstr "felaktig instruktion \"%.50s...\"" -#: fr30-asm.c:717 m32r-asm.c:719 openrisc-asm.c:638 +#: fr30-asm.c:716 m32r-asm.c:718 openrisc-asm.c:637 xstormy16-asm.c:624 #, c-format msgid "bad instruction `%.50s'" msgstr "felaktig instruktion \"%.50s\"" #. Default text to print if an instruction isn't recognized. #: fr30-dis.c:39 m32r-dis.c:39 mmix-dis.c:282 openrisc-dis.c:39 +#: xstormy16-dis.c:39 msgid "*unknown*" msgstr "*okänd*" -#: fr30-dis.c:319 m32r-dis.c:250 openrisc-dis.c:137 +#: fr30-dis.c:318 m32r-dis.c:249 openrisc-dis.c:136 xstormy16-dis.c:169 #, c-format msgid "Unrecognized field %d while printing insn.\n" msgstr "Okänt fält %d vid utskrift av instruktion.\n" -#: fr30-ibld.c:166 m32r-ibld.c:166 openrisc-ibld.c:166 +#: fr30-ibld.c:166 m32r-ibld.c:166 openrisc-ibld.c:166 xstormy16-ibld.c:166 #, fuzzy, c-format msgid "operand out of range (%ld not between %ld and %lu)" msgstr "operanden är utanför intervallet (%ld är inte mellan %ld och %ld)" -#: fr30-ibld.c:179 m32r-ibld.c:179 openrisc-ibld.c:179 +#: fr30-ibld.c:179 m32r-ibld.c:179 openrisc-ibld.c:179 xstormy16-ibld.c:179 #, c-format msgid "operand out of range (%lu not between 0 and %lu)" msgstr "operanden utanför intervallet (%lu inte mellan 0 och %lu)" -#: fr30-ibld.c:731 m32r-ibld.c:660 openrisc-ibld.c:634 +#: fr30-ibld.c:730 m32r-ibld.c:659 openrisc-ibld.c:633 xstormy16-ibld.c:678 #, c-format msgid "Unrecognized field %d while building insn.\n" msgstr "Okänt fält %d vid konstruktion av instruktion.\n" -#: fr30-ibld.c:939 m32r-ibld.c:794 openrisc-ibld.c:737 +#: fr30-ibld.c:937 m32r-ibld.c:792 openrisc-ibld.c:735 xstormy16-ibld.c:826 #, c-format msgid "Unrecognized field %d while decoding insn.\n" msgstr "Okänt fält %d vid avkodning av instruktion.\n" -#: fr30-ibld.c:1088 m32r-ibld.c:904 openrisc-ibld.c:817 +#: fr30-ibld.c:1086 m32r-ibld.c:902 openrisc-ibld.c:815 xstormy16-ibld.c:939 #, c-format msgid "Unrecognized field %d while getting int operand.\n" msgstr "Okänt fält %d vid hämtning av heltalsoperand.\n" -#: fr30-ibld.c:1217 m32r-ibld.c:994 openrisc-ibld.c:877 +#: fr30-ibld.c:1215 m32r-ibld.c:992 openrisc-ibld.c:875 xstormy16-ibld.c:1032 #, c-format msgid "Unrecognized field %d while getting vma operand.\n" msgstr "Okänt fält %d vid hämtning av vma-operand.\n" -#: fr30-ibld.c:1351 m32r-ibld.c:1092 openrisc-ibld.c:946 +#: fr30-ibld.c:1349 m32r-ibld.c:1090 openrisc-ibld.c:944 xstormy16-ibld.c:1134 #, c-format msgid "Unrecognized field %d while setting int operand.\n" msgstr "Okänt fält %d vid inställning av heltalsoperand.\n" -#: fr30-ibld.c:1473 m32r-ibld.c:1178 openrisc-ibld.c:1003 +#: fr30-ibld.c:1471 m32r-ibld.c:1176 openrisc-ibld.c:1001 +#: xstormy16-ibld.c:1224 #, c-format msgid "Unrecognized field %d while setting vma operand.\n" msgstr "Okänt fält %d vid inställning av vma-operand.\n" @@ -398,5 +403,36 @@ msgstr "omedelbara v msgid "immediate value must be even" msgstr "omedelbara värdet måste vara jämnt" +#: xstormy16-asm.c:74 +#, fuzzy +msgid "Bad register in preincrement" +msgstr "indexregistret är i inläsningsintervallet" + +#: xstormy16-asm.c:79 +#, fuzzy +msgid "Bad register in postincrement" +msgstr "ogiltigt register för stackjustering" + +#: xstormy16-asm.c:81 +#, fuzzy +msgid "Bad register name" +msgstr "indexregistret är i inläsningsintervallet" + +#: xstormy16-asm.c:85 +msgid "Label conflicts with register name" +msgstr "" + +#: xstormy16-asm.c:89 +msgid "Label conflicts with `Rx'" +msgstr "" + +#: xstormy16-asm.c:91 +msgid "Bad immediate expression" +msgstr "" + +#: xstormy16-asm.c:120 +msgid "Small operand was not an immediate number" +msgstr "" + #~ msgid "unrecognized keyword/register name" #~ msgstr "okänt namn på nyckelord/register" diff --git a/opcodes/po/tr.po b/opcodes/po/tr.po index ecc9651..1f92ab3 100644 --- a/opcodes/po/tr.po +++ b/opcodes/po/tr.po @@ -5,7 +5,7 @@ msgid "" msgstr "" "Project-Id-Version: opcodes 2.11\n" -"POT-Creation-Date: 2002-01-17 13:58+0000\n" +"POT-Creation-Date: 2002-01-31 17:10+0000\n" "PO-Revision-Date: 2001-07-29 22:33EEST\n" "Last-Translator: Deniz Akkus Kanca \n" "Language-Team: Turkish \n" @@ -26,21 +26,21 @@ msgstr "atlama i msgid "Illegal limm reference in last instruction!\n" msgstr "Son işlemde geçersiz limm referansı!\n" -#: arm-dis.c:509 +#: arm-dis.c:502 msgid "" msgstr "" -#: arm-dis.c:1019 +#: arm-dis.c:1012 #, c-format msgid "Unrecognised register name set: %s\n" msgstr "Bilinmeyen yazmaç ad kümesi: %s\n" -#: arm-dis.c:1026 +#: arm-dis.c:1019 #, c-format msgid "Unrecognised disassembler option: %s\n" msgstr "Bilinmeyen karşıt-çevirici seçeneği: %s\n" -#: arm-dis.c:1198 +#: arm-dis.c:1191 msgid "" "\n" "The following ARM specific disassembler options are supported for use with\n" @@ -64,6 +64,7 @@ msgid "unknown constraint `%c'" msgstr "`%c' bilinmeyen kısıtı" #: cgen-asm.c:346 fr30-ibld.c:195 m32r-ibld.c:195 openrisc-ibld.c:195 +#: xstormy16-ibld.c:195 #, c-format msgid "operand out of range (%ld not between %ld and %ld)" msgstr "Kapsam dışı terim (%ld, %ld ve %ld arasında değil) " @@ -89,97 +90,101 @@ msgstr "Bilinmeyen hata %d\n" msgid "Address 0x%x is out of bounds.\n" msgstr "0x%x adresi sınırların dışında.\n" -#: fr30-asm.c:324 m32r-asm.c:326 openrisc-asm.c:245 +#: fr30-asm.c:323 m32r-asm.c:325 openrisc-asm.c:244 xstormy16-asm.c:231 #, c-format msgid "Unrecognized field %d while parsing.\n" msgstr "Ayrıştırma esnasında bilinmeyen alan %d bulundu.\n" -#: fr30-asm.c:374 m32r-asm.c:376 openrisc-asm.c:295 +#: fr30-asm.c:373 m32r-asm.c:375 openrisc-asm.c:294 xstormy16-asm.c:281 msgid "missing mnemonic in syntax string" msgstr "" #. We couldn't parse it. -#: fr30-asm.c:510 fr30-asm.c:514 fr30-asm.c:601 fr30-asm.c:703 m32r-asm.c:512 -#: m32r-asm.c:516 m32r-asm.c:603 m32r-asm.c:705 openrisc-asm.c:431 -#: openrisc-asm.c:435 openrisc-asm.c:522 openrisc-asm.c:624 +#: fr30-asm.c:509 fr30-asm.c:513 fr30-asm.c:600 fr30-asm.c:702 m32r-asm.c:511 +#: m32r-asm.c:515 m32r-asm.c:602 m32r-asm.c:704 openrisc-asm.c:430 +#: openrisc-asm.c:434 openrisc-asm.c:521 openrisc-asm.c:623 +#: xstormy16-asm.c:417 xstormy16-asm.c:421 xstormy16-asm.c:508 +#: xstormy16-asm.c:610 msgid "unrecognized instruction" msgstr "bilinmeyen işlem" -#: fr30-asm.c:557 m32r-asm.c:559 openrisc-asm.c:478 +#: fr30-asm.c:556 m32r-asm.c:558 openrisc-asm.c:477 xstormy16-asm.c:464 #, c-format msgid "syntax error (expected char `%c', found `%c')" msgstr "biçem hatası (char `%c' beklenirken `%c' bulundu)" -#: fr30-asm.c:567 m32r-asm.c:569 openrisc-asm.c:488 +#: fr30-asm.c:566 m32r-asm.c:568 openrisc-asm.c:487 xstormy16-asm.c:474 #, fuzzy, c-format msgid "syntax error (expected char `%c', found end of instruction)" msgstr "biçem hatası (char `%c' beklenirken `%c' bulundu)" -#: fr30-asm.c:595 m32r-asm.c:597 openrisc-asm.c:516 +#: fr30-asm.c:594 m32r-asm.c:596 openrisc-asm.c:515 xstormy16-asm.c:502 msgid "junk at end of line" msgstr "Satır sonu bozuk " -#: fr30-asm.c:702 m32r-asm.c:704 openrisc-asm.c:623 +#: fr30-asm.c:701 m32r-asm.c:703 openrisc-asm.c:622 xstormy16-asm.c:609 #, fuzzy msgid "unrecognized form of instruction" msgstr "bilinmeyen işlem" -#: fr30-asm.c:714 m32r-asm.c:716 openrisc-asm.c:635 +#: fr30-asm.c:713 m32r-asm.c:715 openrisc-asm.c:634 xstormy16-asm.c:621 #, c-format msgid "bad instruction `%.50s...'" msgstr "geçersiz işlem `%.50s...'" -#: fr30-asm.c:717 m32r-asm.c:719 openrisc-asm.c:638 +#: fr30-asm.c:716 m32r-asm.c:718 openrisc-asm.c:637 xstormy16-asm.c:624 #, c-format msgid "bad instruction `%.50s'" msgstr "geçersiz işlem `%.50s'" #. Default text to print if an instruction isn't recognized. #: fr30-dis.c:39 m32r-dis.c:39 mmix-dis.c:282 openrisc-dis.c:39 +#: xstormy16-dis.c:39 msgid "*unknown*" msgstr "*bilinmeyen*" -#: fr30-dis.c:319 m32r-dis.c:250 openrisc-dis.c:137 +#: fr30-dis.c:318 m32r-dis.c:249 openrisc-dis.c:136 xstormy16-dis.c:169 #, c-format msgid "Unrecognized field %d while printing insn.\n" msgstr "yönerge yazdırılırken bilinmeyen alan %d bulundu.\n" -#: fr30-ibld.c:166 m32r-ibld.c:166 openrisc-ibld.c:166 +#: fr30-ibld.c:166 m32r-ibld.c:166 openrisc-ibld.c:166 xstormy16-ibld.c:166 #, fuzzy, c-format msgid "operand out of range (%ld not between %ld and %lu)" msgstr "Kapsam dışı terim (%ld, %ld ve %ld arasında değil) " -#: fr30-ibld.c:179 m32r-ibld.c:179 openrisc-ibld.c:179 +#: fr30-ibld.c:179 m32r-ibld.c:179 openrisc-ibld.c:179 xstormy16-ibld.c:179 #, c-format msgid "operand out of range (%lu not between 0 and %lu)" msgstr "kapsam dışı terim (%lu 0 ve %lu arasında değil) " -#: fr30-ibld.c:731 m32r-ibld.c:660 openrisc-ibld.c:634 +#: fr30-ibld.c:730 m32r-ibld.c:659 openrisc-ibld.c:633 xstormy16-ibld.c:678 #, c-format msgid "Unrecognized field %d while building insn.\n" msgstr "Yönerge oluşturulurken bilinmeyen alan %d bulundu.\n" -#: fr30-ibld.c:939 m32r-ibld.c:794 openrisc-ibld.c:737 +#: fr30-ibld.c:937 m32r-ibld.c:792 openrisc-ibld.c:735 xstormy16-ibld.c:826 #, c-format msgid "Unrecognized field %d while decoding insn.\n" msgstr "Yönerge çözümlenirken bilinmeyen alan %d bulundu.\n" -#: fr30-ibld.c:1088 m32r-ibld.c:904 openrisc-ibld.c:817 +#: fr30-ibld.c:1086 m32r-ibld.c:902 openrisc-ibld.c:815 xstormy16-ibld.c:939 #, c-format msgid "Unrecognized field %d while getting int operand.\n" msgstr "`int' terimi alınırken bilinmeyen alan %d bulundu.\n" -#: fr30-ibld.c:1217 m32r-ibld.c:994 openrisc-ibld.c:877 +#: fr30-ibld.c:1215 m32r-ibld.c:992 openrisc-ibld.c:875 xstormy16-ibld.c:1032 #, c-format msgid "Unrecognized field %d while getting vma operand.\n" msgstr "`vma' terimi alınırken bilinmeyen alan %d bulundu.\n" -#: fr30-ibld.c:1351 m32r-ibld.c:1092 openrisc-ibld.c:946 +#: fr30-ibld.c:1349 m32r-ibld.c:1090 openrisc-ibld.c:944 xstormy16-ibld.c:1134 #, c-format msgid "Unrecognized field %d while setting int operand.\n" msgstr "`int' terimi atanırken bilinmeyen alan %d bulundu.\n" -#: fr30-ibld.c:1473 m32r-ibld.c:1178 openrisc-ibld.c:1003 +#: fr30-ibld.c:1471 m32r-ibld.c:1176 openrisc-ibld.c:1001 +#: xstormy16-ibld.c:1224 #, c-format msgid "Unrecognized field %d while setting vma operand.\n" msgstr "`vma' terimi atanırken bilinmeyen alan %d bulundu.\n" @@ -398,5 +403,36 @@ msgstr " msgid "immediate value must be even" msgstr "şimdiki değer çift sayı olmalı" +#: xstormy16-asm.c:74 +#, fuzzy +msgid "Bad register in preincrement" +msgstr "yükleme aralığında endeks yazmacı" + +#: xstormy16-asm.c:79 +#, fuzzy +msgid "Bad register in postincrement" +msgstr "yığıt düzeltmesi için geçersiz yazmaç " + +#: xstormy16-asm.c:81 +#, fuzzy +msgid "Bad register name" +msgstr "yükleme aralığında endeks yazmacı" + +#: xstormy16-asm.c:85 +msgid "Label conflicts with register name" +msgstr "" + +#: xstormy16-asm.c:89 +msgid "Label conflicts with `Rx'" +msgstr "" + +#: xstormy16-asm.c:91 +msgid "Bad immediate expression" +msgstr "" + +#: xstormy16-asm.c:120 +msgid "Small operand was not an immediate number" +msgstr "" + #~ msgid "unrecognized keyword/register name" #~ msgstr "Bilinmeyen anahtar/yazmaç adı" -- cgit v1.1