From a3ec2691d043b53f9e77cbfc854f8473c090d2e6 Mon Sep 17 00:00:00 2001 From: Andreas Krebbel Date: Mon, 11 Oct 2010 11:56:53 +0000 Subject: 2010-10-11 Andreas Krebbel * s390-opc.c: Make the instruction masks for the load/store on condition instructions to cover the condition code mask as well. * s390-opc.txt: lgoc -> locg and stgoc -> stocg. 2010-10-11 Andreas Krebbel * gas/s390/zarch-z196.d: Adjust the load/store on condition instructions. * gas/s390/zarch-z196.s: Likewise. --- opcodes/s390-opc.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'opcodes/s390-opc.c') diff --git a/opcodes/s390-opc.c b/opcodes/s390-opc.c index fea838e..2f1487d 100644 --- a/opcodes/s390-opc.c +++ b/opcodes/s390-opc.c @@ -426,7 +426,7 @@ const struct s390_operand s390_operands[] = #define MASK_RSY_AARD { 0xff, 0x00, 0x00, 0x00, 0x00, 0xff } #define MASK_RSY_CCRD { 0xff, 0x00, 0x00, 0x00, 0x00, 0xff } #define MASK_RSY_RDRM { 0xff, 0x00, 0x00, 0x00, 0x00, 0xff } -#define MASK_RSY_RDR0 { 0xff, 0x00, 0x00, 0x00, 0x00, 0xff } +#define MASK_RSY_RDR0 { 0xff, 0x0f, 0x00, 0x00, 0x00, 0xff } #define MASK_RXE_FRRD { 0xff, 0x00, 0x00, 0x00, 0xff, 0xff } #define MASK_RXE_RRRD { 0xff, 0x00, 0x00, 0x00, 0xff, 0xff } #define MASK_RXF_FRRDF { 0xff, 0x00, 0x00, 0x00, 0x0f, 0xff } -- cgit v1.1