From 39f286cd585226ad98c2cd94ee0f96988b3696ce Mon Sep 17 00:00:00 2001 From: John Darrington Date: Mon, 31 Dec 2018 07:48:10 +0000 Subject: S12Z: Fix disassembly of indexed OPR operands with zero index. gas/ * testsuite/gas/s12z/jsr.s: New case. * testsuite/gas/s12z/jsr.d: New case. opcodes/ * s12z-dis.c (opr_emit_disassembly): Do not omit an index if it is zero. --- opcodes/s12z-dis.c | 57 ++++++++++++++++++++++++++---------------------------- 1 file changed, 27 insertions(+), 30 deletions(-) (limited to 'opcodes/s12z-dis.c') diff --git a/opcodes/s12z-dis.c b/opcodes/s12z-dis.c index 14176fb..5db0b43 100644 --- a/opcodes/s12z-dis.c +++ b/opcodes/s12z-dis.c @@ -282,36 +282,33 @@ opr_emit_disassembly (const struct operand *opr, struct memory_operand *mo = (struct memory_operand *) opr; (*info->fprintf_func) (info->stream, "%c", mo->indirect ? '[' : '('); - if (mo->base_offset != 0) - { - (*info->fprintf_func) (info->stream, "%d", mo->base_offset); - } - else if (mo->n_regs > 0) - { - const char *fmt; - switch (mo->mutation) - { - case OPND_RM_PRE_DEC: - fmt = "-%s"; - break; - case OPND_RM_PRE_INC: - fmt = "+%s"; - break; - case OPND_RM_POST_DEC: - fmt = "%s-"; - break; - case OPND_RM_POST_INC: - fmt = "%s+"; - break; - case OPND_RM_NONE: - default: - fmt = "%s"; - break; - } - (*info->fprintf_func) (info->stream, fmt, - registers[mo->regs[0]].name); - used_reg = 1; - } + const char *fmt; + assert (mo->mutation == OPND_RM_NONE || mo->n_regs == 1); + switch (mo->mutation) + { + case OPND_RM_PRE_DEC: + fmt = "-%s"; + break; + case OPND_RM_PRE_INC: + fmt = "+%s"; + break; + case OPND_RM_POST_DEC: + fmt = "%s-"; + break; + case OPND_RM_POST_INC: + fmt = "%s+"; + break; + case OPND_RM_NONE: + default: + if (mo->n_regs < 2) + (*info->fprintf_func) (info->stream, (mo->n_regs == 0) ? "%d" : "%d,", mo->base_offset); + fmt = "%s"; + break; + } + if (mo->n_regs > 0) + (*info->fprintf_func) (info->stream, fmt, + registers[mo->regs[0]].name); + used_reg = 1; if (mo->n_regs > used_reg) { -- cgit v1.1