From de1fbe7889eb4f363b979c14735b8fd51131621b Mon Sep 17 00:00:00 2001 From: Yoshinori Sato Date: Mon, 31 Oct 2022 10:46:37 +0000 Subject: RX assembler: switch arguments of thw MVTACGU insn. --- opcodes/rx-decode.c | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) (limited to 'opcodes/rx-decode.c') diff --git a/opcodes/rx-decode.c b/opcodes/rx-decode.c index 17fbcfc..8ccb126 100644 --- a/opcodes/rx-decode.c +++ b/opcodes/rx-decode.c @@ -12476,22 +12476,22 @@ rx_decode_opcode (unsigned long pc AU, break; case 0x30: { - /** 1111 1101 0001 0111 a011 rdst mvtacgu %0, %1 */ + /** 1111 1101 0001 0111 a011 rsrc mvtacgu %1, %0 */ #line 1110 "rx-decode.opc" int a AU = (op[2] >> 7) & 0x01; #line 1110 "rx-decode.opc" - int rdst AU = op[2] & 0x0f; + int rsrc AU = op[2] & 0x0f; if (trace) { printf ("\033[33m%s\033[0m %02x %02x %02x\n", - "/** 1111 1101 0001 0111 a011 rdst mvtacgu %0, %1 */", + "/** 1111 1101 0001 0111 a011 rsrc mvtacgu %1, %0 */", op[0], op[1], op[2]); printf (" a = 0x%x,", a); - printf (" rdst = 0x%x\n", rdst); + printf (" rsrc = 0x%x\n", rsrc); } - SYNTAX("mvtacgu %0, %1"); + SYNTAX("mvtacgu %1, %0"); #line 1110 "rx-decode.opc" - ID(mvtacgu); DR(a+32); SR(rdst); F_____; + ID(mvtacgu); SR(rsrc); DR(a+32); F_____; } break; -- cgit v1.1