From 0952813b0b27abe7f53a8048c0218883412e54cd Mon Sep 17 00:00:00 2001 From: DJ Delorie Date: Thu, 30 Apr 2015 15:25:49 -0400 Subject: Make RL78 disassembler and simulator respect ISA for mul/div [gas] * config/rl78-defs.h (rl78_isa_g10): New. (rl78_isa_g13): New. (rl78_isa_g14): New. * config/rl78-parse.y (ISA_G10): New. (ISA_G13): New. (ISA_G14): New. (MULHU, MULH, MULU, DIVHU, DIVWU, MACHU, MACH): Use them. * config/tc-rl78.c (rl78_isa_g10): New. (rl78_isa_g13): New. (rl78_isa_g14): New. [gdb] * rl78-tdep.c (rl78_analyze_prologue): Pass RL78_ISA_DEFAULT to rl78_decode_opcode [include] * dis-asm.h (print_insn_rl78_g10): New. (print_insn_rl78_g13): New. (print_insn_rl78_g14): New. (rl78_get_disassembler): New. * opcode/rl78.h (RL78_Dis_Isa): New. (rl78_decode_opcode): Add ISA parameter. [opcodes] * disassemble.c (disassembler): Choose suitable disassembler based on E_ABI. * rl78-decode.opc (rl78_decode_opcode): Take ISA parameter. Use it to decode mul/div insns. * rl78-decode.c: Regenerate. * rl78-dis.c (print_insn_rl78): Rename to... (print_insn_rl78_common): ...this, take ISA parameter. (print_insn_rl78): New. (print_insn_rl78_g10): New. (print_insn_rl78_g13): New. (print_insn_rl78_g14): New. (rl78_get_disassembler): New. [sim] * rl78/cpu.c (g14_multiply): New. * rl78/cpu.h (g14_multiply): New. * rl78/load.c (rl78_load): Decode ISA completely. * rl78/main.c (main): Expand -M to include other ISAs. * rl78/rl78.c (decode_opcode): Decode based on ISA. * rl78/trace.c (rl78_disasm_fn): New. (sim_disasm_init): Reset it. (sim_disasm_one): Get correct disassembler for ISA. --- opcodes/rl78-decode.opc | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) (limited to 'opcodes/rl78-decode.opc') diff --git a/opcodes/rl78-decode.opc b/opcodes/rl78-decode.opc index fc0dea5..87433e8 100644 --- a/opcodes/rl78-decode.opc +++ b/opcodes/rl78-decode.opc @@ -164,7 +164,8 @@ int rl78_decode_opcode (unsigned long pc AU, RL78_Opcode_Decoded * rl78, int (* getbyte)(void *), - void * ptr) + void * ptr, + RL78_Dis_Isa isa) { LocalData lds, * ld = &lds; unsigned char op_buf[20] = {0}; @@ -749,7 +750,7 @@ rl78_decode_opcode (unsigned long pc AU, op0 = SFR; op1 = IMMU(1); ID(mov); DM(None, op0); SC(op1); - if (op0 == 0xffffb) + if (op0 == 0xffffb && isa == RL78_ISA_G14) switch (op1) { case 0x01: @@ -902,7 +903,8 @@ rl78_decode_opcode (unsigned long pc AU, /*----------------------------------------------------------------------*/ /** 1101 0110 mulu x */ - ID(mulu); + if (isa == RL78_ISA_G14) + ID(mulu); /*----------------------------------------------------------------------*/ -- cgit v1.1