From 26186d7440dcc84fd70c92e43d547591b136a6b0 Mon Sep 17 00:00:00 2001 From: "H.J. Lu" Date: Thu, 6 Sep 2007 12:28:12 +0000 Subject: gas/ 2007-09-06 H.J. Lu * config/tc-i386.c (match_template): Handle invlpga, vmload, vmrun and vmsave in SVME. (process_suffix): Likewise. gas/testsuite/ 2007-09-06 H.J. Lu * gas/i386/svme.s: Updated to allow eax in 64bit. * gas/i386/svme.d: Updated. * gas/i386/svme64.d: Likewise. opcodes/ 2007-09-06 H.J. Lu * i386-opc.tbl: Correct SVME instructions to allow 32bit register operand in 64bit mode. * i386-tbl.h: Regenerated. --- opcodes/i386-tbl.h | 29 ++++++++--------------------- 1 file changed, 8 insertions(+), 21 deletions(-) (limited to 'opcodes/i386-tbl.h') diff --git a/opcodes/i386-tbl.h b/opcodes/i386-tbl.h index 362ae46..f5121e1 100644 --- a/opcodes/i386-tbl.h +++ b/opcodes/i386-tbl.h @@ -4189,13 +4189,9 @@ const template i386_optab[] = { "invlpga", 0, 0xf01, 0xdf, CpuSVME, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_xSuf|ImmExt, { 0 } }, - { "invlpga", 2, 0xf01, 0xdf, CpuSVME|CpuNo64, - No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_xSuf|ImmExt, - { Reg32, - Reg32 } }, - { "invlpga", 2, 0xf01, 0xdf, CpuSVME|Cpu64, + { "invlpga", 2, 0xf01, 0xdf, CpuSVME, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_xSuf|ImmExt|NoRex64, - { Reg64, + { Reg32|Reg64, Reg32 } }, { "skinit", 0, 0xf01, 0xde, CpuSVME, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_xSuf|ImmExt, @@ -4209,33 +4205,24 @@ const template i386_optab[] = { "vmload", 0, 0xf01, 0xda, CpuSVME, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_xSuf|ImmExt, { 0 } }, - { "vmload", 1, 0xf01, 0xda, CpuSVME|CpuNo64, - No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_xSuf|ImmExt, - { Reg32 } }, - { "vmload", 1, 0xf01, 0xda, CpuSVME|Cpu64, + { "vmload", 1, 0xf01, 0xda, CpuSVME, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_xSuf|ImmExt|NoRex64, - { Reg64 } }, + { Reg32|Reg64 } }, { "vmmcall", 0, 0xf01, 0xd9, CpuSVME, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_xSuf|ImmExt, { 0 } }, { "vmrun", 0, 0xf01, 0xd8, CpuSVME, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_xSuf|ImmExt, { 0 } }, - { "vmrun", 1, 0xf01, 0xd8, CpuSVME|CpuNo64, - No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_xSuf|ImmExt, - { Reg32 } }, - { "vmrun", 1, 0xf01, 0xd8, CpuSVME|Cpu64, + { "vmrun", 1, 0xf01, 0xd8, CpuSVME, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_xSuf|ImmExt|NoRex64, - { Reg64 } }, + { Reg32|Reg64 } }, { "vmsave", 0, 0xf01, 0xdb, CpuSVME, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_xSuf|ImmExt, { 0 } }, - { "vmsave", 1, 0xf01, 0xdb, CpuSVME|CpuNo64, - No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_xSuf|ImmExt, - { Reg32 } }, - { "vmsave", 1, 0xf01, 0xdb, CpuSVME|Cpu64, + { "vmsave", 1, 0xf01, 0xdb, CpuSVME, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_xSuf|ImmExt|NoRex64, - { Reg64 } }, + { Reg32|Reg64 } }, { "movntsd", 2, 0xf20f2b, None, CpuSSE4a, Modrm|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_xSuf, { RegXMM, -- cgit v1.1