From 5dd85c99706566de293156c56d8c72b2c69e9cdb Mon Sep 17 00:00:00 2001 From: Sebastian Pop Date: Wed, 18 Nov 2009 04:04:17 +0000 Subject: 2009-11-17 Sebastian Pop Quentin Neill gas/ * config/tc-i386.c (cpu_arch): Added .xop and .cvt16. (build_vex_prefix): Handle xop08. (md_assemble): Don't special case the constant 3 for insns using MODRM. (build_modrm_byte): Handle vex2sources. (md_show_usage): Add xop and cvt16. * doc/c-i386.texi: Document fma4, xop, and cvt16. gas/testsuite/ * gas/i386/i386.exp: Run xop and cvt16 in 32-bit mode. Run x86-64-xop and x86-64-cvt16 in 64-bit mode. * gas/i386/lwp.d: Update name of the testcase. * gas/i386/x86-64-xop.d: New. * gas/i386/x86-64-xop.s: New. * gas/i386/xop.d: New. * gas/i386/xop.s: New. * gas/i386/cvt16.d: New. * gas/i386/cvt16.s: New. opcodes/ * i386-dis.c (OP_Vex_2src_1): New. (OP_Vex_2src_2): New. (Vex_2src_1): New. (Vex_2src_2): New. (XOP_08): Added. (VEX_LEN_XOP_08_A0): Added. (VEX_LEN_XOP_08_A1): Added. (VEX_LEN_XOP_09_80): Added. (VEX_LEN_XOP_09_81): Added. (xop_table): Added an entry for XOP_08. Handle xop instructions. (vex_len_table): Added entries for VEX_LEN_XOP_08_A0, VEX_LEN_XOP_08_A1, VEX_LEN_XOP_09_80, VEX_LEN_XOP_09_81. (get_valid_dis386): Handle XOP_08. (OP_Vex_2src): New. * i386-gen.c (cpu_flag_init): Add CPU_XOP_FLAGS and CPU_CVT16_FLAGS. (cpu_flags): Add CpuXOP and CpuCVT16. (opcode_modifiers): Add XOP08, Vex2Sources. * i386-opc.h (CpuXOP): Added. (CpuCVT16): Added. (i386_cpu_flags): Add cpuxop and cpucvt16. (XOP08): Added. (Vex2Sources): Added. (i386_opcode_modifier): Add xop08, vex2sources. * i386-opc.tbl: Add entries for XOP and CVT16 instructions. * i386-init.h: Regenerated. * i386-tbl.h: Regenerated. --- opcodes/i386-opc.h | 14 +++++++++++++- 1 file changed, 13 insertions(+), 1 deletion(-) (limited to 'opcodes/i386-opc.h') diff --git a/opcodes/i386-opc.h b/opcodes/i386-opc.h index cee1303..536f462 100644 --- a/opcodes/i386-opc.h +++ b/opcodes/i386-opc.h @@ -102,6 +102,10 @@ enum CpuFMA, /* FMA4 support required */ CpuFMA4, + /* XOP support required */ + CpuXOP, + /* CVT16 support required */ + CpuCVT16, /* LWP support required */ CpuLWP, /* MOVBE Instuction support required */ @@ -170,6 +174,8 @@ typedef union i386_cpu_flags unsigned int cpupclmul:1; unsigned int cpufma:1; unsigned int cpufma4:1; + unsigned int cpuxop:1; + unsigned int cpucvt16:1; unsigned int cpulwp:1; unsigned int cpumovbe:1; unsigned int cpuept:1; @@ -291,11 +297,15 @@ enum Vex0F38, /* insn has VEX 0x0F3A opcode prefix. */ Vex0F3A, + /* insn has XOP 0x08 opcode prefix. */ + XOP08, /* insn has XOP 0x09 opcode prefix. */ XOP09, /* insn has XOP 0x0A opcode prefix. */ XOP0A, - /* insn has VEX prefix with 3 soures. */ + /* insn has VEX prefix with 2 sources. */ + Vex2Sources, + /* insn has VEX prefix with 3 sources. */ Vex3Sources, /* instruction has VEX 8 bit imm */ VexImmExt, @@ -364,8 +374,10 @@ typedef struct i386_opcode_modifier unsigned int vex0f:1; unsigned int vex0f38:1; unsigned int vex0f3a:1; + unsigned int xop08:1; unsigned int xop09:1; unsigned int xop0a:1; + unsigned int vex2sources:1; unsigned int vex3sources:1; unsigned int veximmext:1; unsigned int sse2avx:1; -- cgit v1.1