From 2cf200a4c8a850e6f696e572ea03f340eae97c8a Mon Sep 17 00:00:00 2001
From: Ilya Tocar <ilya.tocar@intel.com>
Date: Thu, 3 Apr 2014 16:40:04 +0400
Subject: Add support for Intel SGX instructions

Add Intel SGX instructions support to assembler and disassembler.

gas/

	* config/tc-i386.c (cpu_arch): Add .se1.
	* doc/c-i386.texi: Document .se1/se1.

gas/testsuite/

	* gas/i386/i386.exp: Run SE1 tests.
	* gas/i386/se1.d: New file.
	* gas/i386/se1.s: Ditto.
	* gas/i386/x86-64-se1.d: Ditto.
	* gas/i386/x86-64-se1.s: Ditto.

opcodes/

	* i386-dis.c (rm_table): Add encls, enclu.
	* i386-gen.c (cpu_flag_init): Add CPU_SE1_FLAGS,
	(cpu_flags): Add CpuSE1.
	* i386-opc.h (enum): Add CpuSE1.
	(i386_cpu_flags): Add cpuse1.
	* i386-opc.tbl: Add encls, enclu.
	* i386-init.h: Regenerated.
	* i386-tbl.h: Likewise.
---
 opcodes/i386-dis.c | 6 +++++-
 1 file changed, 5 insertions(+), 1 deletion(-)

(limited to 'opcodes/i386-dis.c')

diff --git a/opcodes/i386-dis.c b/opcodes/i386-dis.c
index bea4a78..0e07606 100644
--- a/opcodes/i386-dis.c
+++ b/opcodes/i386-dis.c
@@ -11532,6 +11532,10 @@ static const struct dis386 rm_table[][8] = {
     { "mwait",		{ { OP_Mwait, 0 } } },
     { "clac",		{ Skip_MODRM } },
     { "stac",		{ Skip_MODRM } },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { "encls",		{ Skip_MODRM } },
   },
   {
     /* RM_0F01_REG_2 */
@@ -11542,7 +11546,7 @@ static const struct dis386 rm_table[][8] = {
     { "vmfunc",		{ Skip_MODRM } },
     { "xend",		{ Skip_MODRM } },
     { "xtest",		{ Skip_MODRM } },
-    { Bad_Opcode },
+    { "enclu",		{ Skip_MODRM } },
   },
   {
     /* RM_0F01_REG_3 */
-- 
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