From 74f5402d08b857d60499b27851c204954ce6c42c Mon Sep 17 00:00:00 2001 From: Szabolcs Nagy Date: Fri, 11 Nov 2016 10:43:15 +0000 Subject: [AArch64] Add ARMv8.3 combined pointer authentication branch instructions Add support for ARMv8.3 pointer authentication instructions that are encoded as unconditional branch instructions. opcodes/ 2016-11-11 Szabolcs Nagy * aarch64-tbl.h (arch64_opcode_table): Add braa, brab, blraa, blrab, braaz, brabz, blraaz, blrabz, retaa, retab, eretaa, eretab. * aarch64-asm-2.c: Regenerate. * aarch64-dis-2.c: Regenerate. * aarch64-opc-2.c: Regenerate. gas/ 2016-11-08 Szabolcs Nagy * testsuite/gas/aarch64/pac.s: Add ARMv8.3 branch instruction tests. * testsuite/gas/aarch64/pac.d: Likewise. --- opcodes/aarch64-tbl.h | 12 ++++++++++++ 1 file changed, 12 insertions(+) (limited to 'opcodes/aarch64-tbl.h') diff --git a/opcodes/aarch64-tbl.h b/opcodes/aarch64-tbl.h index f4c0bd1..f5750a2 100644 --- a/opcodes/aarch64-tbl.h +++ b/opcodes/aarch64-tbl.h @@ -2618,6 +2618,18 @@ struct aarch64_opcode aarch64_opcode_table[] = CORE_INSN ("ret", 0xd65f0000, 0xfffffc1f, branch_reg, 0, OP1 (Rn), QL_I1X, F_OPD0_OPT | F_DEFAULT (30)), CORE_INSN ("eret", 0xd69f03e0, 0xffffffff, branch_reg, 0, OP0 (), {}, 0), CORE_INSN ("drps", 0xd6bf03e0, 0xffffffff, branch_reg, 0, OP0 (), {}, 0), + V8_3_INSN ("braa", 0xd71f0800, 0xfffffc00, branch_reg, OP2 (Rn, Rd_SP), QL_I2SAMEX, 0), + V8_3_INSN ("brab", 0xd71f0c00, 0xfffffc00, branch_reg, OP2 (Rn, Rd_SP), QL_I2SAMEX, 0), + V8_3_INSN ("blraa", 0xd73f0800, 0xfffffc00, branch_reg, OP2 (Rn, Rd_SP), QL_I2SAMEX, 0), + V8_3_INSN ("blrab", 0xd73f0c00, 0xfffffc00, branch_reg, OP2 (Rn, Rd_SP), QL_I2SAMEX, 0), + V8_3_INSN ("braaz", 0xd61f081f, 0xfffffc1f, branch_reg, OP1 (Rn), QL_I1X, 0), + V8_3_INSN ("brabz", 0xd61f0c1f, 0xfffffc1f, branch_reg, OP1 (Rn), QL_I1X, 0), + V8_3_INSN ("blraaz", 0xd63f081f, 0xfffffc1f, branch_reg, OP1 (Rn), QL_I1X, 0), + V8_3_INSN ("blrabz", 0xd63f0c1f, 0xfffffc1f, branch_reg, OP1 (Rn), QL_I1X, 0), + V8_3_INSN ("retaa", 0xd65f0bff, 0xffffffff, branch_reg, OP0 (), {}, 0), + V8_3_INSN ("retab", 0xd65f0fff, 0xffffffff, branch_reg, OP0 (), {}, 0), + V8_3_INSN ("eretaa", 0xd69f0bff, 0xffffffff, branch_reg, OP0 (), {}, 0), + V8_3_INSN ("eretab", 0xd69f0fff, 0xffffffff, branch_reg, OP0 (), {}, 0), /* Compare & branch (immediate). */ CORE_INSN ("cbz", 0x34000000, 0x7f000000, compbranch, 0, OP2 (Rt, ADDR_PCREL19), QL_R_PCREL, F_SF), CORE_INSN ("cbnz", 0x35000000, 0x7f000000, compbranch, 0, OP2 (Rt, ADDR_PCREL19), QL_R_PCREL, F_SF), -- cgit v1.1